In an earlier change, the amount of data read from the flash was
mistakenly limited to the size known to the current driver. This causes
problems when the length is increased, and written with the new longer
version; the checksum would fail because not enough data was read.
Always read the full 128 byte length to prevent this.
Signed-off-by: Dave Olson <dave.olson@qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Make some functions that are only used in a single .c file static. In
addition to being a cleanup, this shrinks the generated code. On x86_64:
add/remove: 1/3 grow/shrink: 2/1 up/down: 4777/-4956 (-179)
function old new delta
handle_errors - 3994 +3994
__verbs_timer 42 710 +668
ipath_do_ruc_send 2131 2246 +115
ipath_no_bufs_available 136 - -136
ipath_disarm_senderrbufs 639 - -639
ipath_ib_timer 658 - -658
ipath_intr 5878 2355 -3523
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Now that it's June, it's about time to update
the copyright notices of files that have changed.
Signed-off-by: John Gregor <john.gregor@qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
We currently track various errors, now we enhance that capability by
logging some of them to EEPROM. We also now log a cumulative "active"
time defined by traffic though the InfiniPath HCA beyond the normal SM
traffic.
Signed-off-by: Michael Albaugh <michael.albaugh@qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
The new LED blinking interface adds more contention for the
unprotected GPIO pins that were already shared, though not commonly at
the same time. We add locks to the accesses to these pins so that
Read-Modify-Write is now safe. Some of these locks are added at
interrupt context, so we shadow the registers which drive and inspect
these pins to avoid the mmio read/writes. This mitigates the effects
of the locks and hastens us through the interrupt.
Add locking and always use shadows for registers controlling GPIO pins
(ExtCtrl and GPIOout). The use of shadows implies doing less I/O,
which can make I2C operation too fast on some platforms. An explicit
udelay(1) in SCL manipulation fixes that.
Signed-off-by: Michael Albaugh <michael.albaugh@qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
The EEPROM is read via programmable I/O pins. When the driver
is compiled -Os, the CPU can speculatively read the I/O
value before it is valid. This patch fixes the problem.
Signed-off-by: Bryan O'Sullivan <bryan.osullivan@qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Prior to this change, the driver was not able to support a HT and PCIE
card simultaneously present in the same machine.
Signed-off-by: Bryan O'Sullivan <bryan.osullivan@qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
We do a few more explicit checks for specific models, and now also support the
old PathScale serial number style, or new QLogic style.
This is backwards compatible with previous versions of software and hardware.
That is, older software will see a plausible serial number and correct GUID
when used with a new board, while newer software will correctly handle an
older board.
Signed-off-by: Mike Albaugh <mike.albaugh@qlogic.com>
Signed-off-by: Dave Olson <dave.olson@qlogic.com>
Signed-off-by: Bryan O'Sullivan <bryan.osullivan@qlogic.com>
Cc: "Michael S. Tsirkin" <mst@mellanox.co.il>
Cc: Roland Dreier <rolandd@cisco.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This is required for even semi-decent performance on OpenIB.
Signed-off-by: Bryan O'Sullivan <bos@pathscale.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
EEPROM support, interrupt handling, statistics gathering, and write
combining management for x86_64.
A note regarding i2c: The Atmel EEPROM hardware we use looks like an
i2c device electrically, but is not i2c compliant at all from a
functional perspective. We tried using the kernel's i2c support to
talk to it, but failed.
Normal i2c devices have a single 7-bit or 10-bit i2c address that they
respond to. Valid 7-bit addresses range from 0x03 to 0x77. Addresses
0x00 to 0x02 and 0x78 to 0x7F are special reserved addresses
(e.g. 0x00 is the "general call" address.) The Atmel device, on the
other hand, responds to ALL addresses. It's designed to be the only
device on a given i2c bus. A given i2c device address corresponds to
the memory address within the i2c device itself.
At least one reason why the linux core i2c stuff won't work for this
is that it prohibits access to reserved addresses like 0x00, which are
really valid addresses on the Atmel devices.
Signed-off-by: Bryan O'Sullivan <bos@pathscale.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
