Commit Graph

55 Commits

Author SHA1 Message Date
Shunzhou Jiang
f2b03c1056 soc: s4: Add support for power domains controller
Add support s4 Power controller. In s4, power control
registers are in secure domain, and should be accessed by smc.

Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220307025357.1368673-3-shunzhou.jiang@amlogic.com
2022-03-07 09:40:39 +01:00
Cai Huoqing
d54dbe9f0e soc: amlogic: meson-clk-measure: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210908071544.603-2-caihuoqing@baidu.com
2021-09-13 09:43:00 +02:00
Cai Huoqing
97a4a24087 soc: amlogic: canvas: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210908071544.603-1-caihuoqing@baidu.com
2021-09-13 09:43:00 +02:00
Christian Hewitt
ca8d1fda5b soc: amlogic: meson-gx-socinfo: Add S905Y2 ID for Radxa Zero
Add the SOC ID for the S905Y2 used in the Radxa Zero. Before/After:

[    0.321650] soc soc0: Amlogic Meson G12A (Unknown) Revision 28:b (30:2) Detected
[    0.318533] soc soc0: Amlogic Meson G12A (S905Y2) Revision 28:b (30:2) Detected

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210820012718.10761-1-christianshewitt@gmail.com
2021-09-13 09:38:20 +02:00
Linus Torvalds
071e5aceeb ARM: Drivers for 5.14
- Reset controllers: Adding support for Microchip Sparx5 Switch.
 
 - Memory controllers: ARM Primecell PL35x SMC memory controller
   driver cleanups and improvements.
 
 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.
 
 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.
 
 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.
 
 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining
   management interfaces and communication (including bus model)
   between partitions both in Normal and Secure Worlds.
 
 - Tegra Memory controller changes, including major rework to deal
   with identity mappings at boot and integration with ARM SMMU
   pieces.
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDokgYPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3looP/20uQAjRadPJFdV/B2mpZYqXMI4dIN9g7KJ1
 6uEoaGurzYWQQreDXswQ5vFUcQfIudEJ9Im9IF+9BUsFQ2uvPTJ4I+HDN++WH70B
 cIsmwwBr7Q4JUVP+O7T2WGtBY69jvHTpJrCCVtyHtwEyL4a1uyfelsAJXbxqaqis
 w1lmXNkkSqx5c67H3maNNDRnbutyLL2gO0TYdiBapOcc5V03OYKNnMbDqRTddqyt
 4UH4eYkFkNai8UJ476BXHU9ldlWzEkRBib/OKwF9k3oPj9W3kdQ/vd2IKK5a1fTX
 jIbOPSRRC8K/9Bxn1KEtdoU0Yy+rlm3xd7DtQl5RyGTD+tHVq3dN55WjoXBY83Yh
 r37y7uII9i09tPg5+APSX/jgodsIt4c46dKwvYuWXvB7ziomfsKxQiRanApJG6UX
 qS5NCUrlfYWlL302JOTvEtDBePXXiXQ065GuRjM948WMnVzXwEKwYUakGhvXQWMS
 jXCcOGW7GhnbY3+Ipn9chyhydHpKSxIb8oBk4cMRJU9jlN2GmjHgW8RMvT2WM6VF
 1F8acyMvf6en5tV6f23cjbW+iIMTS5egKNfqi8tdjGVxbowypyJYzjYOhaqk6veJ
 jHOmpglTXas0QD3ZRU7vGVlrvHqik8XyRsq3N9CQjVenRCbsQLKZRi1gTbIuspcR
 rejqH3Fs
 =kPg8
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Olof Johansson:

 - Reset controllers: Adding support for Microchip Sparx5 Switch.

 - Memory controllers: ARM Primecell PL35x SMC memory controller driver
   cleanups and improvements.

 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.

 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.

 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.

 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management
   interfaces and communication (including bus model) between partitions
   both in Normal and Secure Worlds.

 - Tegra Memory controller changes, including major rework to deal with
   identity mappings at boot and integration with ARM SMMU pieces.

* tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits)
  firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
  firmware: turris-mox-rwtm: show message about HWRNG registration
  firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng
  firmware: turris-mox-rwtm: report failures better
  firmware: turris-mox-rwtm: fix reply status decoding function
  soc: imx: gpcv2: add support for i.MX8MN power domains
  dt-bindings: add defines for i.MX8MN power domains
  firmware: tegra: bpmp: Fix Tegra234-only builds
  iommu/arm-smmu: Use Tegra implementation on Tegra186
  iommu/arm-smmu: tegra: Implement SID override programming
  iommu/arm-smmu: tegra: Detect number of instances at runtime
  dt-bindings: arm-smmu: Add Tegra186 compatible string
  firmware: qcom_scm: Add MDM9607 compatible
  soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
  soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
  soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
  dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml
  memory: emif: remove unused frequency and voltage notifiers
  memory: fsl_ifc: fix leak of private memory on probe failure
  memory: fsl_ifc: fix leak of IO mapping on probe failure
  ...
2021-07-10 09:46:20 -07:00
Qiheng Lin
a06bc96902 soc: amlogic: meson-clk-measure: remove redundant dev_err call in meson_msr_probe()
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Qiheng Lin <linqiheng@huawei.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210409110243.41-1-linqiheng@huawei.com
2021-05-31 09:26:58 +02:00
Martin Blumenstingl
e93e6bef79 soc: amlogic: meson-ee-pwrc: Rename "get_power" to "is_powered_off"
The name "get_power" is used within the Meson EE power controller driver
to indicate whether a power domain is turned on or off. With the
original "get_power" naming the result was:
- true = powered off
- false = powered on

Rename "get_power" to "is_powered_off" to make the naming consistent
with the third argument to pm_genpd_init. Also this naming is easier to
understand when reading the code without looking at the implementation
of "get_power".

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210517202115.1004065-1-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-05-28 09:52:06 +02:00
Yejune Deng
1116e43e7e soc: amlogic: replace devm_reset_control_array_get()
devm_reset_control_array_get_exclusive() looks more readable

Signed-off-by: Yejune Deng <yejune.deng@gmail.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/1605667700-16681-1-git-send-email-yejune.deng@gmail.com
2020-11-30 16:23:11 -08:00
Yu Kuai
28f851e6af soc: amlogic: canvas: add missing put_device() call in meson_canvas_get()
if of_find_device_by_node() succeed, meson_canvas_get() doesn't have
a corresponding put_device(). Thus add put_device() to fix the exception
handling for this function implementation.

Fixes: 382f8be045 ("soc: amlogic: canvas: Fix meson_canvas_get when probe failed")
Signed-off-by: Yu Kuai <yukuai3@huawei.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201117011322.522477-1-yukuai3@huawei.com
2020-11-30 16:22:48 -08:00
Kevin Hilman
d9da1785ec soc: meson: enable building drivers as modules
Enable SoC drivers for 64-bit Amlogic SoCs to be built as modules.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2020-10-26 11:33:43 -07:00
Kevin Hilman
5d2fc13ba0 soc: amlogic: socinfo: build for specific arch
The MX driver only supports 32-bit ARM SoCs and the GX driver only
supports 64-bit SoCs.  Only build for the right architecture.

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2020-10-26 11:33:27 -07:00
Kevin Hilman
5aabf1180f soc: amlogic: pm-domains: use always-on flag
Rather than use a governor to keep these domains always-on, instead
use the flag GENPD_FLAG_ALWAYS_ON.  This has the same effect, but with
much lower overhead since the governor path is not used at all.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200921222135.7145-1-khilman@baylibre.com
2020-09-24 09:50:01 -07:00
Neil Armstrong
525054782a soc: amlogic: meson-ee-pwrc: add support for the Meson AXG SoCs
The Power Controller in the Amlogic AXG SoCs is similar to the GXL one
but with less VPU memory domains to enable and a supplementary Audio
memory power domain.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200917064702.1459-3-narmstrong@baylibre.com
2020-09-18 13:22:14 -07:00
Christian Hewitt
d16d0481e6 soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's
Correct the SoC revision and package bits/mask values for S905D3/X3 to detect
a wider range of observed SoC IDs, and tweak sort order for A311D/S922X.

S905X3 05 0000 0101  (SEI610 initial devices)
S905X3 10 0001 0000  (ODROID-C4 and recent Android boxes)
S905X3 50 0101 0000  (SEI610 later revisions)
S905D3 04 0000 0100  (VIM3L devices in kernelci)
S905D3 b0 1011 0000  (VIM3L initial production)

Fixes commit c9cc9bec36 ("soc: amlogic: meson-gx-socinfo: Add SM1 and S905X3 IDs")

Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200609081318.28023-1-christianshewitt@gmail.com
2020-06-29 16:00:53 -07:00
Martin Blumenstingl
53773f2dfd soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCs
Add support for the Meson GX SoCs to the meson-ee-pwrc driver.

The power domains on the GX SoCs are very similar to G12A. The only
known differences so far are:
- The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the
  VPU power-domain)
- The GX SoCs have an additional reset line called "dvin"

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200515204709.1505498-5-martin.blumenstingl@googlemail.com
2020-05-19 16:02:14 -07:00
Martin Blumenstingl
34217df28d soc: amlogic: meson-ee-pwrc: add support for Meson8/Meson8b/Meson8m2
This adds support for the power domains on Meson8/Meson8b/Meson8m2.
Meson8 doesn't use any reset lines while Meson8b and Meson8m2 use the
same set of reset lines (which is different from the newer SoCs).
Add dedicated compatible strings for Meson8, Meson8b and Meson8m2 to
support these differences.

Notable differences between Meson8 and G12A are:
- there is no HHI_VPU_MEM_PD_REG2 on the 32-bit SoCs
- the Meson8b datasheet describes an "audio DSP memory" power domain
  which is used for the hardware audio decoder
- the "amlogic,ao-sysctrl" only includes the power management related
  registers on the 32-bit SoCs, meaning the for example the
  AO_RTI_GEN_PWR_SLEEP0 register is at offset (0x2 << 2) rather than
  (0x3a << 2). As result of this (0x38 << 2) is subtracted from the
  register offsets, which is the start of the power management related
  registers.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200515204709.1505498-4-martin.blumenstingl@googlemail.com
2020-05-19 16:02:14 -07:00
Jianxin Pan
9ef7a79206 soc: amlogic: fix compile failure with MESON_SECURE_PM_DOMAINS & !MESON_SM
When MESON_SECURE_PM_DOMAINS & !MESON_SM, there will be compile failure:
.../meson-secure-pwrc.o: In function `meson_secure_pwrc_on':
.../meson-secure-pwrc.c:76: undefined reference to `meson_sm_call'

Fix this by adding depends on MESON_SM for MESON_SECURE_PM_DOMAINS.

Fixes: b3dde5013e ("soc: amlogic: Add support for Secure power domains controller")
Reported-by: Stephen Rothwell<sfr@canb.auug.org.au>
Reported-by: patchwork-bot+linux-amlogic<patchwork-bot+linux-amlogic@kernel.org>
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Stephen Rothwell<sfr@canb.auug.org.au>
Link: https://lore.kernel.org/r/1581955933-69832-1-git-send-email-jianxin.pan@amlogic.com
2020-02-29 08:53:43 -08:00
Jianxin Pan
b3dde5013e soc: amlogic: Add support for Secure power domains controller
Add support for the Amlogic Secure Power controller. In A1/C1 series, power
control registers are in secure domain, and should be accessed by smc.

Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/1579087831-94965-4-git-send-email-jianxin.pan@amlogic.com
2020-02-14 11:37:34 -08:00
Martin Blumenstingl
c67aafd60d soc: amlogic: meson-ee-pwrc: propagate errors from pm_genpd_init()
pm_genpd_init() can return an error. Propagate the error code to prevent
the driver from indicating that it successfully probed while there were
errors during pm_genpd_init().

Fixes: eef3c2ba0a ("soc: amlogic: Add support for Everything-Else power domains controller")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-09 15:21:20 -08:00
Martin Blumenstingl
0766d65e6a soc: amlogic: meson-ee-pwrc: propagate PD provider registration errors
of_genpd_add_provider_onecell() can return an error. Propagate the error
so the driver registration fails when of_genpd_add_provider_onecell()
did not work.

Fixes: eef3c2ba0a ("soc: amlogic: Add support for Everything-Else power domains controller")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-09 15:21:20 -08:00
Christian Hewitt
fdfc6997bd soc: amlogic: meson-gx-socinfo: Fix S905D3 ID for VIM3L
Chip on the board is S905D3 not S905X3:

[    0.098998] soc soc0: Amlogic Meson SM1 (S905D3) Revision 2b:c (b0:2) Detected

Change from v1: use 0xf0 mask instead of 0xf2 as advised by Neil Armstrong.

Fixes: 1d7c541b8a ("soc: amlogic: meson-gx-socinfo: Add S905X3 ID for VIM3L")

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-11-06 11:12:58 -08:00
Christian Hewitt
1d7c541b8a soc: amlogic: meson-gx-socinfo: Add S905X3 ID for VIM3L
VIM3L appears to use a different ID:

[    0.086470] soc soc0: Amlogic Meson SM1 (S905X3) Revision 2b:c (b0:2) Detected

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-10-07 11:13:15 -07:00
Jianxin Pan
240051cb83 soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs
Add the SoC IDs for the A113L Amlogic A1 SoC.

Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-10-07 11:13:06 -07:00
Neil Armstrong
eef3c2ba0a soc: amlogic: Add support for Everything-Else power domains controller
Add support for the General Purpose Amlogic Everything-Else Power controller,
with the first support for G12A and SM1 SoCs dedicated to the VPU, PCIe,
USB, NNA, GE2D and Ethernet Power Domains.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-28 14:29:37 -07:00
Nishka Dasgupta
49ed86f503 soc: amlogic: meson-gx-socinfo: Add of_node_put() before return
The variable np in function meson_gx_socinfo_init takes the return value
of of_find_compatible_node, which gets a node but does not put it. If
this node is not put it may cause a memory leak. Hence put np after its
usefulness has been exhausted.
Issue found with Coccinelle.

Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Fixes: a9daaba296 ("soc: Add Amlogic SoC Information driver")
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-20 14:53:33 -07:00
Neil Armstrong
623699711a soc: amlogic: clk-measure: Add support for SM1
Add the clk-measurer clocks IDs for the Amlogic SM1 SoC family.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-20 12:21:13 -07:00
Neil Armstrong
c9cc9bec36 soc: amlogic: meson-gx-socinfo: Add SM1 and S905X3 IDs
Add the SoC IDs for the S905X3 Amlogic SM1 SoC.

Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-20 08:32:58 -07:00
Christian Hewitt
0baf212eab soc: amlogic: meson-gx-socinfo: add A311D id
Add the SoC ID for the A311D Amlogic SoC.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-05 14:47:21 -07:00
Neil Armstrong
c33b2777d0 soc: amlogic: meson-clk-measure: add G12B second cluster cpu clk
Add the G12B second CPU cluster CPU and SYS_PLL measure IDs.

These IDs returns 0Hz on G12A.

Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-05 13:40:06 -07:00
Neil Armstrong
3a760d9865 soc: amlogic: meson-clk-measure: protect measure with a mutex
In order to protect clock measuring when multiple process asks for
a measure, protect the main measure function with mutexes.

Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-05 13:39:55 -07:00
Olof Johansson
71a34b7cc7 soc: Amlogic driver updates for v5.3
- canvas: add support for Meson8*
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl0L8yEACgkQWTcYmtP7
 xmXffA//XLMUCP7G+WWtcmui5J8zn09ePyLUSiohP+1OR5IxmsBP/Ojq5Vt/m/eN
 PrjDsi1aV3sw5tJ/V+fpB2z+ZwNoSTycsgCllXpRkJHQEUTF/tRc5TGSyktJOP9s
 LsjQ2ZLMDUWPnAlB4t8FCejHXl5ozPgXVCwyRqsXM2bLvkH71U/w2F8LBb8mayX4
 4XN6NdekyHGKUXfL3+NDWr6Frvn5l0CWL9zqnlvAaTIMwKppS0aOzIdk/tjKCPx1
 h4WONctwybPJRv/sQWlZrV7i2838+MRxEqdtVAE509E+8VJUPUI9znewXHFdwGS2
 NnT2LKpsdpbmeX9haeKNwP0Im/PHDU0jpaBBGFqYHKWgkvyykHnk23x4U41jQ6vn
 6MFS7G+u37NXxBRZJqkWfgOjWqJMea8r/dx6eBps3MfQSNrcv0z6mVHZqk5YXPC7
 n8vm5BoTSEFh4Ja8GkH6QaEUTZn7nsawXSzq16yYS1uj63cakmoOO06xGBuVnZNJ
 qbPIGA0Mo/4eBM67mszepPJBGCt8Y3pUVKuV8CAzxw2fWutTCdc7BjKkbzicKmQN
 6WFZ3PPz+rQS/uJF1CLJ8AsNfCZfSnaQg8g8kBSK9y2/5EwNa+mmy5WO8Lyx2i8B
 0Gt4yC7zkRrKV5fHqONoNzFydrYZtQIz0dI3gOU0GtQuyb0t1LA=
 =NrZO
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers

soc: Amlogic driver updates for v5.3
- canvas: add support for Meson8*

* tag 'amlogic-drivers' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  soc: amlogic: canvas: add support for Meson8, Meson8b and Meson8m2
  dt-bindings: soc: amlogic: canvas: document support for Meson8/8b/8m2

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25 05:40:57 -07:00
Martin Blumenstingl
9a98fdf5b6 soc: amlogic: canvas: add support for Meson8, Meson8b and Meson8m2
The canvas IP on Meson8, Meson8b and Meson8m2 is mostly identical to the
one on GXBB and newer. The only known difference so far is that that the
"endianness" bits are not supported on Meson8m2 and earlier.

Add new compatible strings and a check in meson_canvas_config() to
validate that the endianness bits cannot be configured on the 32-bit
SoCs.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-05-22 18:19:14 -07:00
Thomas Gleixner
ec8f24b7fa treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 10:50:46 +02:00
Neil Armstrong
bb1dca3a39 soc: amlogic: meson-gx-pwrc-vpu: Add support for G12A
The Amlogic G12A SoC has a very similar VPU Power Controller setup
than the older GXBB, GXL & GXm SoCs.

This patch adds the variant support for G12A.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-16 11:09:53 -07:00
Neil Armstrong
2fe3b4bbc9 soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmask
The register bitmask to power on/off the VPU memories was incorectly set
to 0x2 instead of 0x3. While still working, let's use the recommended
vendor value instead.

Fixes: 75fcb5ca4b ("soc: amlogic: add Meson GX VPU Domains driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-16 11:09:17 -07:00
Julia Lawall
fdda0a6adc meson-gx-socinfo: add missing of_node_put after of_device_is_available
Add an of_node_put when a tested device node is not available.

The semantic patch that fixes this problem is as follows
(http://coccinelle.lip6.fr):

// <smpl>
@@
identifier f;
local idexpression e;
expression x;
@@

e = f(...);
... when != of_node_put(e)
    when != x = e
    when != e = x
    when any
if (<+...of_device_is_available(e)...+>) {
  ... when != of_node_put(e)
(
  return e;
|
+ of_node_put(e);
  return ...;
)
}
// </smpl>

Fixes: a9daaba296 ("soc: Add Amlogic SoC Information driver")
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-03-18 09:07:32 -07:00
Neil Armstrong
65f80df58e soc: amlogic: gx-socinfo: Add new SoC IDs and Packages IDs
This adds the:
- G12A SoC ID and S905X2, S905D2 package IDs, found booting the
  X96 Max and U200 Reference Board
- G12B SoC ID and S922X package ID, found booting the Odroid-N2
- S805X, S805Y package IDs found in the vendor U-Boot source

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-03-18 09:07:32 -07:00
Neil Armstrong
dce47aed20 soc: amlogic: gx-socinfo: Add mask for each SoC packages
When updated IDs on f842c41adc ("amlogic: meson-gx-socinfo: Update soc ids")
we introduced packages ids using the full 8bit value, but in the function
socinfo_to_package_id() the id was filtered with the 0xf0 mask.

While the 0xf0 mask is valid for most board, it filters out the lower
4 bits which encodes some characteristics of the chip.

This patch moves the mask into the meson_gx_package_id table to be applied
on each package name independently and add the correct mask for some
specific entries.

An example is the S905, in the vendor code the S905 is package_id
different from 0x20, and S905M is exactly 0x20.

Another example are the The Wetek Hub & Play2 boards using a S905-H
variant, which is the S905 SoC with some licence bits enabled.
These licence bits are encoded in the lower 4bits, so to detect
the -H variant, we must detect the id == 0x3 with the 0xf mask.

Fixes: f842c41adc ("amlogic: meson-gx-socinfo: Update soc ids")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-03-18 09:07:31 -07:00
Jerome Brunet
19e0bde7bf soc: amlogic: clk-measure: add axg and g12a support
Add support for the axg and g12a SoC family in amlogic clk measure

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
[khilman: squashed some fixups from Martin]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-02-07 16:50:36 -08:00
Neil Armstrong
382f8be045 soc: amlogic: canvas: Fix meson_canvas_get when probe failed
When probe fails, a platforn_device is still associated to the node,
but dev_get_drvdata() returns NULL.

Handle this case by returning a consistent error.

Fixes: d4983983d9 ("soc: amlogic: add meson-canvas driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Maxime Jourdan <mjourdan@baylibre.com>
[khilman: fixed minor typo in comment ]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-02-07 16:31:30 -08:00
wen yang
99e5a8df8b soc: amlogic: add missing of_node_put()
The call to of_parse_phandle returns a node pointer with refcount
incremented thus it must be explicitly decremented here after the last
usage.

Signed-off-by: Wen Yang <yellowriver2010@hotmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Fixes: d4983983d9 ("soc: amlogic: add meson-canvas driver")
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-02-06 20:03:02 -08:00
Corentin Labbe
f56c06271c soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency
This patchs adds a missing dependency on REGMAP_MMIO.
This cause the following build failure on SPARC:
drivers/soc/amlogic/meson-clk-measure.o: In function `meson_msr_probe':
meson-clk-measure.c:(.text+0xc4): undefined reference to `__devm_regmap_init_mmio_clk'

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-12-10 12:16:22 -08:00
Neil Armstrong
2b45ebef39 soc: amlogic: Add Meson Clock Measure driver
The Amlogic Meson SoCs embeds a clock measurer IP to measure the internal
clock paths frequencies.
The precision is determined by stepping into the duration until the counter
overflows.
The debugfs slows a pretty summary and each clock can be measured
individually aswell.

Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-11-28 16:55:35 -08:00
Maxime Jourdan
d4983983d9 soc: amlogic: add meson-canvas driver
Amlogic SoCs have a repository of 256 canvas which they use to
describe pixel buffers.

They contain metadata like width, height, block mode, endianness [..]

Many IPs within those SoCs like vdec/vpu rely on those canvas to read/write
pixels.

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-12 21:38:45 -07:00
Neil Armstrong
f842c41adc amlogic: meson-gx-socinfo: Update soc ids
Updates the Amlogic Meson SoCs IDs for the Armv8 based SoCs.
It includes the new families and packages.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-03-19 16:40:26 -07:00
weiyongjun (A)
01517dfc81 meson-gx-socinfo: make local function meson_gx_socinfo_init static
Fixes the following sparse warnings:

drivers/soc/amlogic/meson-gx-socinfo.c💯12: warning:
 symbol 'meson_gx_socinfo_init' was not declared. Should it be static?

Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-12 14:15:47 -08:00
weiyongjun (A)
82a759c918 meson-mx-socinfo: Make local function meson_mx_socinfo_init() static
Fixes the following sparse warnings:

drivers/soc/amlogic/meson-mx-socinfo.c:107:12: warning:
 symbol 'meson_mx_socinfo_init' was not declared. Should it be static?

Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-12 14:15:47 -08:00
Heiner Kallweit
87f88732d2 soc: amlogic: meson-gx-pwrc-vpu: fix error on shutdown when domain is powered off
When operating the system headless headless, the domain is never
powered on, leaving the clocks disabled. The shutdown function then
tries to disable the already disabled clocks, resulting in errors.
Therefore call meson_gx_pwrc_vpu_power_off() only if domain is
powered on.
This patch fixes the described issue on my system (Odorid-C2).

Fixes: 339cd0ea08 "soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader"
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-12 14:15:46 -08:00
Heiner Kallweit
3a2ad7bd31 soc: amlogic: meson-gx-pwrc-vpu: don't print error message on probe deferral
The error message may be misleading in case of probe deferral
(happens on my Odroid-C2). Therefore don't print it in this case.

Fixes: 75fcb5ca4b "soc: amlogic: add Meson GX VPU Domains driver"
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-12 14:15:46 -08:00
Arnaud Patard
044d71bc6c meson-gx-socinfo: Fix package id parsing
I've noticed the following message while booting a S905X based board:

soc soc0: Amlogic Meson GXL (S905D) Revision 21:82 (b:2) Detected

The S905D string is obviously wrong. The vendor code does:
...
        ver = (readl(assist_hw_rev) >> 8) & 0xff;
        meson_cpu_version[MESON_CPU_VERSION_LVL_MINOR] = ver;
        ver =  (readl(assist_hw_rev) >> 16) & 0xff;
        meson_cpu_version[MESON_CPU_VERSION_LVL_PACK] = ver;
...

while the current code does:
...
...

This means that the current mainline code has package id and minor
version reversed.

Fixes: a9daaba296 ("soc: Add Amlogic SoC Information driver")
Signed-off-by: Arnaud Patard <apatard@hupstream.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-11-30 15:29:44 -08:00