Commit Graph

13 Commits

Author SHA1 Message Date
Archit Taneja
392ae6e0ef drm/msm/mdp5: Remove old kms init/destroy funcs
With the new kms_init/destroy funcs in place for MDP5, we can get rid of
the old kms funcs. Some members of the mdp5_kms struct also become
redundant, so we remove those too.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-16 10:08:57 -04:00
Archit Taneja
aec095ecbc drm/msm/mdp5: Prepare new kms_init funcs
With MDP5 as a new device, we need to do less for MDP when initializing
modeset after all the components are bound.

Create mdp5_kms_init2/destroy2 funcs that inits modeset. These will
eventually replace the older kms_init/destroy funcs.

In the new kms_init2, the platform_device used is the one corresponding
to the new MDP5 platform_device. The new change here is that the irq is
now retrieved using irq_of_parse_and_map(), since MDP5 is a child interrupt
of the MDSS interrupt controller.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-16 10:08:56 -04:00
Archit Taneja
990a40079a drm/msm/mdp5: Add MDSS top level driver
SoCs that contain MDP5 have a top level wrapper called MDSS that manages
clocks, power and irq for the sub-blocks within it.

Currently, the MDSS portions are stuffed into the MDP5 driver. This makes
it hard to represent the DT bindings in the correct way. We create a top
level MDSS helper that handles these parts. This is essentially moving out
some of the mdp5_kms irq code and MDSS register space and keeping it as a
separate entity. We haven't given any clocks to the top level MDSS yet,
but a AHB clock would be added in the future to access registers.

One thing to note is that the resources allocated by this helper are
tied to the top level platform_device (the one that allocates the
drm_device struct too). This device would be the parent to MDSS
sub-blocks like MDP5, DSI, eDP etc.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-16 10:08:51 -04:00
Archit Taneja
a2b3a5571f drm/msm: Get irq number within kms driver itself
The driver gets the irq number using platform_get_irq on the main kms
platform device. This works fine since both MDP4 and MDP5 currently
have a flat device hierarchy. The platform device tied with the
drm_device points to the MDP DT node in both cases.

This won't work when MDP5 supports a tree-like hierarchy. In this
case, the platform device tied to the top level drm_device is the
MDSS DT node, and the irq we need for KMS is the one generated by
MDP5, not MDSS.

Get the irq number from the MDP4/5 kms driver itself. Each driver
can later provide the irq number based on what device hierarchy it
uses.

While we're at it, call drm_irq_install only when we have a valid KMS
driver.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-16 10:08:50 -04:00
Archit Taneja
7429d860c1 drm/msm: Remove unused fields
These aren't used. Probably left overs when driver was refactored to
support both MDP4 and MDP5.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-16 10:08:50 -04:00
Rob Clark
4016260ba4 drm/msm: fix bug after preclose removal
commit 53190c7194
Author:     Daniel Vetter <daniel.vetter@ffwll.ch>
AuthorDate: Mon Jan 25 22:16:49 2016 +0100
Commit:     Daniel Vetter <daniel.vetter@ffwll.ch>
CommitDate: Mon Feb 8 09:55:50 2016 +0100

    drm/msm: Nuke preclose hooks

Left around the unused (and null) preclose fxn ptr, and things
predictibly explode when you try to call that.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-23 18:15:49 -04:00
Hai Li
0a5c9aad11 drm/msm: Use customized function to wait for atomic commit done
MDP FLUSH registers could indicate if the previous flush updates
has taken effect at vsync boundary. Making use of this H/W feature
can catch the vsync that happened between CRTC atomic_flush and
*_wait_for_vblanks, to avoid unnecessary wait.

This change allows kms CRTCs to use their own *_wait_for_commit_done
functions to wait for FLUSH register cleared at vsync, before commit
completion.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:04 -04:00
Hai Li
7a6dc9550d drm/msm: Add split display interface
This change is to add an interface to MDP for connector devices
setting split display information.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-04-01 19:29:37 -04:00
Stephane Viau
7ca12718b3 drm/msm/mdp: add common YUV information for MDP4/MDP5
Both MDP4 and MDP5 share some code as far as YUV support is
concerned. This change adds this information and will be followed
by the actual MDP4 and MDP5 YUV support patches.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-02-01 15:30:34 -05:00
Rob Clark
0b776d457b drm/msm: fix fallout of atomic dpms changes
As a result of atomic DPMS support, the various prepare/commit hooks get
called in a way that msm dislikes.  We were expecting prepare/commit to
bracket a modeset, which is no longer the case.  This was needed to hold
various extra clk's (such as interface clks) on while we are touching
registers, and in the case of mdp4 holding vblank enabled.

The most straightforward way to deal with this, since we already have
our own atomic_commit(), is to just handle prepare/commit internally to
the driver (with some additional vfuncs for mdp4 vs mdp5), and switch
everything over to instead use the new enable/disable hooks.  It doesn't
really change too much, despite the code motion.  What used to be in the
encoder/crtc dpms() fxns is split out into enable/disable.

We should be able to drop our own enable-state tracking, as the atomic
helpers should do this for us.  But keeping that for the short term for
extra debugging as atomic stablizes.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-02-01 15:17:32 -05:00
Rob Clark
06c0dd96bf drm/msm: add mdp5/apq8x74
Add support for the new MDP5 display controller block.  The mapping
between parts of the display controller and KMS is:

  plane   -> PIPE{RGBn,VIGn}             \
  crtc    -> LM (layer mixer)            |-> MDP "device"
  encoder -> INTF                        /
  connector -> HDMI/DSI/eDP/etc          --> other device(s)

Unlike MDP4, it appears we can get by with a single encoder, rather
than needing a different implementation for DTV, DSI, etc.  (Ie. the
register interface is same, just different bases.)

Also unlike MDP4, all the IRQs for other blocks (HDMI, DSI, etc) are
routed through MDP.

And finally, MDP5 has this "Shared Memory Pool" (called "SMP"), from
which blocks need to be allocated to the active pipes based on fetch
stride.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-01-09 14:44:06 -05:00
Rob Clark
9e0efa6356 drm/msm: move irq utils to mdp_kms
We'll want basically the same thing for mdp5, so refactor it out so it
can be shared.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-01-09 14:44:05 -05:00
Rob Clark
dd2da6e346 drm/msm: split out msm_kms.h
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-01-09 14:44:04 -05:00