mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-18 01:34:14 +08:00
08fd8c1768
1492 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Fabio Estevam
|
20c15226d1 |
ARM: imx6ul: Fix Micrel PHY mask
The value used for Micrel PHY mask is not correct. Use the
MICREL_PHY_ID_MASK definition instead.
Thanks to Jiri Luznicky for proposing the fix at
https://community.freescale.com/thread/387739
Cc: <stable@vger.kernel.org>
Fixes:
|
||
Linus Torvalds
|
9896c7b57e |
ARM: SoC platform updates for v4.7
We get support for three new 32-bit SoC platforms this time. The amount of changes in arch/arm for any of them is miniscule, as all the interesting code is in device driver subsystems (irqchip, clk, pinctrl, ...) these days. I'm listing them here, as the addition of the Kconfig statement is the main relevant milestone for a new platform. In each case, some drivers are are shared with existing platforms, while other drivers are added for v4.7 as well, or come in a later release. - The Aspeed platform is probably the most interesting one, this is what most whitebox servers use as their baseboard management controller. We get support for the very common ast2400 and ast2500 SoCs. The OpenBMC project focuses on this chip, and the LWN article about their ELC 2016 presentation at https://lwn.net/Articles/683320/ triggered the submission, but the code comes from IBM's OpenPOWER team rather than the team at Facebook. There are still a lot more drivers that need to get added over time, and I hope both teams can work together on that. - OXNAS is an old platform for Network Attached Storage devices from Oxford Semiconductor. There are models with ARM10 (!) and ARM11MPCore cores, but for now, we only support the original ARM9 based versions. The product lineup was subsequently part of PLX, Avago and now the new Broadcom Ltd. https://wiki.openwrt.org/doc/hardware/soc/soc.oxnas has some more information. - V2M-MPS2 is a prototyping platform from ARM for their Cortex-M cores and is related to the existing Realview / Versatile Express lineup, but without MMU. We now support various NOMMU platforms, so adding a new one is fairly straightforward. http://infocenter.arm.com/help/topic/com.arm.doc.100112_0100_03_en/ has detailed information about the platform. Other noteworthy updates: - Work on LPC32xx has resumed, and Vladimir Zapolskiy and Sylvain Lemieux are now maintaining the platform. This is an older ARM9 based platform from NXP (not Freescale), but it remains in use in embedded markets. - Kevin Hilman is now co-maintaining the Amlogic Meson platform for both 32-bit and 64-bit ARM, and started contributing some patches. - As is often the case, work on the OMAP platforms makes up the bulk of the actual SoC code changes in arch/arm, but there isn't a lot of that either. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAVzuXX2CrR//JCVInAQLTghAA0f+2V2wC6HVBfDhT1YmhbAkPF1KzgLbB h30fN6BtIe9mE3kR69uWgwPSzn4hTKEQXoC9m6S+XClTn6MKPrbCEYDZl4ZwIER8 XDamxJV+6oTG+GKtKpHFkC4WPJkLthEuD34gr2xU8DFrU+y2Y5QNXi5wvSsBp8WS 6C/70HQEy35uSyOjbjVlPi0/UKoelVw9dCO7HZBOb9lTd88hC4Gx90KFwpq6Ievf L20VNgOESC2y6kRbuLNbhQVsbT2Ijyz9NccVM5owFEbHkXDxJ0vQVzrNM999DVjb CC2v0NZMLPNJQn2RvC172QBOsOERxIRkZdJHcifydl7i2QNpr8+/YSnS7OSx3dA/ 3ZmTLejaiGUXdTGEI9dHy77s+adwTzGsH+INKotQG8qwUXzCLuUWN3GGK+Qof5Rk jbsGAoZ7GQz1/7NdEOcGW6pxD4mllk3McKMzNlMmddRDUPhSUg3WXu0c1AWGzfA1 ulk6fQDaTUjvs7nokuozhguKz8OKrT6S7x/iES5tPbXLhuDqfnUdYiQ+7m2beRb5 L9S9KK95HXnKJAI9WLOELj1vCrfbCGjlwz8YVSrwPtwwzP/wbB1Ni6tmwLrxHbLk SGyJEMnPs3mARIPDwDysyOs+3OUSx04uYW6YTSh8XyKNIxTCflRxr/iM5YyYEMvt lXMrp1sh4hc= =5oFu -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "We get support for three new 32-bit SoC platforms this time. The amount of changes in arch/arm for any of them is miniscule, as all the interesting code is in device driver subsystems (irqchip, clk, pinctrl, ...) these days. I'm listing them here, as the addition of the Kconfig statement is the main relevant milestone for a new platform. In each case, some drivers are are shared with existing platforms, while other drivers are added for v4.7 as well, or come in a later release. - The Aspeed platform is probably the most interesting one, this is what most whitebox servers use as their baseboard management controller. We get support for the very common ast2400 and ast2500 SoCs. The OpenBMC project focuses on this chip, and the LWN article about their ELC 2016 presentation at https://lwn.net/Articles/683320/ triggered the submission, but the code comes from IBM's OpenPOWER team rather than the team at Facebook. There are still a lot more drivers that need to get added over time, and I hope both teams can work together on that. - OXNAS is an old platform for Network Attached Storage devices from Oxford Semiconductor. There are models with ARM10 (!) and ARM11MPCore cores, but for now, we only support the original ARM9 based versions. The product lineup was subsequently part of PLX, Avago and now the new Broadcom Ltd. https://wiki.openwrt.org/doc/hardware/soc/soc.oxnas has some more information. - V2M-MPS2 is a prototyping platform from ARM for their Cortex-M cores and is related to the existing Realview / Versatile Express lineup, but without MMU. We now support various NOMMU platforms, so adding a new one is fairly straightforward. http://infocenter.arm.com/help/topic/com.arm.doc.100112_0100_03_en/ has detailed information about the platform. Other noteworthy updates: - Work on LPC32xx has resumed, and Vladimir Zapolskiy and Sylvain Lemieux are now maintaining the platform. This is an older ARM9 based platform from NXP (not Freescale), but it remains in use in embedded markets. - Kevin Hilman is now co-maintaining the Amlogic Meson platform for both 32-bit and 64-bit ARM, and started contributing some patches. - As is often the case, work on the OMAP platforms makes up the bulk of the actual SoC code changes in arch/arm, but there isn't a lot of that either" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (42 commits) MAINTAINERS: ARM/Amlogic: add co-maintainer, misc. updates MAINTAINERS: add ARM/NXP LPC32XX SoC specific drivers to the section MAINTAINERS: add new maintainers of NXP LPC32xx SoC MAINTAINERS: move ARM/NXP LPC32xx record to ARM section arm: Add Aspeed machine ARM: lpc32xx: remove duplicate const on lpc32xx_auxdata_lookup ARM: lpc32xx: remove leftovers of legacy clock source and provider drivers ARM: lpc32xx: remove reboot header file ARM: dove: Remove CLK_IS_ROOT ARM: orion5x: Remove CLK_IS_ROOT ARM: mv78xx0: Remove CLK_IS_ROOT ARM: davinci: da850: use clk->set_parent for async3 ARM: davinci: Move clock init after ioremap. MAINTAINERS: Update ARM Versatile Express platform entry ARM: vexpress/mps2: introduce MPS2 platform MAINTAINERS: add maintainer entry for ARM/OXNAS platform ARM: Add new mach-oxnas irqchip: versatile-fpga: add new compatible for OX810SE SoC ARM: uniphier: correct the call order of of_node_put() MAINTAINERS: fix stale TI DaVinci entries ... |
||
Rafael J. Wysocki
|
c47b3bd0d3 |
Merge branch 'pm-cpufreq'
* pm-cpufreq: (63 commits)
intel_pstate: Clean up get_target_pstate_use_performance()
intel_pstate: Use sample.core_avg_perf in get_avg_pstate()
intel_pstate: Clarify average performance computation
intel_pstate: Avoid unnecessary synchronize_sched() during initialization
cpufreq: schedutil: Make default depend on CONFIG_SMP
cpufreq: powernv: del_timer_sync when global and local pstate are equal
cpufreq: powernv: Move smp_call_function_any() out of irq safe block
intel_pstate: Clean up intel_pstate_get()
cpufreq: schedutil: Make it depend on CONFIG_SMP
cpufreq: governor: Fix handling of special cases in dbs_update()
cpufreq: intel_pstate: Ignore _PPC processing under HWP
cpufreq: arm_big_little: use generic OPP functions for {init, free}_opp_table
cpufreq: tango: Use generic platdev driver
cpufreq: Fix GOV_LIMITS handling for the userspace governor
cpufreq: mvebu: Move cpufreq code into drivers/cpufreq/
cpufreq: dt: Kill platform-data
mvebu: Use dev_pm_opp_set_sharing_cpus() to mark OPP tables as shared
cpufreq: dt: Identify cpu-sharing for platforms without operating-points-v2
cpufreq: governor: Change confusing struct field and variable names
cpufreq: intel_pstate: Enable PPC enforcement for servers
...
|
||
Viresh Kumar
|
7ead83f6df |
cpufreq: imx: Use generic platdev driver
The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform device now, reuse that and remove similar code from platform code. Note that the complete routine imx27_dt_init() is removed as of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); has same effect as a NULL .init_machine machine callback pointer. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
||
Alexander Kurz
|
fc26fe9c38 |
ARM: mach-imx: sdhci-esdhc-imx: initialize DMA mask
With commit
|
||
Sebastian Andrzej Siewior
|
acc98009b8 |
ARM: imx: always use TWD on IMX6Q
There is no reason to limit the TWD to be used on SMP kernels only if the hardware has it available. On Wandboard i.MX6SOLO, running PREEMPT-RT and cyclictest I see as max immediately after start in idle: UP : ~90us SMP: ~50us UP + TWD: ~20us. Based on this numbers I prefer the TWD over the slightly slower MXC timer. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
|
Linus Torvalds
|
33b3d2e88c |
ARM: SoC platform updates for v4.6
Newly added support for additional SoCs:
- Axis Artpec-6 SoC family
- Allwinner A83T SoC
- Mediatek MT7623
- NXP i.MX6QP SoC
- ST Microelectronics stm32f469 microcontroller
New features:
- SMP support for Mediatek mt2701
- Big-endian support for NXP i.MX
- DaVinci now uses the new DMA engine dma_slave_map
- OMAP now uses the new DMA engine dma_slave_map
- earlyprintk support for palmchip uart on mach-tango
- delay timer support for orion
Other:
- Exynos PMU driver moved out to drivers/soc/
- Various smaller updates for Renesas, Xilinx, PXA, AT91, OMAP, uniphier
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVu68DGCrR//JCVInAQIHVQ//Wblms+NKj3aKh6m2Sscs/YkSbFaQ4sY2
rNyfxLIYsLXkth1kbdHRFSMyL68Ym+xutErgw/3HQPB2D1YtYJE3VJ/y8AU92SU3
oHyQIty+atB8d8zBbtlkWmat94NIfYf0I8PQETreGb1LMaJqAf0mDEDAyorTLZcZ
UtQ817Ihn7urqwdTJpTO58V41RmY/vflbHI5T6bIjUJn6fF1e/7+VqtMIfq5sjJ6
0EPEQdu8s5AJ7gcGlGi9I5gAtSnWSA/9phAxul9P8/HrMpUWIxreSEAy8FY7W14F
4TON3sQrnw7nyA72U80KGIXhgLy7SbEmHcSqyy4YJK3ycdk6VYk0CBO7nWVYAiD1
knLisOH6jwe0LIj9WXiRR+Y2Q53pXN8SF77pLDahSnvuShnYEjEH5uELHtxe7Vxh
gn+NH1rDkRTgdYgt4RWlVyUoLkddQWzLb1m4QyQlvxtTR25cJJayXdVX2MRrNPF5
c1zRa9HH+b8LJQIMdWfo/NoHhHtftkkGGsqHAAaypZqdpyk0j2HpJYk5ecPR4f5C
/8o/h/5xOI9gEzp/DVYSZ1VAvRqBQGIDfKBXWq6GuoZaF0aN8ISe5IxFn5Yx2F46
fNaxqiNpWmyywl8D+tSWPFK6aE21AXKGi5zIzexZZqy283aDjlUPI+tgF2GKIuKP
3ayYTDeBpLI=
=ynNj
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"Newly added support for additional SoCs:
- Axis Artpec-6 SoC family
- Allwinner A83T SoC
- Mediatek MT7623
- NXP i.MX6QP SoC
- ST Microelectronics stm32f469 microcontroller
New features:
- SMP support for Mediatek mt2701
- Big-endian support for NXP i.MX
- DaVinci now uses the new DMA engine dma_slave_map
- OMAP now uses the new DMA engine dma_slave_map
- earlyprintk support for palmchip uart on mach-tango
- delay timer support for orion
Other:
- Exynos PMU driver moved out to drivers/soc/
- Various smaller updates for Renesas, Xilinx, PXA, AT91, OMAP,
uniphier"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
ARM: uniphier: rework SMP code to support new System Bus binding
ARM: uniphier: add missing of_node_put()
ARM: at91: avoid defining CONFIG_* symbols in source code
ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1
ARM: imx: Make reset_control_ops const
ARM: imx: Do L2 errata only if the L2 cache isn't enabled
ARM: imx: select ARM_CPU_SUSPEND only for imx6
dmaengine: pxa_dma: fix the maximum requestor line
ARM: alpine: select the Alpine MSI controller driver
ARM: pxa: add the number of DMA requestor lines
dmaengine: mmp-pdma: add number of requestors
dma: mmp_pdma: Add the #dma-requests DT property documentation
ARM: OMAP2+: Add rtc hwmod configuration for ti81xx
ARM: s3c24xx: Avoid warning for inb/outb
ARM: zynq: Move early printk virtual address to vmalloc area
ARM: DRA7: hwmod: Add custom reset handler for PCIeSS
ARM: SAMSUNG: Remove unused register offset definition
ARM: EXYNOS: Cleanup header files inclusion
drivers: soc: samsung: Enable COMPILE_TEST
MAINTAINERS: Add maintainers entry for drivers/soc/samsung
...
|
||
|
Linus Torvalds
|
1a46712aa9 |
This is the bulk of GPIO changes for kernel v4.6:
Core changes:
- The gpio_chip is now a *real device*. Until now the gpio chips
were just piggybacking the parent device or (gasp) floating in
space outside of the device model. We now finally make GPIO chips
devices. The gpio_chip will create a gpio_device which contains
a struct device, and this gpio_device struct is kept private.
Anything that needs to be kept private from the rest of the kernel
will gradually be moved over to the gpio_device.
- As a result of making the gpio_device a real device, we have added
resource management, so devm_gpiochip_add_data() will cut down on
overhead and reduce code lines. A huge slew of patches convert
almost all drivers in the subsystem to use this.
- Building on making the GPIO a real device, we add the first step
of a new userspace ABI: the GPIO character device. We take small
steps here, so we first add a pure *information* ABI and the tool
"lsgpio" that will list all GPIO devices on the system and all
lines on these devices. We can now discover GPIOs properly from
userspace. We still have not come up with a way to actually *use*
GPIOs from userspace.
- To encourage people to use the character device for the future,
we have it always-enabled when using GPIO. The old sysfs ABI is
still opt-in (and can be used in parallel), but is marked as
deprecated. We will keep it around for the foreseeable future,
but it will not be extended to cover ever more use cases.
Cleanup:
- Bjorn Helgaas removed a whole slew of per-architecture <asm/gpio.h>
includes. This dates back to when GPIO was an opt-in feature and
no shared library even existed: just a header file with proper
prototypes was provided and all semantics were up to the arch to
implement. These patches make the GPIO chip even more a proper
device and cleans out leftovers of the old in-kernel API here
and there. Still some cruft is left but it's very little now.
- There is still some clamping of return values for .get() going
on, but we now return sane values in the vast majority of drivers
and the errorpath is sanitized. Some patches for powerpc, blackfin
and unicore still drop in.
- We continue to switch the ARM, MIPS, blackfin, m68k local GPIO
implementations to use gpiochip_add_data() and cut down on code
lines.
- MPC8xxx is converted to use the generic GPIO helpers.
- ATH79 is converted to use the generic GPIO helpers.
New drivers:
- WinSystems WS16C48
- Acces 104-DIO-48E
- F81866 (a F7188x variant)
- Qoric (a MPC8xxx variant)
- TS-4800
- SPI serializers (pisosr): simple 74xx shift registers connected
to SPI to obtain a dirt-cheap output-only GPIO expander.
- Texas Instruments TPIC2810
- Texas Instruments TPS65218
- Texas Instruments TPS65912
- X-Gene (ARM64) standby GPIO controller
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW6m24AAoJEEEQszewGV1zUasP/RpTrjRcNI5QFHjudd2oioDx
R/IljC06Q072ZqVy/MR7QxwhoU8jUnCgKgv4rgMa1OcfHblxC2R1+YBKOUSij831
E+SYmYDYmoMhN7j5Aslr66MXg1rLdFSdCZWemuyNruAK8bx6cTE1AWS8AELQzzTn
Re/CPpCDbujLy0ZK2wJHgr9ZkdcBGICtDRCrOR3Kyjpwk/DSZcruK1PDN+VQMI3k
bJlwgtGenOHINgCq/16edpwj/hzmoJXhTOZXJHI5XVR6czTwb3SvCYACvCkauI/a
/N7b3quG88b5y0OPQPVxp5+VVl9GyVcv5oGzIfTNat/g5QinShZIT4kVV9r0xu6/
TQHh1HlXleh+QI3yX0oRv9ztHreMf+vdpw1dhIwLqHqfJ7AWdOGk7BbKjwCrsOoq
t/qUVFnyvooLpyr53Z5JY8+LqyynHF68G+jUQyHLgTZ0GCE+z+1jqNl1T501n3kv
3CSlNYxSN/YUBN3cnroAIU/ZWcV4YRdxmOtEWP+7xgcdzTE6s/JHb2fuEfVHzWPf
mHWtJGy8U0IR4VSSEln5RtjhRr0PAjTHeTOGAmivUnaIGDziTowyUVF+X5hwC77E
DGTuLVx/Kniv173DK7xNAsUZNAETBa3fQZTgu+RfOpMiM1FZc7tI1rd7K7PjbyCc
d2M0gcq+d11ITJTxC7OM
=9AJ4
-----END PGP SIGNATURE-----
Merge tag 'gpio-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for kernel v4.6. There is quite a
lot of interesting stuff going on.
The patches to other subsystems and arch-wide are ACKed as far as
possible, though I consider things like per-arch <asm/gpio.h> as
essentially a part of the GPIO subsystem so it should not be needed.
Core changes:
- The gpio_chip is now a *real device*. Until now the gpio chips
were just piggybacking the parent device or (gasp) floating in
space outside of the device model.
We now finally make GPIO chips devices. The gpio_chip will create
a gpio_device which contains a struct device, and this gpio_device
struct is kept private. Anything that needs to be kept private
from the rest of the kernel will gradually be moved over to the
gpio_device.
- As a result of making the gpio_device a real device, we have added
resource management, so devm_gpiochip_add_data() will cut down on
overhead and reduce code lines. A huge slew of patches convert
almost all drivers in the subsystem to use this.
- Building on making the GPIO a real device, we add the first step of
a new userspace ABI: the GPIO character device. We take small
steps here, so we first add a pure *information* ABI and the tool
"lsgpio" that will list all GPIO devices on the system and all
lines on these devices.
We can now discover GPIOs properly from userspace. We still have
not come up with a way to actually *use* GPIOs from userspace.
- To encourage people to use the character device for the future, we
have it always-enabled when using GPIO. The old sysfs ABI is still
opt-in (and can be used in parallel), but is marked as deprecated.
We will keep it around for the foreseeable future, but it will not
be extended to cover ever more use cases.
Cleanup:
- Bjorn Helgaas removed a whole slew of per-architecture <asm/gpio.h>
includes.
This dates back to when GPIO was an opt-in feature and no shared
library even existed: just a header file with proper prototypes was
provided and all semantics were up to the arch to implement. These
patches make the GPIO chip even more a proper device and cleans out
leftovers of the old in-kernel API here and there.
Still some cruft is left but it's very little now.
- There is still some clamping of return values for .get() going on,
but we now return sane values in the vast majority of drivers and
the errorpath is sanitized. Some patches for powerpc, blackfin and
unicore still drop in.
- We continue to switch the ARM, MIPS, blackfin, m68k local GPIO
implementations to use gpiochip_add_data() and cut down on code
lines.
- MPC8xxx is converted to use the generic GPIO helpers.
- ATH79 is converted to use the generic GPIO helpers.
New drivers:
- WinSystems WS16C48
- Acces 104-DIO-48E
- F81866 (a F7188x variant)
- Qoric (a MPC8xxx variant)
- TS-4800
- SPI serializers (pisosr): simple 74xx shift registers connected to
SPI to obtain a dirt-cheap output-only GPIO expander.
- Texas Instruments TPIC2810
- Texas Instruments TPS65218
- Texas Instruments TPS65912
- X-Gene (ARM64) standby GPIO controller"
* tag 'gpio-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (194 commits)
Revert "Share upstreaming patches"
gpio: mcp23s08: Fix clearing of interrupt.
gpiolib: Fix comment referring to gpio_*() in gpiod_*()
gpio: pca953x: Fix pca953x_gpio_set_multiple() on 64-bit
gpio: xgene: Fix kconfig for standby GIPO contoller
gpio: Add generic serializer DT binding
gpio: uapi: use 0xB4 as ioctl() major
gpio: tps65912: fix bad merge
Revert "gpio: lp3943: Drop pin_used and lp3943_gpio_request/lp3943_gpio_free"
gpio: omap: drop dev field from gpio_bank structure
gpio: mpc8xxx: Slightly update the code for better readability
gpio: mpc8xxx: Remove *read_reg and *write_reg from struct mpc8xxx_gpio_chip
gpio: mpc8xxx: Fixup setting gpio direction output
gpio: mcp23s08: Add support for mcp23s18
dt-bindings: gpio: altera: Fix altr,interrupt-type property
gpio: add driver for MEN 16Z127 GPIO controller
gpio: lp3943: Drop pin_used and lp3943_gpio_request/lp3943_gpio_free
gpio: timberdale: Switch to devm_ioremap_resource()
gpio: ts4800: Add IMX51 dependency
gpiolib: rewrite gpiodev_add_to_list
...
|
||
Philipp Zabel
|
d2443b2e61 |
ARM: imx: Make reset_control_ops const
The imx_src_ops structure is never modified. Make it const. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
Dirk Behme
|
bc3d8ede3a |
ARM: imx: Do L2 errata only if the L2 cache isn't enabled
All the generic L2 cache handling code is encapsulated by a check if the L2 cache is enabled. If it's enabled already, the code is skipped. The write to the L2-Cache controller from non-secure world causes an imprecise external abort. This is needed in scenarios where one of the cores runs an other OS, e.g. an RTOS. For the i.MX6 specific L2 cache handling we missed this check. Add it. Signed-off-by: Marcel Grosshans <MarcelViktor.Grosshans@de.bosch.com> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
Arnd Bergmann
|
b4042a4c01 |
ARM: imx: select ARM_CPU_SUSPEND only for imx6
i.MX only needs to select ARM_CPU_SUSPEND manually for the
very specific case that CONFIG_PM_SLEEP is disabled and imx6
is used with CONFIG_PM enabled for runtime PM.
If we are building a kernel only for CPUs that are not using
the cpu_suspend() helper, we otherwise get a harmless
build warning:
warning: (ARCH_MXC && SOC_IMX23 && SOC_IMX28 && ARCH_PXA && MACH_MVEBU_V7 && ARCH_OMAP3 && ARCH_OMAP4 && SOC_OMAP5 && SOC_AM33XX && SOC_DRA7XX && ARCH_EXYNOS3 && ARCH_EXYNOS4 && EXYNOS5420_MCPM &&
EXYNOS_CPU_SUSPEND && ARCH_VEXPRESS_TC2_PM && ARM_BIG_LITTLE_CPUIDLE && ARM_HIGHBANK_CPUIDLE && QCOM_PM) selects ARM_CPU_SUSPEND which has unmet direct dependencies (ARCH_SUSPEND_POSSIBLE)
This moves the option to the SOC_IMX6 option that actually
requires it, in effect reverting commit
|
||
Linus Walleij
|
006a7f6ac2 |
ARM: imx: switch to gpiochip_add_data()
We're planning to remove the gpiochip_add() function to swith to gpiochip_add_data() with NULL for data argument. Cc: arm@kernel.org Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
||
Axel Haslam
|
eaa2d73ef9 |
ARM: imx6: pm: declare pm domain latency on power_state struct
The generic_pm_domain structure uses an array of latencies to be able to declare multiple intermediate states. Declare a single "OFF" state with the default latencies So that the power_off_latency_ns and power_on_latency_ns fields of generic_pm_domain structure can be eventually removed. [ Lina: pm_genpd_init() argument changev ] Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Axel Haslam <ahaslam+renesas@baylibre.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
||
|
Fabio Estevam
|
8c4300c227 |
ARM: mx25: Add basic suspend/resume support
Tested basic suspend/resume on a mx25pdk: $ echo enabled > /sys/class/tty/ttymxc0/power/wakeup $ echo mem > /sys/power/state Then press any key in the serial console and the system wakes up. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
Bai Ping
|
c5a890a445 |
ARM: imx: Add msl code support for imx6qp
The i.MX6QP is a different SOC, but internally we treate it as i.MX6Q Rev_2.0 to maximum the code reusability. The chip silicon number we read from the ANADIG_DIGPROG is 0x630100. This patch add code to identify it as i.MX6QP Rev_1.0 when print out the silicon version. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
Johannes Berg
|
26e30c6489 |
ARM: imx: enable big endian mode
Enable ARM big-endian mode on mach-imx. This requires adding some byte swapping in the debug functions (which otherwise hang forever) and of course the secondary core bringup. Tested (on top of 4.4) on i.MX6 HummingBoard quad-core (IMX6Q). The patch is pretty much as suggested by Arnd Bergmann, thanks! Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
|
Johannes Berg
|
c553138fbd |
ARM: imx: use endian-safe readl/readw/writel/writew
Instead of __raw_*, define imx_* to *_relaxed and use those. Using imx_* was requested by Arnd because *_relaxed tends to indicate that the code was carefully reviewed to not require any synchronisation and otherwise be safe, which isn't the case here with the automatic conversion. The conversion itself was done using the following spatch (since that automatically adjusts the coding style unlike a simple search&replace). @@ expression E1, E2; @@ -__raw_writel(E1, E2) +imx_writel(E1, E2) @@ expression E1, E2; @@ -__raw_writew(E1, E2) +imx_writew(E1, E2) @@ expression E1; @@ -__raw_readl(E1) +imx_readl(E1) @@ expression E1; @@ -__raw_readw(E1) +imx_readw(E1) Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
Frank Li
|
e914ecebf1 |
ARM: imx7d: correct chip version information
The commond 'cat /sys/devices/soc0/revision' can show correct soc version information. "unknow revision" message in imx_print_silicon_rev() will never work for digprog. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
|
Frank Li
|
608f4f7e4e |
ARM: imx: select HAVE_ARM_ARCH_TIMER if selected i.MX7D
i.MX7D Supported ARCH Timer. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
Jean-Christophe Dubois
|
cfefb762ad |
ARM: imx6: fix cleanup path in imx6q_suspend_init()
The wrong pointer is passed to the ioumap function in the cleanup path Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
|
Linus Torvalds
|
1305eda751 |
ARM: SoC platform updates for v4.5
Updates for new platform support: - New platform: Tango4 from Sigma Designs. - Broadcom BCM2836 (Raspberry Pi 2 SoC) - Enable cpufreq on Freescale i.MX7D - Rockchip: SMP support for rk3036, general support for rk3228 - SMP support on Broadcom Kona and NSP - Cleanups for OMAP removing legacy IOMMU data + a bunch of misc fixes and tweaks for various platforms. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWnrvIAAoJEIwa5zzehBx3j0oP/i1WKGraSHS/w29ms4vfisFW bteUAsgh9aG8GCp/kigjmdMbWMdCRQfXp4D+o+SSr2DcM0q2iZzXV2WTeQ6YPAJM Fn431nuPn37ULd9PXdEhgiTDfDmVpvZrHeIQpDxC/TccRj4hkbxkMn6+s5WGkJLR DAr3h2mjKgulKZ4Wlj30rOxTDO9kVqTTIxjZXhbmMxepgMihSpvRGMXbKjxVHDSe NdCoIlfjhu6trr9d39b3POQVDCtrr82WvgrlfrhZZW6YXq7dIb3hhM1RldHCM+a7 mnNDMoVDCEjLM7WLkgoOzsX4j+MyCbrsBY9DV9Zs7MtntWGcD+oH0M+ZLjrtlPef vebi+yBh/JH9fyrOiusSzbRaimy5o/NO/tYFgEAh/zk6GhwJwBYBvM1nexnfSHhv LMY+nSrgZYdN9qHurwjaBmAAmp8u0XZIz/MLQA4WpoqqoAcV2X3gtMcQMdL+nio5 sUlE60/BcXjHqp/gt3MblxZy2WVzklCuqprOSYxhPwFDx7i9SKb9erSyzEkmzQDP UU+8Bory8egR537GaxM+izq9LQ3HLpWnyGPXSGx1s0vzNpZTsYC49eFK44vJRtLK QOlFG1VAupFP5S7kDneXJ8KoWcOwG3OccPfPTvyaC8SIezjXrKDgISV2mHOghYlk uNYO2fcyBoUX9jG3dUy8 =FP4V -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Olof Johansson: "Updates for new platform support: - New platform: Tango4 from Sigma Designs. - Broadcom BCM2836 (Raspberry Pi 2 SoC) - Enable cpufreq on Freescale i.MX7D - Rockchip: SMP support for rk3036, general support for rk3228 - SMP support on Broadcom Kona and NSP - Cleanups for OMAP removing legacy IOMMU data + a bunch of misc fixes and tweaks for various platforms" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (46 commits) ARM: tango: Fix UP build issues ARM: tango: pass ARM arch level for smc.S ARM: bcm2835: Add Kconfig support for bcm2836 ARM: OMAP2+: Add support for dm814x and dra62x usb ARM: OMAP2+: Add mmc hwmod entries for dm814x ARM: OMAP2+: Update 81xx clock and power domains for default, active and sgx ARM: OMAP2+: Fix SoC detection for dra62x j5-eco ARM: tango4: Initial platform support ARM: bcm2835: Add a compat string for bcm2836 machine probe dt-bindings: Add root properties for Raspberry Pi 2 ARM: imx: select SRC for i.MX7 ARM: uniphier: select PINCTRL ARM: OMAP2+: Remove device creation for omap-pcm-audio ARM: OMAP1: Remove device creation for omap-pcm-audio ARM: rockchip: enable support for RK3228 SoCs ARM: rockchip: use const and __initconst for rk3036 smp_operations ARM: zynq: Select ARCH_HAS_RESET_CONTROLLER ARM: BCM: Add SMP support for Broadcom 4708 ARM: BCM: Add SMP support for Broadcom NSP ARM: BCM: Clean up SMP support for Broadcom Kona ... |
||
|
Linus Torvalds
|
5083c54264 |
ARM: SoC cleanups for v4.5
A smallish number of general cleanup commits this release cycle. Some of these are minor tweaks: - shmobile change of binding for their GIC (using arm,pl390 now) - ARCH_RENESAS introduction - Misc other renesas updates There's also a couple of treewide commits from Masahiro Yamada cleaning up const/__initconst for SMP operation structs and a switch to using "depends on" instead of if-constructs on most of the Kconfig platform targets. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWnrTOAAoJEIwa5zzehBx3khsQAKCH1YZfI6AcY0+4z2Kmn/vK 7M86Fnmfa13ju+Iub5YuVsVFVAZ/TGTEVWoiUBMEb73IO0D5Jdl97BhJqV8Kv9Uy jz6PZGXDMJjjkts6N0ehYyu+8WbRvxtVbMNqVD/CO6CH1096UVnxgRz9uTmgJ9Z7 81EDJH4QPPg/zZR/GNV/STf4FKjlcAAN7Vo+5+m12RIptZXXkbGSL3Y6NZAyFlVB JNK5jFcabhD08DsCKa4YzbuubiQO5qiXdoxX+u/OyQWjupxM9YE5gAcna9o4V3FY Y6KnCPcy0XHCkIYk26MITXghr7UFLq9LdD2+s5Ab4HP1XZukw4TUUKd3gwCjCY2h 8RPIfvM7cJmiU3flY56A076Pg+Y35gfMQr+VDe2gMzWtrgCONWma+tHj2JSnNBkv 4I615hysQ46rzgsbpnI/yOQoXTlQH0qsNPjOlsXuRIlC4feNaw2FPTtT4dqEIXjE l7/LeHuu3217/yp2w37OrtMue4C9UZCHVSnHiV6hJgjdS+9UNRWAXMUAqWApSOam 5MPdZ/93+66gSrCdJG1KUhcw4F9MGawLAe4A41Eq7gWDbiJVDcZhRczK+Q79MNKo KvoLWAED+85qS5Z8k/1Ko9NNnl4c4kNR8fAKqD5qcEes7WGLIO1F2/RfC1zMmJfk kHYcwx4sBVPsBHDsAiPN =pQaP -----END PGP SIGNATURE----- Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "A smallish number of general cleanup commits this release cycle. Some of these are minor tweaks: - shmobile change of binding for their GIC (using arm,pl390 now) - ARCH_RENESAS introduction - Misc other renesas updates There's also a couple of treewide commits from Masahiro Yamada cleaning up const/__initconst for SMP operation structs and a switch to using "depends on" instead of if-constructs on most of the Kconfig platform targets" * tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: staging: board: armadillo800eva: Use "arm,pl390" staging: board: kzm9d: Use "arm,pl390" ARM: shmobile: r8a7778 dtsi: Use "arm,pl390" for GIC ARM: shmobile: emev2 dtsi: Use "arm,pl390" for GIC ARM: shmobile: r8a7740 dtsi: Use "arm,pl390" for GIC ARM: shmobile: r7s72100 dtsi: Use "arm,pl390" for GIC ARM: use "depends on" for SoC configs instead of "if" after prompt ARM/clocksource: use automatic DT probing for ux500 PRCMU ARM: use const and __initconst for smp_operations ARM: hisi: do not export smp_operations structures ARM: mvebu: remove unused mach/gpio.h ARM: shmobile: Remove legacy mach/irqs.h ARM: shmobile: Introduce ARCH_RENESAS MAINTAINERS: Remove link to oss.renesas.com which is closed |
||
|
Linus Torvalds
|
58cf279aca |
GPIO bulk updates for the v4.5 kernel cycle:
Infrastructural changes:
- In struct gpio_chip, rename the .dev node to .parent to better reflect
the fact that this is not the GPIO struct device abstraction. We will
add that soon so this would be totallt confusing.
- It was noted that the driver .get_value() callbacks was
sometimes reporting negative -ERR values to the gpiolib core, expecting
them to be propagated to consumer gpiod_get_value() and gpio_get_value()
calls. This was not happening, so as there was a mess of drivers
returning negative errors and some returning "anything else than zero"
to indicate that a line was active. As some would have bit 31 set to
indicate "line active" it clashed with negative error codes. This is
fixed by the largeish series clamping values in all drivers with
!!value to [0,1] and then augmenting the code to propagate error codes
to consumers. (Includes some ACKed patches in other subsystems.)
- Add a void *data pointer to struct gpio_chip. The container_of() design
pattern is indeed very nice, but we want to reform the struct gpio_chip
to be a non-volative, stateless business, and keep states internal to
the gpiolib to be able to hold on to the state when adding a proper
userspace ABI (character device) further down the road. To achieve this,
drivers need a handle at the internal state that is not dependent on
their struct gpio_chip() so we add gpiochip_add_data() and
gpiochip_get_data() following the pattern of many other subsystems.
All the "use gpiochip data pointer" patches transforms drivers to this
scheme.
- The Generic GPIO chip header has been merged into the general
<linux/gpio/driver.h> header, and the custom header for that removed.
Instead of having a separate mm_gpio_chip struct for these generic
drivers, merge that into struct gpio_chip, simplifying the code and
removing the need for separate and confusing includes.
Misc improvements:
- Stabilize the way GPIOs are looked up from the ACPI legacy
specification.
- Incremental driver features for PXA, PCA953X, Lantiq (patches from the
OpenWRT community), RCAR, Zynq, PL061, 104-idi-48
New drivers:
- Add a GPIO chip to the ALSA SoC AC97 driver.
- Add a new Broadcom NSP SoC driver (this lands in the pinctrl dir, but
the branch is merged here too to account for infrastructural changes).
- The sx150x driver now supports the sx1502.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWmsZhAAoJEEEQszewGV1ztq0QAJ1KbNOpmf/s3INkOH4r771Z
WIrNEsmwwLIAryo8gKNOM0H1zCwhRUV7hIE5jYWgD6JvjuAN6vobMlZAq21j6YpB
pKgqnI5DuoND450xjb8wSwGQ5NTYp1rFXNmwCrtyTjOle6AAW+Kp2cvVWxVr77Av
uJinRuuBr9GOKW/yYM1Fw/6EPjkvvhVOb+LBguRyVvq0s5Peyw7ZVeY1tjgPHJLn
oSZ9dmPUjHEn91oZQbtfro3plOObcxdgJ8vo//pgEmyhMeR8XjXES+aUfErxqWOU
PimrZuMMy4cxnsqWwh3Dyxo7KSWfJKfSPRwnGwc/HgbHZEoWxOZI1ezRtGKrRQtj
vubxp5dUBA5z66TMsOCeJtzKVSofkvgX2Wr/Y9jKp5oy9cHdAZv9+jEHV1pr6asz
Tas97MmmO77XuRI/GPDqVHx8dfa15OIz9s92+Gu64KxNzVxTo4+NdoPSNxkbCILO
FKn7EmU3D0OjmN2NJ9GAURoFaj3BBUgNhaxacG9j2bieyh+euuUHRtyh2k8zXR9y
8OnY1UOrTUYF8YIq9pXZxMQRD/lqwCNHvEjtI6BqMcNx4MptfTL+FKYUkn/SgCYk
QTNV6Ui+ety5D5aEpp5q0ItGsrDJ2LYSItsS+cOtMy2ieOxbQav9NWwu7eI3l5ly
gwYTZjG9p9joPXLW0E3g
=63rR
-----END PGP SIGNATURE-----
Merge tag 'gpio-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"Here is the bulk of GPIO changes for v4.5.
Notably there are big refactorings mostly by myself, aimed at getting
the gpio_chip into a shape that makes me believe I can proceed to
preserve state for a proper userspace ABI (character device) that has
already been proposed once, but resulted in the feedback that I need
to go back and restructure stuff. So I've been restructuring stuff.
On the way I ran into brokenness (return code from the get_value()
callback) and had to fix it. Also, refactored generic GPIO to be
simpler.
Some of that is still waiting to trickle down from the subsystems all
over the kernel that provide random gpio_chips, I've touched every
single GPIO driver in the kernel now, oh man I didn't know I was
responsible for so much...
Apart from that we're churning along as usual.
I took some effort to test and retest so it should merge nicely and we
shook out a couple of bugs in -next.
Infrastructural changes:
- In struct gpio_chip, rename the .dev node to .parent to better
reflect the fact that this is not the GPIO struct device
abstraction. We will add that soon so this would be totallt
confusing.
- It was noted that the driver .get_value() callbacks was sometimes
reporting negative -ERR values to the gpiolib core, expecting them
to be propagated to consumer gpiod_get_value() and gpio_get_value()
calls. This was not happening, so as there was a mess of drivers
returning negative errors and some returning "anything else than
zero" to indicate that a line was active. As some would have bit
31 set to indicate "line active" it clashed with negative error
codes. This is fixed by the largeish series clamping values in all
drivers with !!value to [0,1] and then augmenting the code to
propagate error codes to consumers. (Includes some ACKed patches
in other subsystems.)
- Add a void *data pointer to struct gpio_chip. The container_of()
design pattern is indeed very nice, but we want to reform the
struct gpio_chip to be a non-volative, stateless business, and keep
states internal to the gpiolib to be able to hold on to the state
when adding a proper userspace ABI (character device) further down
the road. To achieve this, drivers need a handle at the internal
state that is not dependent on their struct gpio_chip() so we add
gpiochip_add_data() and gpiochip_get_data() following the pattern
of many other subsystems. All the "use gpiochip data pointer"
patches transforms drivers to this scheme.
- The Generic GPIO chip header has been merged into the general
<linux/gpio/driver.h> header, and the custom header for that
removed. Instead of having a separate mm_gpio_chip struct for
these generic drivers, merge that into struct gpio_chip,
simplifying the code and removing the need for separate and
confusing includes.
Misc improvements:
- Stabilize the way GPIOs are looked up from the ACPI legacy
specification.
- Incremental driver features for PXA, PCA953X, Lantiq (patches from
the OpenWRT community), RCAR, Zynq, PL061, 104-idi-48
New drivers:
- Add a GPIO chip to the ALSA SoC AC97 driver.
- Add a new Broadcom NSP SoC driver (this lands in the pinctrl dir,
but the branch is merged here too to account for infrastructural
changes).
- The sx150x driver now supports the sx1502"
* tag 'gpio-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (220 commits)
gpio: generic: make bgpio_pdata always visible
gpiolib: fix chip order in gpio list
gpio: mpc8xxx: Do not use gpiochip_get_data() in mpc8xxx_gpio_save_regs()
gpio: mm-lantiq: Do not use gpiochip_get_data() in ltq_mm_save_regs()
gpio: brcmstb: Allow building driver for BMIPS_GENERIC
gpio: brcmstb: Set endian flags for big-endian MIPS
gpio: moxart: fix build regression
gpio: xilinx: Do not use gpiochip_get_data() in xgpio_save_regs()
leds: pca9532: use gpiochip data pointer
leds: tca6507: use gpiochip data pointer
hid: cp2112: use gpiochip data pointer
bcma: gpio: use gpiochip data pointer
avr32: gpio: use gpiochip data pointer
video: fbdev: via: use gpiochip data pointer
gpio: pch: Optimize pch_gpio_get()
Revert "pinctrl: lantiq: Implement gpio_chip.to_irq"
pinctrl: nsp-gpio: use gpiochip data pointer
pinctrl: vt8500-wmt: use gpiochip data pointer
pinctrl: exynos5440: use gpiochip data pointer
pinctrl: at91-pio4: use gpiochip data pointer
...
|
||
|
Linus Torvalds
|
ac53b2e053 |
MTD updates for v4.5:
Generic MTD
* populate the MTD device 'of_node' field (and get a proper 'of_node' symlink
in sysfs)
- This yielded some new helper functions, and changes across a variety of
drivers
* partitioning cleanups, to prepare for better device-tree based partitioning
in the future
- Eliminate a lot of boilerplate for drivers that want to use OF-based
partition parsing
- The DT bindings for this didn't settle yet, so most non-cleanup portions
are deferred for a future release
NAND
* embed a struct mtd_info inside struct nand_chip
- This is really long overdue; too many drivers have to do the same silly
boilerplate to allocate and link up two "independent" structs, when in
fact, everyone is assuming there is an exact 1:1 relationship between a
NAND chips struct and its underlying MTD. This aids improved helpers and
should make certain abstractions easier in the future.
- Also causes a lot of churn, helped along by some automated code
transformations
* add more core support for detecting (and "correcting") bitflips in erased
pages; requires opt-in by drivers, but at least we kill a few bad
implementations and hopefully stave off future ones
* pxa3xx_nand: cleanups, a few fixes, and PM improvements
* new JZ4780 NAND driver
SPI NOR
* provide default erase function, for controllers that just want to send the
SECTOR_ERASE command directly
* fix some module auto-loading issues with device tree ("jedec,spi-nor")
* error handling fixes
* new Mediatek QSPI flash driver
Other
* cfi: force valid geometry Kconfig (finally!)
- this one used to trip up randconfigs occasionally, since bots aren't
deterred by big scary "advanced configuration" menus
More? Probably. See the commit logs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWlZSyAAoJEFySrpd9RFgtVkEP/096SsFs+71jPgc6ARHIKt6j
b8vnGeMpjYErIjRZXjeLJvD4whYcooM1IDXiy7HPFEF/DrmN+dBjF6gYNHhC9n+X
bpIVS+TJknBKqcAClPVArZI77Fugzn1jBuo8t8rH5bpHNvTfucOt0VmQAu/NRxXe
qUHNXDdQ+nb7qUy47Us66ygDiUh6tXYD2gp3duE8W49FnoSxcXNTq467RGyVBREl
U+5mxsD4y49mktG3xatYdwmvz9UTWOYa+u4NTG282kP6GrqTPTw0ESaxfViP9nyd
WSexhylV/PFJjxyMRazy1EZJ3kiQCQvza/VMmZ6fDSzwZ4JephuCDGLd3MhE3/E7
C275DNHC6U0s79gSlihrYHKEkMN8uNUDwNfeZhY05jXL56kFxUlUvvq14bt4gDDK
xrPLNKLOpcoAMiRFOM5NdBeyQx9REq1G09I8MBjBN0kW254lIjGm6naCOl0L/Fu1
Y4c7hJCLFUTrki9DeNcP6dtpSCVdOap4C+920FZyrBnUzpt5G/rUGdSQu0iY5i4j
BHe/Pr6ybkQ+b7XZbJlbFOy/u6TL/3T9Z4L52RK4j6F3r2EkNiH0+892L4v4qih6
Bt2wsFw8gGHC3dnnh5yfyst/QaG2Mu7V2JJjrrlERjWQJepWqYnUjlH/PgwKj7t0
/pnD40iDmUG2aYe+Jmcv
=wFQI
-----END PGP SIGNATURE-----
Merge tag 'for-linus-20160112' of git://git.infradead.org/linux-mtd
Pull MTD updates from Brian Norris:
"Generic MTD:
- populate the MTD device 'of_node' field (and get a proper 'of_node'
symlink in sysfs)
This yielded some new helper functions, and changes across a
variety of drivers
- partitioning cleanups, to prepare for better device-tree based
partitioning in the future
Eliminate a lot of boilerplate for drivers that want to use
OF-based partition parsing
The DT bindings for this didn't settle yet, so most non-cleanup
portions are deferred for a future release
NAND:
- embed a struct mtd_info inside struct nand_chip
This is really long overdue; too many drivers have to do the same
silly boilerplate to allocate and link up two "independent"
structs, when in fact, everyone is assuming there is an exact 1:1
relationship between a NAND chips struct and its underlying MTD.
This aids improved helpers and should make certain abstractions
easier in the future.
Also causes a lot of churn, helped along by some automated code
transformations
- add more core support for detecting (and "correcting") bitflips in
erased pages; requires opt-in by drivers, but at least we kill a
few bad implementations and hopefully stave off future ones
- pxa3xx_nand: cleanups, a few fixes, and PM improvements
- new JZ4780 NAND driver
SPI NOR:
- provide default erase function, for controllers that just want to
send the SECTOR_ERASE command directly
- fix some module auto-loading issues with device tree
("jedec,spi-nor")
- error handling fixes
- new Mediatek QSPI flash driver
Other:
- cfi: force valid geometry Kconfig (finally!)
This one used to trip up randconfigs occasionally, since bots
aren't deterred by big scary "advanced configuration" menus
More? Probably. See the commit logs"
* tag 'for-linus-20160112' of git://git.infradead.org/linux-mtd: (168 commits)
mtd: jz4780_nand: replace if/else blocks with switch/case
mtd: nand: jz4780: Update ecc correction error codes
mtd: nandsim: use nand_get_controller_data()
mtd: jz4780_nand: remove useless mtd->priv = chip assignment
staging: mt29f_spinand: make use of nand_set/get_controller_data() helpers
mtd: nand: make use of nand_set/get_controller_data() helpers
ARM: make use of nand_set/get_controller_data() helpers
mtd: nand: add helpers to access ->priv
mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs
mtd: nand: jz4740: remove custom 'erased check' implementation
mtd: nand: diskonchip: remove custom 'erased check' implementation
mtd: nand: davinci: remove custom 'erased check' implementation
mtd: nand: use nand_check_erased_ecc_chunk in default ECC read functions
mtd: nand: return consistent error codes in ecc.correct() implementations
doc: dt: mtd: new binding for jz4780-{nand,bch}
mtd: cfi_cmdset_0001: fixing memory leak and handling failed kmalloc
mtd: spi-nor: wait until lock/unlock operations are ready
mtd: tests: consolidate kmalloc/memset 0 call to kzalloc
jffs2: use to_delayed_work
mtd: nand: assign reasonable default name for NAND drivers
...
|
||
Mauro Carvalho Chehab
|
c3152592e7 |
Merge branch 'patchwork' into v4l_for_linus
* patchwork: (204 commits) [media] rc: sunxi-cir: Initialize the spinlock properly [media] rtl2832: do not filter out slave TS null packets [media] rtl2832: print reg number on error case [media] rtl28xxu: return demod reg page from driver cache [media] coda: enable MPEG-2 ES decoding [media] coda: don't start streaming without queued buffers [media] coda: hook up vidioc_prepare_buf [media] coda: relax coda_jpeg_check_buffer for trailing bytes [media] coda: make to_coda_video_device static [media] s5p-mfc: remove volatile attribute from MFC register addresses [media] s5p-mfc: merge together s5p_mfc_hw_call and s5p_mfc_hw_call_void [media] s5p-mfc: use spinlock to protect MFC context [media] s5p-mfc: remove unnecessary callbacks [media] s5p-mfc: make queue cleanup code common [media] s5p-mfc: use one implementation of s5p_mfc_get_new_ctx [media] s5p-mfc: constify s5p_mfc_codec_ops structures [media] au8522: Avoid memory leak for device config data [media] ir-lirc-codec.c: don't leak lirc->drv-rbuf [media] uvcvideo: small cleanup in uvc_video_clock_update() [media] uvcvideo: Fix reading the current exposure value of UVC ... |
||
|
Linus Walleij
|
0f4630f372 |
gpio: generic: factor into gpio_chip struct
The separate struct bgpio_chip has been a pain to handle, both by being confusingly similar in name to struct gpio_chip and for being contained inside a struct so that struct gpio_chip is contained in a struct contained in a struct, making several steps of dereferencing necessary. Make things simpler: include the fields directly into <linux/gpio/driver.h>, #ifdef:ed for CONFIG_GENERIC_GPIO, and get rid of the <linux/basic_mmio_gpio.h> altogether. Prefix some of the member variables with bgpio_* and add proper kerneldoc while we're at it. Modify all users to handle the change and use a struct gpio_chip directly. And while we're at it: replace all container_of() dereferencing by gpiochip_get_data() and registering the gpio_chip with gpiochip_add_data(). Cc: arm@kernel.org Cc: Alexander Shiyan <shc_work@mail.ru> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Kukjin Kim <kgene@kernel.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Olof Johansson <olof@lixom.net> Cc: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Cc: Rabin Vincent <rabin@rab.in> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-omap@vger.kernel.org Cc: linux-samsung-soc@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
||
Olof Johansson
|
9d67d4624f |
The i.MX SoC updates for 4.5:
- Select HAVE_IMX_SRC for i.MX7 to avoid a randconfig build error - Enable cpufreq support on i.MX7D - A couple of random cleanup on iomux-imx31 and mach-imx6ul -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJWeVfeAAoJEFBXWFqHsHzOOmcH/A3mzA0g2FLMZIbJNY5tqrap z1aejsrdkL00vJWGcI0FJt7G1JkYUFYPjjDnbkbeYnXwfi66ZafWdHeSy5QIFfFv lbbF5Na9FESO5A+iWtvpScS/Frz1kk8Uq4SDiglzq+pV9MmQH7Ik3bbk57/h2sGA Uk+SntoiEPmU0d/Jp0pnA66g6FYdDXhl6Ie1fBZSsToCDVvG/dD2O37NrhehzH1A htxcPjuEfmYJRju3T2zgpTdgQ/vchMoCDH2hndi52LVz2LF6RRvoNvhm/qPM4Pg9 OlifVrFa8LMBSV9az7Fu9w0GYyKkHdE5ECxXWJvCi0w+p1zGb3rWf3Aj6aR4kag= =Gsgx -----END PGP SIGNATURE----- Merge tag 'imx-soc-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc The i.MX SoC updates for 4.5: - Select HAVE_IMX_SRC for i.MX7 to avoid a randconfig build error - Enable cpufreq support on i.MX7D - A couple of random cleanup on iomux-imx31 and mach-imx6ul * tag 'imx-soc-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: select SRC for i.MX7 ARM: mach-imx: iomux-imx31: fix spelling mistake in error message ARM: imx: enable cpufreq device on i.mx7d mach-imx/mach-imx6ul.c: proper constness with __initconst Signed-off-by: Olof Johansson <olof@lixom.net> |
||
|
Arnd Bergmann
|
f1858b0e80 |
ARM: imx: select SRC for i.MX7
The i.MX7 Kconfig option had a couple of missing select lines that
I fixed already, but I missed HAVE_IMX_SRC:
arch/arm/mach-imx/built-in.o: In function `imx7d_init_irq':
platform-spi_imx.c:(.init.text+0x25a8): undefined reference to `imx_src_init'
This adds that one as well.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes:
|
||
|
Arnd Bergmann
|
d7e4859100 |
Two changes for NAND/MTD refactoring. The mtd_to_nand() helper will allow us to
stop using mtd->priv for NAND drivers. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWZkijAAoJEFySrpd9RFgtnYIP/0y43CeSvaeyDl51xfxrep5m ctbICUKLi0dtrIwtyUuFgx33BjrOvEoqxEpEd0TMF1wPILhUszaEnqB03LXzi1zh 090w0jXi0B5lSZuDmc5pFJR7staFz+suX4Gqs35xWWxymO0PX4+MxBWX/SE5whiB fw+aHm5AsG4NxL2wGuoTKhHS7HcUHPKhOCdhoHv9tknV7i5b4WFoh4k4W2CAhHpY 5xKpJ0YKRHbBFFCKEpfQx1kUTo8dEe6ZcVWtnpRw7dg21KO8yEKQDP2fJvW6wTsv zF6SYKEvFL76D8j+Po2lDr0X+R1RLibi8LehVx3EMfG8j80p20xbHtnW4G1R5L2G l3Y/DVqsDL9esxyhFUTiYxig5tlYTYbaG6MmQch2OlPrXK/6UEDI1xsZuUCGRa8y 8xZlnvLyogV4bQapnTV38wfKD9d6GQVS599uz9bpFd3TloxsQf5o/OJEkl0wEnTM xmZzXXQLK3vQfdy3biD+DEViQopcGK0GlYXaQPhQgUoNRHJzC1E42gFM7NUCp699 nOUIsADi3QYZdC6OAcmZnnSiVqgPQBlwphR9YE0UmU50GHpFsx4QGNs/hIIMzXBS 16aIV641baRxIvdbVvb23q9vKgoLzVKj2ZLdIwt/P0guo/NujrMU33EmWfyX/hOF Y0qb0T2GtuhHxEPfKti3 =03sV -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-4.5/cleanup' of git://git.infradead.org/linux-mtd into next/cleanup Merge "MTD/NAND cleanups for v4.5" from Brian Norris: Two changes for NAND/MTD refactoring. The mtd_to_nand() helper will allow us to stop using mtd->priv for NAND drivers. * tag 'arm-soc/for-4.5/cleanup' of git://git.infradead.org/linux-mtd: ARM: nand: make use of mtd_to_nand() where appropriate mtd: nand: add an mtd_to_nand() helper |
||
Boris BREZILLON
|
c993e09504 |
ARM: nand: make use of mtd_to_nand() where appropriate
mtd_to_nand() was recently introduced to avoid direct accesses to the mtd->priv field. Update all ARM specific implementations to use this helper. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> |
||
Colin Ian King
|
aa9fff5dcc |
ARM: mach-imx: iomux-imx31: fix spelling mistake in error message
Minor issue, fix spelling mistake, nonexistant -> nonexistent Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
Bai Ping
|
e3526f004a |
ARM: imx: enable cpufreq device on i.mx7d
Add a cpufreq-dt device on i.MX7D, using the generic cpufreq-dt for CPU frequency scaling. Signed-off-by: Bai Ping <b51503@freescale.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
Masahiro Yamada
|
e324654294 |
ARM: use "depends on" for SoC configs instead of "if" after prompt
Many ARM sub-architectures use prompts followed by "if" conditional,
but it is wrong.
Please notice the difference between
config ARCH_FOO
bool "Foo SoCs" if ARCH_MULTI_V7
and
config ARCH_FOO
bool "Foo SoCs"
depends on ARCH_MULTI_V7
These two are *not* equivalent!
In the former statement, it is not ARCH_FOO, but its prompt that
depends on ARCH_MULTI_V7. So, it is completely valid that ARCH_FOO
is selected by another, but ARCH_MULTI_V7 is still disabled. As it is
not unmet dependency, Kconfig never warns. This is probably not what
you want.
The former should be used only when you need to do so, and you really
understand what you are doing. (In most cases, it should be wrong!)
For enabling/disabling sub-architectures, the latter is always correct.
As a good side effect, this commit fixes some entries over 80 columns
(mach-imx, mach-integrator, mach-mbevu).
[Arnd: I note that there is not really a bug here, according to
the discussion that followed, but I can see value in being consistent
and in making the lines shorter]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Krzysztof Halasa <khc@piap.pl>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Masahiro Yamada
|
75305275a7 |
ARM: use const and __initconst for smp_operations
These smp_operations structures are not over-written, so add "const" qualifier and replace __initdata with __initconst. Also, add "static" where it is possible. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Moritz Fischer <moritz.fischer@ettus.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> # qcom part Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Nicolas Pitre
|
5d48417592 |
mach-imx/mach-imx6ul.c: proper constness with __initconst
Both the pointer array and the pointed data have to be const when using __initconst to be correct. This also fixes LTO builds that otherwise fail with section mismatch errors. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
Anson Huang
|
4699ccbf8c |
ARM: imx: add platform irq type setting in gpc
GPC irq domain is a child domain of GIC, now all of platform irqs are inside GPC domain, during the module populate, all devices irq should have correct type setting in GIC, however, there is no .irq_set_type callback setting in GPC, so the irq_set_type will be skipped and cause all irqs' type in /proc/interrupt are "edge" which mismatch with irq type setting in dtb file. Since GPC has no irq type setting, so just tell kernel to use irq_chip_set_type_parent. Signed-off-by: Anson Huang <Anson.Huang@freescale.com> Cc: <stable@vger.kernel.org> # 4.1+ Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
|
Mauro Carvalho Chehab
|
a71daaa10e |
[media] move media platform data to linux/platform_data/media
Now that media has its own subdirectory inside platform_data,
let's move the headers that are already there to such subdir.
After moving those files, the references were adjusted using this
script:
MAIN_DIR="linux/platform_data/"
PREV_DIR="linux/platform_data/"
DIRS="media/"
echo "Checking affected files" >&2
for i in $DIRS; do
for j in $(find include/$MAIN_DIR/$i -type f -name '*.h'); do
n=`basename $j`
git grep -l $n
done
done|sort|uniq >files && (
echo "Handling files..." >&2;
echo "for i in \$(cat files|grep -v Documentation); do cat \$i | \\";
(
cd include/$MAIN_DIR;
for j in $DIRS; do
for i in $(ls $j); do
echo "perl -ne 's,(include [\\\"\\<])$PREV_DIR($i)([\\\"\\>]),\1$MAIN_DIR$j\2\3,; print \$_' |\\";
done;
done;
echo "cat > a && mv a \$i; done";
);
echo "Handling documentation..." >&2;
echo "for i in MAINTAINERS \$(cat files); do cat \$i | \\";
(
cd include/$MAIN_DIR;
for j in $DIRS; do
for i in $(ls $j); do
echo " perl -ne 's,include/$PREV_DIR($i)\b,include/$MAIN_DIR$j\1,; print \$_' |\\";
done;
done;
echo "cat > a && mv a \$i; done"
);
) >script && . ./script
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||
|
Linus Torvalds
|
56e0464980 |
ARM: SoC platform updates for v4.4
New and/or improved SoC support for this release:
- Marvell Berlin:
* Enable standard DT-based cpufreq
* Add CPU hotplug support
- Freescale:
* Ethernet init for i.MX7D
* Suspend/resume support for i.MX6UL
- Allwinner:
* Support for R8 chipset (used on NTC's $9 C.H.I.P board)
- Mediatek:
* SMP support for some platforms
- Uniphier:
* L2 support
* Cleaned up SMP support, etc.
+ A handful of other patches around above functionality, and a few other
smaller changes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWQCmaAAoJEIwa5zzehBx3F/0QAKIYmvmJM3sUanNEEwhRilx+
3xhSgld7e25suLGwrNapTkd8VzVB4b8GnJhNShNk+l5WqfqICHCB4Aru2NmJHY8V
yPj5vBrgJTVMnIiH7CRDPz9IlwAkWM4MmWi4PgFuhrk1T/0wPKPNMc40OWOloTeD
gA5YmbbX1hNOqKoI/z+DK7CEdp1lHrEjeYIbnQ0SldFzkY9NKhrI784gtcz3si6E
19pFQ9LA7EtEv7aRcFOA0sazeooa2wiJ9P9L31Mn5APZBJj5H8HjyKdvOmJ8neQn
+b77Tya11Q70U57uDq69l0rl58fpy650uTwYaLNGWmUdTgOiGMWN05lvIVNrQd/R
gP+VEQDGsTH6kqOCy9gyLCmn9q9I7l0t9lwcu5TP52Xy9vqVq9rb388MkcPcsWk8
cYPvD8RcSaywZUV3YJgbYozBfVuf5rLVus6D54pMXe3N12KGaNBt8kk4co4jBwvh
b//1urA82cdlEAZ/kiqHXjRMq/ht+dxtb6sSVOJ9frxPLuc7g1z4ORC+Z0PTS5WC
zB0hMzPnTwXeqHcYpV4wP/vGtgZGpLevBkK7pKVdqKZykV8BS4FiT4HFp6Rghxs3
dxAz7JjQUle6KOX7YfuHdpLnyZFWQvLYyTn946xGKpw2QH/iWLwECpet2I87QzVs
QkEkGygPhK4QcGccxz9N
=h5xk
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson:
"New and/or improved SoC support for this release:
Marvell Berlin:
- Enable standard DT-based cpufreq
- Add CPU hotplug support
Freescale:
- Ethernet init for i.MX7D
- Suspend/resume support for i.MX6UL
Allwinner:
- Support for R8 chipset (used on NTC's $9 C.H.I.P board)
Mediatek:
- SMP support for some platforms
Uniphier:
- L2 support
- Cleaned up SMP support, etc.
plus a handful of other patches around above functionality, and a few
other smaller changes"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (42 commits)
ARM: uniphier: rework SMP operations to use trampoline code
ARM: uniphier: add outer cache support
Documentation: EXYNOS: Update bootloader interface on exynos542x
ARM: mvebu: add broken-idle option
ARM: orion5x: use mac_pton() helper
ARM: at91: pm: at91_pm_suspend_in_sram() must be 8-byte aligned
ARM: sunxi: Add R8 support
ARM: digicolor: select pinctrl/gpio driver
arm: berlin: add CPU hotplug support
arm: berlin: use non-self-cleared reset register to reset cpu
ARM: mediatek: add smp bringup code
ARM: mediatek: enable gpt6 on boot up to make arch timer working
soc: mediatek: Fix random hang up issue while kernel init
soc: ti: qmss: make acc queue support optional in the driver
soc: ti: add firmware file name as part of the driver
Documentation: dt: soc: Add description for knav qmss driver
ARM: S3C64XX: Use PWM lookup table for mach-smartq
ARM: S3C64XX: Use PWM lookup table for mach-hmt
ARM: S3C64XX: Use PWM lookup table for mach-crag6410
ARM: S3C64XX: Use PWM lookup table for smdk6410
...
|
||
|
Linus Torvalds
|
a5e1d715a8 |
ARM: SoC cleanups for v4.4
Again we have a sizable (but not huge) cleanup branch with a net delta of about
-3k lines.
Main contents here is:
- A bunch of development/cleanup of a few PXA boards
- Removal of bockw platforms on shmobile, since the platform has now gone
completely multiplatform. Whee!
- move of the 32kHz timer on OMAP to a proper timesource
- Misc cleanup of older OMAP material (incl removal of one board file)
- Switch over to new common PWM lookup support for several platforms
There's also a handful of other cleanups across the tree, but the above are
the major pieces.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWQCN8AAoJEIwa5zzehBx3WWUP/1uX+W9QDC3H1qrlVbHZRjGB
ytvg/q/6pL9teBF4Dga2MAAKLTUomSLWL6xJGhsIUZJjgyik5KjbTMy6SJukk7VA
R04nQ9oSYeaWP61X5glE6SndrKGBemfFUZ1+e6OKWEBSu9ScU678PfOcyzvOgILA
+nE+13uGwSkIGTxLHGSHPFjj1/If/lZovb3MCAqXs76Hw/GkRN9jPvQrimJY/ndI
ZqDDQEJzriB5BKpKMRfF+bwTRZzTKTv/pyvz8kfTzjs1u8DQ7zwNA2do3hm7iGRt
Kf0OZZCRIyDIEXUQwUgr9KNasHLf+IH5A0edRUbP4gmMo3REiwCgkPhXXgbmR0pn
+xtDHkMHg+KAWJYyeEJBCgwiOCZFpTw4fVKbq3aaOR7yagK9y0jdcFtid8BL0bfa
iTauKpbApVlBG5EEjSNJSuIeeDzPsSf3mgLGQtZNyuR6XGMPj2cDzSrm94vnjuVJ
4gxslILTHtqpqg6jEsHZa/Ptd8G3VYQbja6MOvIsf0O8AULo8YpSU3P4RUbzX4Pq
mUAFKzh9BuaSAMcLmwXCjy40f2DuzKTQUb2FkNFeompLGeCxTUh/2kuEJ9mxN5TB
MstLTyqW2/Zu5RFnVUaI/G1vOkZ4ZDJeJIwPolG13ZwlCoTpnkWvLjJAVjChbpEX
0iBistrj5vXEFrjsAz6c
=uI7R
-----END PGP SIGNATURE-----
Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson:
"Again we have a sizable (but not huge) cleanup branch with a net delta
of about -3k lines.
Main contents here is:
- A bunch of development/cleanup of a few PXA boards
- Removal of bockw platforms on shmobile, since the platform has now
gone completely multiplatform. Whee!
- move of the 32kHz timer on OMAP to a proper timesource
- Misc cleanup of older OMAP material (incl removal of one board
file)
- Switch over to new common PWM lookup support for several platforms
There's also a handful of other cleanups across the tree, but the
above are the major pieces"
* tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (103 commits)
ARM: OMAP3: hwmod data: Remove legacy mailbox data and addrs
ARM: DRA7: hwmod data: Remove spinlock hwmod addrs
ARM: OMAP4: hwmod data: Remove spinlock hwmod addrs
ARM: DRA7/AM335x/AM437x: hwmod: Remove gpmc address space from hwmod data
ARM: Remove __ref on hotplug cpu die path
ARM: Remove open-coded version of IRQCHIP_DECLARE
arm: omap2: board-generic: use omap4_local_timer_init for AM437x
ARM: DRA7/AM335x/AM437x: hwmod: Remove elm address space from hwmod data
ARM: OMAP: Remove duplicated operand in OR operation
clocksource: ti-32k: make it depend on GENERIC_CLOCKSOURCE
ARM: pxa: remove incorrect __init annotation on pxa27x_set_pwrmode
ARM: pxa: raumfeld: make some variables static
ARM: OMAP: Change all cpu_is_* occurences to soc_is_* for id.c
ARM: OMAP2+: Rename cpu_is macros to soc_is
arm: omap2: timer: limit hwmod usage to non-DT boots
arm: omap2+: select 32k clocksource driver
clocksource: add TI 32.768 Hz counter driver
arm: omap2: timer: rename omap_sync32k_timer_init()
arm: omap2: timer: always call clocksource_of_init() when DT
arm: omap2: timer: move realtime_counter_init() around
...
|
||
|
Linus Torvalds
|
0d51ce9ca1 |
Power management and ACPI updates for v4.4-rc1
- ACPICA update to upstream revision 20150930 (Bob Moore, Lv Zheng).
The most significant change is to allow the AML debugger to be
built into the kernel. On top of that there is an update related
to the NFIT table (the ACPI persistent memory interface)
and a few fixes and cleanups.
- ACPI CPPC2 (Collaborative Processor Performance Control v2)
support along with a cpufreq frontend (Ashwin Chaugule).
This can only be enabled on ARM64 at this point.
- New ACPI infrastructure for the early probing of IRQ chips and
clock sources (Marc Zyngier).
- Support for a new hierarchical properties extension of the ACPI
_DSD (Device Specific Data) device configuration object allowing
the kernel to handle hierarchical properties (provided by the
platform firmware this way) automatically and make them available
to device drivers via the generic device properties interface
(Rafael Wysocki).
- Generic device properties API extension to obtain an index of
certain string value in an array of strings, along the lines of
of_property_match_string(), but working for all of the supported
firmware node types, and support for the "dma-names" device
property based on it (Mika Westerberg).
- ACPI core fix to parse the MADT (Multiple APIC Description Table)
entries in the order expected by platform firmware (and mandated
by the specification) to avoid confusion on systems with more than
255 logical CPUs (Lukasz Anaczkowski).
- Consolidation of the ACPI-based handling of PCI host bridges
on x86 and ia64 (Jiang Liu).
- ACPI core fixes to ensure that the correct IRQ number is used to
represent the SCI (System Control Interrupt) in the cases when
it has been re-mapped (Chen Yu).
- New ACPI backlight quirk for Lenovo IdeaPad S405 (Hans de Goede).
- ACPI EC driver fixes (Lv Zheng).
- Assorted ACPI fixes and cleanups (Dan Carpenter, Insu Yun, Jiri
Kosina, Rami Rosen, Rasmus Villemoes).
- New mechanism in the PM core allowing drivers to check if the
platform firmware is going to be involved in the upcoming system
suspend or if it has been involved in the suspend the system is
resuming from at the moment (Rafael Wysocki).
This should allow drivers to optimize their suspend/resume
handling in some cases and the changes include a couple of users
of it (the i8042 input driver, PCI PM).
- PCI PM fix to prevent runtime-suspended devices with PME enabled
from being resumed during system suspend even if they aren't
configured to wake up the system from sleep (Rafael Wysocki).
- New mechanism to report the number of a wakeup IRQ that woke up
the system from sleep last time (Alexandra Yates).
- Removal of unused interfaces from the generic power domains
framework and fixes related to latency measurements in that
code (Ulf Hansson, Daniel Lezcano).
- cpufreq core sysfs interface rework to make it handle CPUs that
share performance scaling settings (represented by a common
cpufreq policy object) more symmetrically (Viresh Kumar).
This should help to simplify the CPU offline/online handling among
other things.
- cpufreq core fixes and cleanups (Viresh Kumar).
- intel_pstate fixes related to the Turbo Activation Ratio (TAR)
mechanism on client platforms which causes the turbo P-states
range to vary depending on platform firmware settings (Srinivas
Pandruvada).
- intel_pstate sysfs interface fix (Prarit Bhargava).
- Assorted cpufreq driver (imx, tegra20, powernv, integrator) fixes
and cleanups (Bai Ping, Bartlomiej Zolnierkiewicz, Shilpasri G
Bhat, Luis de Bethencourt).
- cpuidle mvebu driver cleanups (Russell King).
- OPP (Operating Performance Points) framework code reorganization
to make it more maintainable (Viresh Kumar).
- Intel Broxton support for the RAPL (Running Average Power Limits)
power capping driver (Amy Wiles).
- Assorted power management code fixes and cleanups (Dan Carpenter,
Geert Uytterhoeven, Geliang Tang, Luis de Bethencourt, Rasmus
Villemoes).
/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABCAAGBQJWOC9oAAoJEILEb/54YlRx/c8P/joflwoFsISwJccG62YTQMuc
bMQKM4Kw0vl5La8+pkLpe5t6+mW7l81UFtYF6Dzd8LOKlD9sszD34z1lHmCeT/oR
wn0uZpHagRyLMUfoyiEtlU/VRU6WQNNtS3EgjwUi7xgFz9Q0pjcCZ9OQ6vKov1j5
+6j40ODif5sgo+2vl+rztJiV0SIMkYdkgNqgfN1FE9bdLA2Zkk+PxxJbtGQORuDu
O/K+XhQT2xWquVWi/1p+VtQxs5glBS1oKm0kogV5bElCvNTRNIVABUNcjogITQwo
QSAKgoCKIoaIl5jtDT6u5dc0y67q/dMtqOY9fOCcOz1Z7jbWQzR8D7mpFWIsJUPK
K2LClI3t85ynpN6Jref246A6+C9nwB8JMAiAR11oBw7WbBlkd6tbRgcT5B+iz8UE
FuCCif7pha/Fs+Jt1YRazscIqteQ2bAhhxikuIPMfw2M6M67MNfVNeKA1bAoSM34
dH7JsilblitvV7shrwJHwXPXCOF2jEPoK8I4/q2+TR5qUxEpRJjelQxXGSaQScMZ
iNnjeTgv8H8q+rY5Yjzsl4pxP0Fvf7IuqkptWOJbgepg4cQc9pS87wOpY3uEeQzr
H7ruaQJFCnLO4aXbPNClsiJARhrBk+qMlsh4vBEyCJ2T0ucb+nIUcN4BTi8t85yl
X97BfHHUiDoUrnIsNids
=1gaH
-----END PGP SIGNATURE-----
Merge tag 'pm+acpi-4.4-rc1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management and ACPI updates from Rafael Wysocki:
"Quite a new features are included this time.
First off, the Collaborative Processor Performance Control interface
(version 2) defined by ACPI will now be supported on ARM64 along with
a cpufreq frontend for CPU performance scaling.
Second, ACPI gets a new infrastructure for the early probing of IRQ
chips and clock sources (along the lines of the existing similar
mechanism for DT).
Next, the ACPI core and the generic device properties API will now
support a recently introduced hierarchical properties extension of the
_DSD (Device Specific Data) ACPI device configuration object. If the
ACPI platform firmware uses that extension to organize device
properties in a hierarchical way, the kernel will automatically handle
it and make those properties available to device drivers via the
generic device properties API.
It also will be possible to build the ACPICA's AML interpreter
debugger into the kernel now and use that to diagnose AML-related
problems more efficiently. In the future, this should make it
possible to single-step AML execution and do similar things.
Interesting stuff, although somewhat experimental at this point.
Finally, the PM core gets a new mechanism that can be used by device
drivers to distinguish between suspend-to-RAM (based on platform
firmware support) and suspend-to-idle (or other variants of system
suspend the platform firmware is not involved in) and possibly
optimize their device suspend/resume handling accordingly.
In addition to that, some existing features are re-organized quite
substantially.
First, the ACPI-based handling of PCI host bridges on x86 and ia64 is
unified and the common code goes into the ACPI core (so as to reduce
code duplication and eliminate non-essential differences between the
two architectures in that area).
Second, the Operating Performance Points (OPP) framework is
reorganized to make the code easier to find and follow.
Next, the cpufreq core's sysfs interface is reorganized to get rid of
the "primary CPU" concept for configurations in which the same
performance scaling settings are shared between multiple CPUs.
Finally, some interfaces that aren't necessary any more are dropped
from the generic power domains framework.
On top of the above we have some minor extensions, cleanups and bug
fixes in multiple places, as usual.
Specifics:
- ACPICA update to upstream revision 20150930 (Bob Moore, Lv Zheng).
The most significant change is to allow the AML debugger to be
built into the kernel. On top of that there is an update related
to the NFIT table (the ACPI persistent memory interface) and a few
fixes and cleanups.
- ACPI CPPC2 (Collaborative Processor Performance Control v2) support
along with a cpufreq frontend (Ashwin Chaugule).
This can only be enabled on ARM64 at this point.
- New ACPI infrastructure for the early probing of IRQ chips and
clock sources (Marc Zyngier).
- Support for a new hierarchical properties extension of the ACPI
_DSD (Device Specific Data) device configuration object allowing
the kernel to handle hierarchical properties (provided by the
platform firmware this way) automatically and make them available
to device drivers via the generic device properties interface
(Rafael Wysocki).
- Generic device properties API extension to obtain an index of
certain string value in an array of strings, along the lines of
of_property_match_string(), but working for all of the supported
firmware node types, and support for the "dma-names" device
property based on it (Mika Westerberg).
- ACPI core fix to parse the MADT (Multiple APIC Description Table)
entries in the order expected by platform firmware (and mandated by
the specification) to avoid confusion on systems with more than 255
logical CPUs (Lukasz Anaczkowski).
- Consolidation of the ACPI-based handling of PCI host bridges on x86
and ia64 (Jiang Liu).
- ACPI core fixes to ensure that the correct IRQ number is used to
represent the SCI (System Control Interrupt) in the cases when it
has been re-mapped (Chen Yu).
- New ACPI backlight quirk for Lenovo IdeaPad S405 (Hans de Goede).
- ACPI EC driver fixes (Lv Zheng).
- Assorted ACPI fixes and cleanups (Dan Carpenter, Insu Yun, Jiri
Kosina, Rami Rosen, Rasmus Villemoes).
- New mechanism in the PM core allowing drivers to check if the
platform firmware is going to be involved in the upcoming system
suspend or if it has been involved in the suspend the system is
resuming from at the moment (Rafael Wysocki).
This should allow drivers to optimize their suspend/resume handling
in some cases and the changes include a couple of users of it (the
i8042 input driver, PCI PM).
- PCI PM fix to prevent runtime-suspended devices with PME enabled
from being resumed during system suspend even if they aren't
configured to wake up the system from sleep (Rafael Wysocki).
- New mechanism to report the number of a wakeup IRQ that woke up the
system from sleep last time (Alexandra Yates).
- Removal of unused interfaces from the generic power domains
framework and fixes related to latency measurements in that code
(Ulf Hansson, Daniel Lezcano).
- cpufreq core sysfs interface rework to make it handle CPUs that
share performance scaling settings (represented by a common cpufreq
policy object) more symmetrically (Viresh Kumar).
This should help to simplify the CPU offline/online handling among
other things.
- cpufreq core fixes and cleanups (Viresh Kumar).
- intel_pstate fixes related to the Turbo Activation Ratio (TAR)
mechanism on client platforms which causes the turbo P-states range
to vary depending on platform firmware settings (Srinivas
Pandruvada).
- intel_pstate sysfs interface fix (Prarit Bhargava).
- Assorted cpufreq driver (imx, tegra20, powernv, integrator) fixes
and cleanups (Bai Ping, Bartlomiej Zolnierkiewicz, Shilpasri G
Bhat, Luis de Bethencourt).
- cpuidle mvebu driver cleanups (Russell King).
- OPP (Operating Performance Points) framework code reorganization to
make it more maintainable (Viresh Kumar).
- Intel Broxton support for the RAPL (Running Average Power Limits)
power capping driver (Amy Wiles).
- Assorted power management code fixes and cleanups (Dan Carpenter,
Geert Uytterhoeven, Geliang Tang, Luis de Bethencourt, Rasmus
Villemoes)"
* tag 'pm+acpi-4.4-rc1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (108 commits)
cpufreq: postfix policy directory with the first CPU in related_cpus
cpufreq: create cpu/cpufreq/policyX directories
cpufreq: remove cpufreq_sysfs_{create|remove}_file()
cpufreq: create cpu/cpufreq at boot time
cpufreq: Use cpumask_copy instead of cpumask_or to copy a mask
cpufreq: ondemand: Drop unnecessary locks from update_sampling_rate()
PM / Domains: Merge measurements for PM QoS device latencies
PM / Domains: Don't measure ->start|stop() latency in system PM callbacks
PM / clk: Fix broken build due to non-matching code and header #ifdefs
ACPI / Documentation: add copy_dsdt to ACPI format options
ACPI / sysfs: correctly check failing memory allocation
ACPI / video: Add a quirk to force native backlight on Lenovo IdeaPad S405
ACPI / CPPC: Fix potential memory leak
ACPI / CPPC: signedness bug in register_pcc_channel()
ACPI / PAD: power_saving_thread() is not freezable
ACPI / PM: Fix incorrect wakeup IRQ setting during suspend-to-idle
ACPI: Using correct irq when waiting for events
ACPI: Use correct IRQ when uninstalling ACPI interrupt handler
cpuidle: mvebu: disable the bind/unbind attributes and use builtin_platform_driver
cpuidle: mvebu: clean up multiple platform drivers
...
|
||
|
Rafael J. Wysocki
|
394f7164e6 |
Merge branch 'pm-opp'
* pm-opp: PM / OPP: passing NULL to PTR_ERR() PM / OPP: Move cpu specific code to opp/cpu.c PM / OPP: Move opp core to its own directory PM / OPP: Prefix exported opp routines with dev_pm_opp_ PM / OPP: Rename opp init/free table routines PM / OPP: reuse of_parse_phandle() |
||
|
Olof Johansson
|
fa54cda779 |
The i.MX SoC updates for 4.4:
- Enable suspend and cpufreq support for i.MX6UL - Add platform level ENET initialization support for i.MX7D -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJWJP9yAAoJEFBXWFqHsHzOJvQH/3sncCMvFmOXX1hBJzb4BzE6 4Ke4AC39v1TuviNkVZooMiVlW5uf4tvyvyv47GjF88yRsHJmvt1s0T7502v4+dib Ak6dj58uqdC4yj6RF5eZBwqHV4s3nZbESYt4Dr17rka/HqhvhH7yxFpWBzPWqLUb YK5nlyBe8r9Mrsgr8mkFEKHmzgMhOTlomkUk3f5BL7TjrRCA+b5Czed/P0hZ7OVx cIqALqMregcqmvH21bA6feSs1NARLfcBraWH4/YxSRFrXng8XCb1bGF6P8U78bSz aQ6VZFWEInJBNKfQR+5N5+yfPnm25AIAHdqv1cyIODBPbFy7t5hyyzdmtEmNskM= =naPW -----END PGP SIGNATURE----- Merge tag 'imx-soc-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc The i.MX SoC updates for 4.4: - Enable suspend and cpufreq support for i.MX6UL - Add platform level ENET initialization support for i.MX7D * tag 'imx-soc-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: add cpufreq device for imx6ul ARM: imx: add enet init for i.MX7D platform ARM: imx7d: add imx7d iomux-gpr field define ARM: imx: add suspend/resume support for i.mx6ul Signed-off-by: Olof Johansson <olof@lixom.net> |
||
Marc Zyngier
|
0cc09e8518 |
ARM: Remove open-coded version of IRQCHIP_DECLARE
Now that the IRQCHIP_DECLARE macro has been moved to linux/irqchip.h, it becomes possible to cleanup the open-coded versions of the same macro that have been added to some private irqchips implementations. Cc: Sascha Hauer <kernel@pengutronix.de> Acked-by: Kukjin Kim <kgene@kernel.org> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net> |
||
|
Marc Zyngier
|
f833f57ff2 |
irqchip: Convert all alloc/xlate users from of_node to fwnode
Since we now have a generic data structure to express an interrupt specifier, convert all hierarchical irqchips that are OF based to use a fwnode_handle as part of their alloc and xlate (which becomes translate) callbacks. As most of these drivers have dependencies (they exchange IRQ specifiers), change them all in a single, massive patch... Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-and-tested-by: Hanjun Guo <hanjun.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Tomasz Nowicki <tomasz.nowicki@linaro.org> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Cc: Graeme Gregory <graeme@xora.org.uk> Cc: Jake Oshins <jakeo@microsoft.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Link: http://lkml.kernel.org/r/1444737105-31573-6-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
||
|
Marc Zyngier
|
5d4c9bc776 |
irqdomain: Use irq_domain_get_of_node() instead of direct field access
The struct irq_domain contains a "struct device_node *" field (of_node) that is almost the only link between the irqdomain and the device tree infrastructure. In order to prepare for the removal of that field, convert all users to use irq_domain_get_of_node() instead. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-and-tested-by: Hanjun Guo <hanjun.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Tomasz Nowicki <tomasz.nowicki@linaro.org> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Cc: Graeme Gregory <graeme@xora.org.uk> Cc: Jake Oshins <jakeo@microsoft.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Link: http://lkml.kernel.org/r/1444737105-31573-2-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
||
|
Bai Ping
|
7f7308198f |
ARM: imx: add cpufreq device for imx6ul
Add cpufreq device for i.MX6UL. Using the common cpufreq of i.MX6 SOC. Signed-off-by: Bai Ping <b51503@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
Fugang Duan
|
69f9c5047d |
ARM: imx: add enet init for i.MX7D platform
Add enet phy fixup, clock source init for i.MX7D platform. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
|
Anson Huang
|
ee4a5f838c |
ARM: imx: add suspend/resume support for i.mx6ul
This patch adds suspend function for i.MX6UL, it supports "standby" and "mem" mode, for "standby" mode, SoC will enter STOP mode only, while for "mem" mode, SoC will enter STOP mode and DDR IO will be set to low power mode. As i.MX6UL contains a "Cortex-A7" ARM core which has no PL310, so we need to avoid any PL310 operations during suspend/resume, also, we need to flush Cortex-A7's inernal L2 cache before suspend. Signed-off-by: Anson Huang <b20788@freescale.com> |
||
Thomas Gleixner
|
bd0b9ac405 |
genirq: Remove irq argument from irq flow handlers
Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com> |
||
|
Viresh Kumar
|
8f8d37b253 |
PM / OPP: Prefix exported opp routines with dev_pm_opp_
That's the naming convention followed in most of opp core, but few routines didn't follow this, fix them. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |