Commit Graph

18 Commits

Author SHA1 Message Date
Alex Deucher
c1556f7151 radeon: add support for rs600 GPUs
RS600s are an AMD IGP for Intel CPUs, that look like RS690s from
a lot of perspectives but look like r600s from a memory controller
point of view.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-03-13 14:24:13 +10:00
Alex Deucher
c05ce0834a drm/radeon: add initial support for R6xx/R7xx GPUs
This adds support for 2D/Xv acceleration in the X.org 2D driver,
to the drm. It doesn't yet provide any 3D support hooks.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-03-13 14:24:11 +10:00
Alex Deucher
befb73c232 drm/radeon: prep for r6xx/r7xx support
- add r6xx/r7xx regs and macros
- add r6xx/r7xx chip families
- fix register access for regs with offsets >= 0x10000

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-03-13 14:24:10 +10:00
Dave Airlie
4247ca942a drm/radeon: align ring writes to 16 dwords boundaries.
On some radeon GPUs this appears to introduce another level of
stability around interacting with the ring.

Its pretty much what fglrx appears to do.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-03-13 14:24:05 +10:00
David Miller
6abf6bb0ff drm: radeon: Use surface for PCI GART table.
This allocates a physical surface for the PCI GART table, this way no
matter what other surface configurations exist the GART table will
always be seen by the hardware properly.

We encode the file pointer of the virtual surface allocate using a
special cookie value, called PCIGART_FILE_PRIV.  On the last close, we
release that surface.

Just to be doubly safe, we run the pcigart table setup with the main
surface control register clear.

Based upon ideas from David Airlie and Ben Benjamin Herrenschmidt.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-03-13 14:24:02 +10:00
David Miller
b266503072 drm: radeon: Fix RADEON_*_EMITED defines.
These are not supposed to be booleans, they are
supposed to be bit masks.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-03-13 14:24:01 +10:00
David Miller
b07fa022ec drm: radeon: Fix ring_rptr accesses.
The memory behind ring_rptr can either be in ioremapped memory
or a vmalloc() normal kernel memory buffer.

However, the code unconditionally uses DRM_{READ,WRITE}32() (and thus
readl() and writel()) to access it.

Basically, if RADEON_IS_AGP then it's ioremap()'d memory else it's
vmalloc'd memory.

Adjust all of the ring_rptr access code as needed.

While we're here, kill the 'scratch' pointer in drm_radeon_private.
It's only used in the one place where it is initialized.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-03-13 14:24:00 +10:00
Benjamin Herrenschmidt
d883f7f1b7 drm: Use resource_size_t for drm_get_resource_{start, len}
The DRM uses its own wrappers to obtain resources from PCI devices,
which currently convert the resource_size_t into an unsigned long.

This is broken on 32-bit platforms with >32-bit physical address
space.

This fixes them, along with a few occurences of unsigned long used
to store such a resource in drivers.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-03-13 14:23:56 +10:00
Dave Airlie
7c1c2871a6 drm: move to kref per-master structures.
This is step one towards having multiple masters sharing a drm
device in order to get fast-user-switching to work.

It splits out the information associated with the drm master
into a separate kref counted structure, and allocates this when
a master opens the device node. It also allows the current master
to abdicate (say while VT switched), and a new master to take over
the hardware.

It moves the Intel and radeon drivers to using the sarea from
within the new master structures.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-12-29 17:47:22 +10:00
Dave Airlie
fae7043c65 drm/radeon: don't actually enable the IRQ regs until irq is enabled
vblank can try and enable the IRQ registers before we've set the interrupt
handler up.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-12-09 15:30:50 +10:00
Dave Airlie
78538bf149 drm/radeon: map registers at load time
Now that the radeon driver has suspend/resume functions, it needs to map its
registers at load time or it will likely crash if a suspend operation occurs
before the driver has been initialized.

This patch moves the register mapping code from firstopen to load and makes
the mapping into a _DRM_DRIVER one so that the core won't remove it at
lastclose time.

Fixes (at least partially) kernel bz #11891.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-11-11 17:56:16 +10:00
Alex Deucher
4e270e9b8a drm/radeon: fixup further bus mastering confusion.
rs400/480 are like previous chips not like rs6xx chips.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-28 07:48:34 +10:00
Alex Deucher
edc6f389f6 radeon: fix PCI bus mastering support enables.
Someone noticed these registers moved around for later chips,
so we redo the codepaths per-chip. PCIE chips don't appear to
require explicit enables.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18 07:10:54 +10:00
Alex Deucher
b2ceddfa52 radeon: add RS400 family support.
This adds support for the RS400 family of IGPs for Intel CPUs.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18 07:10:54 +10:00
Alex Deucher
f0738e9240 drm/radeon: add support for RS740 IGP chipsets.
This adds support for the HS2100 IGP chipset.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18 07:10:54 +10:00
Jesse Barnes
0a3e67a4ca drm: Rework vblank-wait handling to allow interrupt reduction.
Previously, drivers supporting vblank interrupt waits would run the interrupt
all the time, or all the time that any 3d client was running, preventing the
CPU from sleeping for long when the system was otherwise idle.  Now, interrupts
are disabled any time that no client is waiting on a vblank event. The new
method uses vblank counters on the chipsets when the interrupts are turned
off, rather than counting interrupts, so that we can continue to present
accurate vblank numbers.

Co-author: Michel Dänzer <michel@tungstengraphics.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18 07:10:11 +10:00
Jerome Glisse
54f961a628 radeon: fix some hard lockups on r3/4/500s
This patch should fix hard lockup and convert them in
softlockup (ie you can ssh the box but the gpu is busted
and we are waiting in loop for it to come back to reason).

Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-08-25 06:34:58 +10:00
Dave Airlie
c0e09200dc drm: reorganise drm tree to be more future proof.
With the coming of kernel based modesetting and the memory manager stuff,
the everything in one directory approach was getting very ugly and
starting to be unmanageable.

This restructures the drm along the lines of other kernel components.

It creates a drivers/gpu/drm directory and moves the hw drivers into
subdirectores. It moves the includes into an include/drm, and
sets up the unifdef for the userspace headers we should be exporting.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-07-14 10:45:01 +10:00