COMMON_CLK is a user-selectable option with its own dependencies. The
most important dependency is !HAVE_LEGACY_CLK. User-selectable drivers
should not select COMMON_CLK because they will create a dependency cycle
and build failures. For example on MIPS a configuration with COMMON_CLK
(selected by SND_SUN8I_CODEC) and HAVE_LEGACY_CLK (selected by
SOC_RT305X) is possible:
WARNING: unmet direct dependencies detected for COMMON_CLK
Depends on [n]: !HAVE_LEGACY_CLK [=y]
Selected by [y]:
- SND_SUN8I_CODEC [=y] && SOUND [=y] && !UML && SND [=y] && SND_SOC [=y] &&
(ARCH_SUNXI || COMPILE_TEST [=y]) && OF [=y] && (MACH_SUN8I || ARM64 && ARCH_SUNXI || COMPILE_TEST [=y])
/usr/bin/mips-linux-gnu-ld: drivers/clk/clk.o: in function `clk_set_rate':
(.text+0xaeb4): multiple definition of `clk_set_rate'; arch/mips/ralink/clk.o:(.text+0x88): first defined here
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201118201420.4878-1-krzk@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Checkpatch script produces warning:
WARNING: function definition argument 'const struct sun4i_i2s *'
should also have an identifier name.
Let's fix this by adding identifier name to get_bclk_parent_rate()
and set_fmt() callback definition.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Link: https://lore.kernel.org/r/20201030144648.397824-10-peron.clem@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Because SUN4I_I2S_FIFO_CTRL_REG is volatile, writes done while the
regmap is cache-only are ignored. To work around this, move the
configuration to a callback that runs while the ASoC core has a
runtime PM reference to the device.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Link: https://lore.kernel.org/r/20201030144648.397824-9-peron.clem@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
The FIFO TX reg is volatile and sun8i i2s register
mapping is different from sun4i.
Even if in this case it's doesn't create an issue,
Avoid setting some regs that are undefined in sun8i.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Link: https://lore.kernel.org/r/20201030144648.397824-8-peron.clem@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Extend the functionality of the driver to include support of 20 and
24 bits per sample.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Link: https://lore.kernel.org/r/20201030144648.397824-7-peron.clem@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
On the newer SoCs such as the H3 and A64 this is set by default
to transfer a 0 after each sample in each slot. However the A10
and A20 SoCs that this driver was developed on had a default
setting where it padded the audio gain with zeros.
This isn't a problem while we have only support for 16bit audio
but with larger sample resolution rates in the pipeline then SEXT
bits should be cleared so that they also pad at the LSB. Without
this the audio gets distorted.
Set sign extend sample for all the sunxi generations even if they
are not affected. This will keep consistency and avoid relying on
default.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Link: https://lore.kernel.org/r/20201030144648.397824-6-peron.clem@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
We are actually using a complex formula to just return a bunch of
simple values. Also this formula is wrong for sun4i when calling
get_wss() the function return 4 instead of 3.
Replace this with a simpler switch case.
Also drop the i2s params which is unused and return a simple int as
returning an error code could be out of range for an s8 and there is
no optim to return a s8 here.
Fixes: 619c15f7fa ("ASoC: sun4i-i2s: Change SR and WSS computation")
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Link: https://lore.kernel.org/r/20201030144648.397824-5-peron.clem@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
H6 I2S is very similar to that in H3, except it supports up to 16
channels.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Link: https://lore.kernel.org/r/20201030144648.397824-4-peron.clem@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
As slots and slot_width can be set manually using set_tdm().
These values are then kept in sun4i_i2s struct.
So we need to check if these values are set or not.
This is not done actually and will trigger a bug.
For example, if we set to the simple soundcard in the device-tree
dai-tdm-slot-width = <32> and then start a stream using S16_LE,
currently we would calculate BCLK for 32-bit slots, but program
lrck_period for 16-bit slots, making the sample rate double what we
expected.
To fix this, we need to check if these values are set or not but as
this logic is already done by the caller. Avoid duplicating this
logic and just pass the required values as params to set_chan_cfg().
Suggested-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Link: https://lore.kernel.org/r/20201030144648.397824-3-peron.clem@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Left and Right justified mode are computed using the same formula
as DSP_A and DSP_B mode.
Which is wrong and the user manual explicitly says:
LRCK_PERDIOD:
PCM Mode: Number of BCLKs within (Left + Right) channel width.
I2S/Left-Justified/Right-Justified Mode: Number of BCLKs within each
individual channel width(Left or Right)
Fix this by using the same formula as the I2S mode.
Fixes: 7ae7834ec4 ("ASoC: sun4i-i2s: Add support for DSP formats")
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201030144648.397824-2-peron.clem@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
AIF3 has some differences from AIF1 and AIF2:
- It supports one channel only
- It supports master mode only
- It is not directly connected to any of the mixers; instead all audio
goes through a mux with AIF2.
- It does not have its own clock dividers; instead it reuses AIF2 BCLK
and LRCK. This means that when both AIF2 and AIF3 are active, they
must use the same sample rate and total frame width. Since AIF2 and
AIF3 are only used for codec2codec DAI links, constraints are not
applicable here; the only thing we can do when the rates don't match
is report an error.
Make the necessary adjustments to support this AIF.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-18-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This adds support for AIF2, which is stereo and has fullly independent
clocking capability, making it very similar to AIF1.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-17-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The AIF clock control register has the same layout for all three AIFs.
The only difference between them is that AIF3 is missing some fields. We
can reuse the same register field definitions for all three registers,
and use the DAI ID to select the correct register address.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201014061941.4306-16-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Now that the DAI clock setup is correct for all hardware-supported PCM
formats, we can enable them in the driver. With the appropriate support
in the CPU DAI driver, this allows userspace to access the additional
formats.
Since this codec is connected to the CPU via a DAI, not directly, we do
not care if the CPU DAI is using 3-byte or 4-byte formats, so we can
support them both.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-15-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Now that we guarantee that SYSCLK is running at the optimal rate when
hw_params succeeds, and that it will continue running at that rate,
SYSCLK will always be an integer multiple of BCLK. So we can always
pick the exact divider, not just the closest divider.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-14-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The codec's clock input is shared among all AIFs, and shared with other
audio-related hardware in the SoC, including I2S and SPDIF controllers.
To ensure sample rates selected by userspace or by codec2codec DAI links
are maintained, the clock rate must be protected while it is in use.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201014061941.4306-13-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
While another stream is active, only allow userspace to use sample rates
that are compatible with the current SYSCLK frequency. This ensures the
actual sample rate will always match what is given in hw_params.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-12-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The sun8i codec has three clock/sample rate domains:
- The AIF1 domain, with a sample rate equal to AIF1 LRCK
- The AIF2 domain, with a sample rate equal to AIF2 LRCK
- The SYSCLK domain, containing the ADC, DAC, and effects (AGC/DRC),
with a sample rate given by a divisor from SYSCLK. The divisor is
controlled by the AIF1_FS or AIF2_FS field in SYS_SR_CTRL, depending
on if SYSCLK's source is AIF1CLK or AIF2CLK, respectively. The exact
sample rate depends on if SYSCLK is running at 22.6 MHz or 24.6 MHz.
When an AIF (currently only AIF1) is active, the ADC and DAC should run
at that sample rate to avoid artifacting. Sample rate conversion is only
available when multiple AIFs are active and are routed to each other;
this means the sample rate conversion hardware usually cannot be used.
Only attach the event hook to the channel 0 AIF widgets, since we only
need one event when a DAI stream starts or stops. Channel 0 is always
brought up with a DAI stream, regardless of the number of channels in
the stream.
The ADC and DAC (along with their effects blocks) can be used even if
no AIFs are in use. In that case, we should select an appropriate sample
rate divisor, instead of keeping the last-used AIF sample rate.
44.1/48 kHz was chosen to balance audio quality and power consumption.
Since the sample rate is tied to active AIF paths, disabling pmdown_time
allows switching to the optimal sample rate immediately, instead of
after a 5 second delay.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201014061941.4306-11-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The system sample rate programmed into the hardware is really a clock
divider from SYSCLK to the ADC and DAC. Since we support two SYSCLK
frequencies, we can use all sample rates corresponding to one of those
frequencies divided by any available divisor.
This commit enables support for those sample rates. It also stops
advertising support for a 64 kHz sample rate, which is not supported.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-10-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The AIFs have a single register controlling DAI parameters in both
directions, including BCLK/LRCK divisor and word size. The DAIs produce
only noise or silence if any of these parameters is wrong. Therefore, we
need to enforce symmetry for these parameters, so starting a new
substream will not break an existing substream.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-9-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Now that BCLK and LRCK rate calculations in the driver can handle any
hardware-supported slot width and number of slots, allow overriding
those parameters from the device tree.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-8-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Previously, the BCLK divisor calculation assumed zero padding and
exactly two slots. In order to support the TDM slot binding and
20/24-bit word sizes, those assumptions must be removed.
Due to hardware limitations, the BCLK/LRCK ratio is not as simple as
"slot_width * slots". However, the correct value is already calculated
elsewhere in this function, since it must also be programmed into the
hardware. Reuse that value to calculate the correct SYSCLK/BCLK divisor.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-7-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The codec supports only power-of-two BCLK/LRCK divisors. If either the
slot width or the number of slots is not a power of two, the LRCK
divisor must be rounded up to provide enough space. To do that, use
order_base_2 (instead of ilog2, which rounds down).
Since the rounded divisor is also needed for setting the SYSCLK/BCLK
divisor, return the order base 2 instead of fully calculating the
hardware register encoding.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-6-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The hardware supports 8 to 24-bit word sizes on all three of its DAIs,
only one of which is connected to the CPU DAI. Program the word size
based on the actual selected format, instead of assuming limitations
from another driver (which, incedentally, has patches pending to remove
that limitation).
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-5-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
When using the I2S, LEFT_J, or RIGHT_J format, the hardware supports
independent BCLK and LRCK inversion control. When using DSP_A or DSP_B,
LRCK inversion is not supported. The register bit is repurposed to
select between DSP_A and DSP_B. Extend the driver to support this.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201014061941.4306-4-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The LRCK inversion bit has a different meaning in DSP mode: it selects
between the DSP A and DSP B formats. To support this, we need to know if
the selected format is a DSP format. One easy way to do this is to set
the format field before the clock inversion fields.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-3-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
In preparation for adding additional DAIs to this component, convert the
DAI driver definition to an array. Since this changes all of the lines
in the definition anyway, let's move it closer to the ops function
definitions, instead of on the far side of the DAPM arrays. And while
moving the DAI driver ops, rename the set_fmt hook to match the usual
naming scheme.
Give the existing DAI an explicit ID and more meaningful stream names,
so it will remain unique as more DAIs are added. The AIF widget streams
must be updated to match.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-2-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Remove a level of indirection by getting the device directly from the
passed-in struct snd_soc_dai, instead of going through its component.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201001021148.15852-9-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Each left/right pair of AIF input/output channels can be swapped or
combined. This is useful for sending a mono audio source to both sides
of a stereo sink, or for creating complex mixing scenarios.
Add the support to control this feature from userspace.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201001021148.15852-8-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Both the left and right side widgets referenced channel 0. This would
unnecessarily power on the right side widget (and its associated path)
when a mono stream was active.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201001021148.15852-7-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Whie the aif_in and aif_out widget types are handled exactly the same in
the core DAPM code, a future widget event hook will need the correct
widget type to derive the associated substream. Clean up the widget type
for that reason, and so these widgets will match newly-added widgets for
the other AIFs.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201001021148.15852-6-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This cleans up the mixer widget names. The AIF1 AD0 Mixer names were
previously wrong -- they do not control the digital side of the ADC. The
DAC mixer widgets were not wrong, but they were verbose and did not
match the naming scheme of the other widgets.
The mixer controls are not renamed because they are exposed to
userspace.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201001021148.15852-5-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Sort the remaining pieces of the DAPM driver so that they are all in the
same order among controls/widgets/routes, and so they roughly match the
register word and bit order of the hardware. This nicely separates the
AIF-related widgets from the ADC/DAC widgets, which allows the AIF
widgets to stay in a logical order as more AIFs are added to the driver.
No widgets are renamed, to ease verification that this commit makes no
functional change.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201001021148.15852-4-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This matches the module power-up/down sequence from the vendor's driver.
While updating these widgets/routes, reorder them to match the register
and bit layout of the hardware. This puts them in the same place in the
widget and route arrays (previously they were at opposite ends), and it
makes it easier to track which parts of which registers are implemented.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201001021148.15852-3-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The sun8i codec is effectively an on-die variant of the X-Powers AC100
codec. The AC100 can derive its clocks from either of two I2S master
clocks or an internal PLL. For the on-die variant, Allwinner replaced
the codec's own PLL with a connection to SoC's existing PLL_AUDIO, and
they connected both I2S MCLK inputs to the same source -- which happens
to be an integer divider from the same PLL_AUDIO.
So there's actually no clocking flexibility. To run SYSCLK at the
required rate, it must be run straight from the PLL. The only choice is
whether it goes through AIF1CLK or AIF2CLK. Since both run at the same
rate, the only effect of that choice is which field in SYS_SR_CTRL
(AIF1_FS or AIF2_FS) controls the system sample rate.
Since AIFnCLK is required to bring up the corresponding DAI, and AIF1
(connected to the CPU) is used most often, let's use AIF1CLK as the
SYSCLK parent. That means we no longer need to set AIF2_FS.
Since this clock tree never changes, we can program it from the
component probe function, instead of using DAPM widgets. The DAPM
widgets unnecessarily change clock parents when the codec goes in/out
of idle and the supply widgets are powered up/down.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201001021148.15852-2-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
By representing the module clock as a DAPM widget, we ensure that the
clock is only enabled when the module is actually in use, without
additional code in runtime PM hooks.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200831034852.18841-10-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
When attached to the regmap, the bus clock is automatically enabled as
needed to access device registers. This avoids needing code to manage it
separately in the driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200831034852.18841-9-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
All other definitions are sorted from largest to smallest bit number.
This makes the AIF1CLK_CTRL mask constants consistent with them.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20200831034852.18841-8-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Several fields have inconsistent indentation, presumably because the
patch "looked correct" due to the additional "+" character at the
beginning of the line.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20200831034852.18841-7-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Even though they are for the left channel mixer, they are documented as
"MXR_SRC". This matches the naming scheme used for the main DAC. The "R"
is part of the abbreviation for "mixer", not a reference to the channel.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20200831034852.18841-5-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This driver is for the digital part of the codec only. The analog part,
including the microphone inputs, is managed by a separate driver. These
widgets look like they were copied from sun4i-codec. Since they do not
perform any function in this driver, remove them.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20200831034852.18841-2-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Due to a mistake made while reordering patches, commit 90cac93297
("ASoC: sun8i-codec: Fix DAPM to match the hardware topology") added
the sun8i_codec_component_probe function without referencing it from
the component definition. Add the reference so the probe function gets
called as expected.
Fixes: 90cac93297 ("ASoC: sun8i-codec: Fix DAPM to match the hardware topology")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20200819034038.46418-1-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This series performs some minor cleanup on the driver for the analog
codec in the Allwinner A64, and hooks up the existing mute switches to
DAPM widgets, in order to provide improved power management.
Changes since v1:
- Collected Acked-by/Reviewed-by tags
- Used SOC_MIXER_NAMED_CTL_ARRAY to avoid naming a widget "Earpiece"
Samuel Holland (8):
ASoC: sun50i-codec-analog: Fix duplicate use of ADC enable bits
ASoC: sun50i-codec-analog: Gate the amplifier clock during suspend
ASoC: sun50i-codec-analog: Group and sort mixer routes
ASoC: sun50i-codec-analog: Make headphone routes stereo
ASoC: sun50i-codec-analog: Enable DAPM for headphone switch
ASoC: sun50i-codec-analog: Make line out routes stereo
ASoC: sun50i-codec-analog: Enable DAPM for line out switch
ASoC: sun50i-codec-analog: Enable DAPM for earpiece switch
sound/soc/sunxi/sun50i-codec-analog.c | 176 ++++++++++++++++----------
1 file changed, 111 insertions(+), 65 deletions(-)
--
2.26.2
This series fixes a couple of issues with the digital audio codec in the
Allwinner A64 SoC:
1) Left/right channels were swapped when playing/recording audio
2) DAPM topology was wrong, breaking some kcontrols
This is the minimum set of changes necessary to fix these issues in a
backward-compatible way. For that reason, some DAPM widgets still have
incorrect or confusing names; those and other issues will be fixed in
later patch sets.
Samuel Holland (7):
ASoC: dt-bindings: Add a new compatible for the A64 codec
ASoC: sun8i-codec: Fix DAPM to match the hardware topology
ASoC: sun8i-codec: Add missing mixer routes
ASoC: sun8i-codec: Add a quirk for LRCK inversion
ARM: dts: sun8i: a33: Update codec widget names
arm64: dts: allwinner: a64: Update codec widget names
arm64: dts: allwinner: a64: Update the audio codec compatible
.../sound/allwinner,sun8i-a33-codec.yaml | 6 +-
arch/arm/boot/dts/sun8i-a33-olinuxino.dts | 4 +-
arch/arm/boot/dts/sun8i-a33.dtsi | 4 +-
.../dts/allwinner/sun50i-a64-bananapi-m64.dts | 8 +-
.../dts/allwinner/sun50i-a64-orangepi-win.dts | 8 +-
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 8 +-
.../dts/allwinner/sun50i-a64-pinebook.dts | 8 +-
.../dts/allwinner/sun50i-a64-pinephone.dtsi | 8 +-
.../boot/dts/allwinner/sun50i-a64-pinetab.dts | 8 +-
.../allwinner/sun50i-a64-sopine-baseboard.dts | 8 +-
.../boot/dts/allwinner/sun50i-a64-teres-i.dts | 8 +-
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 11 +-
sound/soc/sunxi/sun8i-codec.c | 137 ++++++++++++++----
13 files changed, 155 insertions(+), 71 deletions(-)
--
2.26.2
By including the earpiece mute switch in the DAPM graph, both the
earpiece amplifier and the Mixer/DAC inputs can be powered off when
the earpiece is muted.
While the widget is really just a simple switch, it is represented
as a "mixer with named controls" to avoid including the widget name
in the kcontrol name. Otherwise, it is not possible to give the widget
an accurate, descriptive name without changing the kcontrol name
seen by userspace (which should be stable).
The mute switch is between the source selection and the amplifier,
as per the diagram in the SoC manual.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20200726025334.59931-9-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
By including the line out mute switch in the DAPM graph, the
Mixer/DAC inputs can be powered off when the line output is muted.
The line outputs have an unusual routing scheme. The left side mute
switch is between the source selection and the amplifier, as usual.
The right side source selection comes *after* its amplifier (and
after the left side amplifier), and its mute switch controls
whichever source is currently selected. This matches the diagram in
the SoC manual.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20200726025334.59931-8-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
