Commit Graph

563 Commits

Author SHA1 Message Date
Dmitry Osipenko
04184b1fc9 drm/tegra: gem: Correct iommu_map_sg() error checking
iommu_map_sg() doesn't return a error value, but a size of the requested
IOMMU mapping or zero in case of error.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-21 14:52:39 +01:00
Dmitry Osipenko
f68ba6912b drm/tegra: dc: Link DC1 to DC0 on Tegra20
Hardware reset isn't actually broken on Tegra20, but there is a
dependency on the first display controller to be taken out of reset for
the second to be enabled successfully. Model this dependency using a PM
device link.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
[treding@nvidia.com: minor cleanups, extend commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-21 14:52:38 +01:00
Arnd Bergmann
39f55c61da drm/tegra: Fix non-debugfs builds
The new debugfs registration fails to build when CONFIG_DEBUGFS is
disabled, because the drm_crtc structure is lacking a member in that
configuration:

drivers/gpu/drm/tegra/dc.c: In function 'tegra_dc_late_register':
drivers/gpu/drm/tegra/dc.c:1204:28: error: 'struct drm_crtc' has no member named 'debugfs_entry'

Without CONFIG_DEBUGFS, the rest of the function already degrades
into nothing, so we just avoid the one assignment.

Fixes: b95800eeef ("drm/tegra: dc: Register debugfs in ->late_register()")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-21 14:52:38 +01:00
Thierry Reding
72ba4cf524 drm/tegra: dpaux: Keep reset defaults for hybrid pad parameters
Keep the reset values for the common mode voltage, output driver
impedance control and output driver current control parameters. This
fixes errors seen during SCDC communication with HDMI sinks.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-21 14:52:37 +01:00
Arnd Bergmann
013e2b722a drm/tegra: Mark Tegra186 display hub PM functions __maybe_unused
The newly introduced driver has optional suspend/resume functions,
causing a warning when CONFIG_PM is disabled:

drivers/gpu/drm/tegra/hub.c:749:12: error: 'tegra_display_hub_resume' defined but not used [-Werror=unused-function]
drivers/gpu/drm/tegra/hub.c:733:12: error: 'tegra_display_hub_suspend' defined but not used [-Werror=unused-function]

This marks them __maybe_unused to shut up the warnings.

Fixes: c4755fb906 ("drm/tegra: Add Tegra186 display hub support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-21 14:52:37 +01:00
Thierry Reding
bc8828bd08 drm/tegra: Use IOMMU groups
In order to support IOMMUs more generically and transparently handle the
ARM SMMU on Tegra186, move to using groups instead of devices for domain
attachment. An IOMMU group is a set of devices that share the same IOMMU
domain and is therefore a good match to represent what Tegra DRM needs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-21 14:52:36 +01:00
Thierry Reding
ab7d3f5826 drm/tegra: Implement zpos property
Implement the standard zpos property for planes on Tegra124 and later.
Earlier generations have a different blending unit that needs different
programming.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-21 14:52:35 +01:00
Thierry Reding
363541e8ee drm/tegra: dc: Remove redundant spinlock
The spinlock is only used to serialize accesses to the DC_CMD_INT_MASK
register. However, this register is accesses either with interrupts
masked (in tegra_crtc_atomic_enable()) or protected by the vbl_lock and
vblank_time_lock spinlocks of the DRM device. Therefore, these accesses
don't need any extra serialization and the lock can be removed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-21 14:52:35 +01:00
Thierry Reding
1087fac18b drm/tegra: dc: Use direct offset to plane registers
Traditionally, windows were accessed indirectly, through a register
selection window that required a global register to be programmed with
the index of the window to access. Since the global register could be
written from modesetting functions as well as the interrupt handler
concurrently, accesses had to be serialized using a lock. Using direct
accesses to the window registers the lock can be avoided.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-21 14:52:34 +01:00
Thierry Reding
511c7023cf drm/tegra: dc: Support more formats
Also, split up formats into per-SoC lists because not all generations
support all of them. Note that the list is now exhaustive for all RGB
formats, but not for YUV and indexed formats.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-21 14:52:29 +01:00
Thierry Reding
71835caa00 drm/tegra: fb: Force alpha formats
Tegra20 and Tegra30 don't actually support the 24-bit RGB formats that
don't have an alpha component. In order to allow the fbdev emulation to
run on those chips, force the 32-bit RGBA formats.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 14:36:39 +01:00
Thierry Reding
7b2c2845e5 drm/tegra: dpaux: Add Tegra186 support
DPAUX is the same as on previous generations. Supporting it is as simple
as adding the compatible string so that the driver will bind to any of
the devices.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 14:36:38 +01:00
Thierry Reding
82b81b3ec1 drm/tegra: dpaux: Implement runtime PM
Move clock and reset management into runtime PM callbacks and hook them
up. This cleans up the code structure so that power management code does
not clutter up the rest.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 14:36:38 +01:00
Thierry Reding
36e90221ac drm/tegra: sor: Support HDMI 2.0 modes
In addition to using the SCDC helpers to enable support for scrambling
for HDMI 2.0 modes, take into account the high pixel clocks when
programming some of the registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 14:36:37 +01:00
Thierry Reding
c57997bce4 drm/tegra: sor: Add Tegra186 support
The SOR found on Tegra186 is very similar to the one found on Tegra210
and earlier. However, due to some changes in the display architecture,
some programming sequences have changed and some register have moved
around.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 14:36:36 +01:00
Thierry Reding
880cee0b7f drm/tegra: sor: Parameterize register offsets
Future Tegra generations have an increased number of display controllers
that can drive individual SORs. In order to support that, the offset and
layout of some registers has changed in backwards-incompatible ways. Use
parameterized register offsets to support this.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 14:16:39 +01:00
Thierry Reding
7772fdaef9 drm/tegra: Support ARGB and ABGR formats
These formats can easily be supported on all generations of Tegra.

Note that the XRGB and XBGR formats that we supported were in fact using
the ARGB and ABGR Tegra formats. This happened to work in cases where no
alpha was being considered. This change is also a fix for those formats.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 14:16:39 +01:00
Thierry Reding
473079549f drm/tegra: dc: Add Tegra186 support
The display architecture has changed in several signifcant ways with the
new Tegra186 SoC. Display controllers are a completely different design,
but have been given a frontend that simulates the register interface for
earlier chips.

Unfortunately the frontend isn't completely backwards compatible, so the
driver needs parameterization to take the changes into account.

One big change is that the total number of display controllers has been
increased to three. At the same time the number of planes available has
remained constant. However, planes can now be freely assigned between
the display controllers, giving applications more flexibility in making
the best use of the available resources.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 14:16:38 +01:00
Thierry Reding
c4755fb906 drm/tegra: Add Tegra186 display hub support
The display architecture has changed in several significant ways with
the new Tegra186 SoC. Shared between all display controllers is a set
of common resources referred to as the display hub. The hub generates
accesses to memory and feeds them into various composition pipelines,
each of which being a window that can be assigned to arbitrary heads.

Atomic state is subclassed in order to track the global bandwidth
requirements and select and adjust the hub clocks appropriately. The
plane code is shared to a large degree with earlier SoC generations,
except where the programming differs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 14:16:37 +01:00
Thierry Reding
5acd351427 drm/tegra: Move common plane code to separate file
Subsequent patches will add support for Tegra186 which has a different
architecture and needs different plane code but which can share a lot of
code with earlier Tegra support.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:22 +01:00
Thierry Reding
b1415ff21d drm/tegra: dc: Move state definition to header
Move the display controller state definition to the header file so that
it can be referenced by other files.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:22 +01:00
Thierry Reding
301e0ddb34 drm/tegra: dc: Remove duplicate plane funcs
Both tegra_overlay_plane_funcs is identical to tegra_plane_funcs. Get
rid of the duplicate and use one set of function pointers for all
planes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:21 +01:00
Thierry Reding
b652ab1db4 drm/tegra: dc: Remove tegra_overlay_plane_destroy()
This function is a simple wrapper around tegra_plane_destroy(), so it
can be dropped.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:21 +01:00
Thierry Reding
c1cb4b6171 drm/tegra: dc: Remove duplicate plane funcs
Both tegra_primary_plane_funcs and tegra_cursor_plane_funcs are
identical. Get rid of the duplicate and use one set of function pointers
for all planes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:20 +01:00
Thierry Reding
6f70ec54e1 drm/tegra: dc: Remove tegra_primary_plane_destroy()
This function is a simple wrapper around tegra_plane_destroy(), so it
can be dropped.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:20 +01:00
Thierry Reding
9d99ab6e5f drm/tegra: Remove custom page-flip handler
Tegra display hardware has GO bits and meets all the requirements to use
drm_crtc_arm_vblank_event(). Use it instead and get rid of the hand-
rolled implementation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:10 +01:00
Thierry Reding
31b02caea3 drm/tegra: Use atomic commit helpers
There's no reason not to use them, and they already get all the
semantics right, so rip out all of the custom code and replace it by the
helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:10 +01:00
Thierry Reding
7116e9a802 drm/tegra: dc: Support background color
Starting with Tegra124, the interface to set the background color (the
value generated for pixels that are not sourced from any window) is via
a different register. Earlier generations called this the border color.
Reverse the feature flag and assume that IP revisions that don't have
support for background color will support border color instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:09 +01:00
Thierry Reding
9b49f674eb drm/tegra: vic: Properly align arguments
Properly align function arguments on subsequent lines with the first
argument on the first line.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:09 +01:00
Thierry Reding
67485fb8b8 drm/tegra: Do not wrap lines unnecessarily
The tegra_drm_alloc() function signature fits on a single line, no need
to wrap it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:09 +01:00
Thierry Reding
5b8e043b6d drm/tegra: sor: Register debugfs in ->late_register()
The ->late_register() and ->early_unregister() callbacks are called at
the right time to make sure userspace only accesses interfaces when it
should. Move debugfs registration and unregistration to these callback
functions to avoid potential races with userspace.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:08 +01:00
Thierry Reding
d92e600998 drm/tegra: sor: Root debugfs files at the connector
Rather create new files within the top-level DRM device's debugfs node,
add the SOR specific files to the connector's debugfs node. This avoids
the need to come up with subdirectory names and is also more intuitive.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:08 +01:00
Thierry Reding
1d60047dd6 drm/tegra: hdmi: Register debugfs in ->late_register()
The ->late_register() and ->early_unregister() callbacks are called at
the right time to make sure userspace only accesses interfaces when it
should. Move debugfs registration and unregistration to these callback
functions to avoid potential races with userspace.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:07 +01:00
Thierry Reding
a813d70425 drm/tegra: dsi: Register debugfs in ->late_register()
The ->late_register() and ->early_unregister() callbacks are called at
the right time to make sure userspace only accesses interfaces when it
should. Move debugfs registration and unregistration to these callback
functions to avoid potential races with userspace.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:07 +01:00
Thierry Reding
b95800eeef drm/tegra: dc: Register debugfs in ->late_register()
The ->late_register() and ->early_unregister() callbacks are called at
the right time to make sure userspace only accesses interfaces when it
should. Move debugfs registration and unregistration to these callback
functions to avoid potential races with userspace.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:07 +01:00
Thierry Reding
c49c81e21c drm/tegra: dc: Reshuffle some code
Reshuffle some code so that functions are defined closer to where they
are used.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:06 +01:00
Thierry Reding
062f5b2c42 drm/tegra: sor: Move register definitions into a table
After commit 932f652913 ("drm/tegra: sor: Trace register accesses"),
the debugfs register dump implementation causes excessive stack usage
and can result in build warnings. To fix this, move the register
definitions into a table and iterate over the table while dumping the
registers to debugfs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:06 +01:00
Thierry Reding
fbfe16df30 drm/tegra: hdmi: Move register definitions into a table
After commit 07a8aab899 ("drm/tegra: hdmi: Trace register accesses"),
the debugfs register dump implementation causes excessive stack usage
and can result in build warnings. To fix this, move the register
definitions into a table and iterate over the table while dumping the
registers to debugfs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:05 +01:00
Thierry Reding
a40051c0fb drm/tegra: dsi: Move register definitions into a table
After commit 75af8fa7fd ("drm/tegra: dsi: Trace register accesses"),
the debugfs register dump implementation causes excessive stack usage
and can result in build warnings. To fix this, move the register
definitions into a table and iterate over the table while dumping the
registers to debugfs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:04 +01:00
Thierry Reding
cf6824ac72 drm/tegra: dc: Move register definitions into a table
After commit 67e04d1ab1 ("drm/tegra: dc: Trace register accesses"),
the debugfs register dump implementation causes excessive stack usage
and can result in build warnings. To fix this, move the register
definitions into a table and iterate over the table while dumping the
registers to debugfs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:04 +01:00
Thierry Reding
268892cb63 drm/tegra: Sanitize format modifiers
The existing format modifier definitions were merged prematurely, and
recent work has unveiled that the definitions are suboptimal in several
ways:

  - The format specifiers, except for one, are not Tegra specific, but
    the names don't reflect that.
  - The number space is split into two, reserving 32 bits for some
    "parameter" which most of the modifiers are not going to have.
  - Symbolic names for the modifiers are not using the standard
    DRM_FORMAT_MOD_* prefix, which makes them awkward to use.
  - The vendor prefix NV is somewhat ambiguous.

Fortunately, nobody's started using these modifiers, so we can still fix
the above issues. Do so by using the standard prefix. Also, remove TEGRA
from the name of those modifiers that exist on NVIDIA GPUs as well. In
case of the block linear modifiers, make the "parameter" smaller (4
bits, though only 6 values are valid) and don't let that leak into any
of the other modifiers.

Finally, also use the more canonical NVIDIA instead of the ambiguous NV
prefix.

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:42:02 +01:00
Dave Airlie
2c1c55cb75 Merge tag 'drm-misc-next-2017-11-30' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
Cross-subsystem Changes:

- device tree doc for the Mitsubishi AA070MC01 and Tianma TM070RVHG71
panels (Lukasz Majewski) and for a 2nd endpoint on stm32 (Philippe Cornu)

Core Changes:

The most important changes are:

- Add drm_driver .last_close and .output_poll_changed helpers to reduce
fbdev emulation footprint in drivers (Noralf)
- Fix plane clipping in core and for vmwgfx (Ville)

Then we have a bunch of of improvement for print and debug such as the
addition of a framebuffer debugfs file. ELD connector, HDMI and
improvements.  And a bunch of misc improvements, clean ups and style
changes and doc updates

[airlied: drop eld bits from amdgpu_dm]

Driver Changes:

- sii8620: filter unsupported modes and add DVI mode support (Maciej Purski)
- rockchip: analogix_dp: Remove unnecessary init code (Jeffy Chen)
- virtio, cirrus: add fb create_handle support to enable screenshots(Lepton Wu)
- virtio: replace reference/unreference with get/put (Aastha Gupta)
- vc4, gma500: Convert timers to use timer_setup() (Kees Cook)
- vc4: Reject HDMI modes with too high of clocks (Eric)
- vc4: Add support for more pixel formats (Dave Stevenson)
- stm: dsi: Rename driver name to "stm32-display-dsi" (Philippe Cornu)
- stm: ltdc: add a 2nd endpoint (Philippe Cornu)
- via: use monotonic time for VIA_WAIT_IRQ (Arnd Bergmann)

* tag 'drm-misc-next-2017-11-30' of git://anongit.freedesktop.org/drm/drm-misc: (96 commits)
  drm/bridge: tc358767: add copyright lines
  MAINTAINERS: change maintainer for Rockchip drm drivers
  drm/vblank: Fix vblank timestamp debugs
  drm/via: use monotonic time for VIA_WAIT_IRQ
  dma-buf: Fix ifnullfree.cocci warnings
  drm/printer: Add drm_vprintf()
  drm/edid: Allow HDMI infoframe without VIC or S3D
  video/hdmi: Allow "empty" HDMI infoframes
  dma-buf/fence: Fix lock inversion within dma-fence-array
  drm/sti: Handle return value of platform_get_irq_byname
  drm/vc4: Add support for NV21 and NV61.
  drm/vc4: Use .pixel_order instead of custom .flip_cbcr
  drm/vc4: Add support for DRM_FORMAT_RGB888 and DRM_FORMAT_BGR888
  drm: Move drm_plane_helper_check_state() into drm_atomic_helper.c
  drm: Check crtc_state->enable rather than crtc->enabled in drm_plane_helper_check_state()
  drm/vmwgfx: Try to fix plane clipping
  drm/vmwgfx: Use drm_plane_helper_check_state()
  drm/vmwgfx: Remove bogus crtc coords vs fb size check
  gpu: gma500: remove unneeded DRIVER_LICENSE #define
  drm: don't link DP aux i2c adapter to the hardware device node
  ...
2017-12-04 05:42:49 +10:00
Linus Torvalds
c353bfc6eb fixes/cleanups for rc1, non-desktop flags for VR
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Merge tag 'drm-for-v4.15-part2' of git://people.freedesktop.org/~airlied/linux

Pull more drm updates from Dave Airlie:
 "Fixes/cleanups for rc1, non-desktop flags for VR

   - remove the MSM dt-bindings file Rob managed to push in the previous
     pull.

   - add a property/edid quirk to denote HMD devices, I had these
     hanging around for a few weeks and Keith had done some work on
     them, they are fairly self contained and small, and only affect
     people using HTC Vive VR headsets so far.

   - amdgpu, tegra, tilcdc, fsl fixes

   - some imx-drm cleanups I missed, these seemed pretty small, and no
     reason to hold off.

  I have one TTM regression fix (fixes bochs-vga in qemu) sitting
  locally awaiting review I'll probably send that in a separate pull
  request tomorrow"

* tag 'drm-for-v4.15-part2' of git://people.freedesktop.org/~airlied/linux: (33 commits)
  dt-bindings: remove file that was added accidentally
  drm/edid: quirk HTC vive headset as non-desktop. [v2]
  drm/fb: add support for not enabling fbcon on non-desktop displays [v2]
  drm: add connector info/property for non-desktop displays [v2]
  drm/amdgpu: fix rmmod KCQ disable failed error
  drm/amdgpu: fix kernel hang when starting VNC server
  drm/amdgpu: don't skip attributes when powerplay is enabled
  drm/amd/pp: fix typecast error in powerplay.
  drm/tilcdc: Remove obsolete "ti,tilcdc,slave" dts binding support
  drm/tegra: sor: Reimplement pad clock
  Revert "drm/radeon: dont switch vt on suspend"
  drm/amd/amdgpu: fix over-bound accessing in amdgpu_cs_wait_any_fence
  drm/amd/powerplay: fix unfreeze level smc message for smu7
  drm/amdgpu:fix memleak
  drm/amdgpu:fix memleak in takedown
  drm/amd/pp: fix dpm randomly failed on Vega10
  drm/amdgpu: set f_mapping on exported DMA-bufs
  drm/amdgpu: Properly allocate VM invalidate eng v2
  drm/fsl-dcu: enable IRQ before drm_atomic_helper_resume()
  drm/fsl-dcu: avoid disabling pixel clock twice on suspend
  ...
2017-11-23 21:04:56 -10:00
Daniel Vetter
70c5f93669 Merge airlied/drm-next into drm-misc-next
Bake in the conflict between the drm_print.h extraction and the
addition of DRM_DEBUG_LEASES since we lost it a few too many times.

Also fix a new use of drm_plane_helper_check_state in msm to follow
Ville's conversion in

commit a01cb8ba3f
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Wed Nov 1 22:16:19 2017 +0200

    drm: Move drm_plane_helper_check_state() into drm_atomic_helper.c

Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-11-21 14:17:56 +01:00
Ville Syrjälä
a01cb8ba3f drm: Move drm_plane_helper_check_state() into drm_atomic_helper.c
drm_plane_helper_check_update() isn't a transitional helper, so let's
rename it to drm_atomic_helper_check_plane_state() and move it into
drm_atomic_helper.c.

v2: Fix the WARNs about plane_state->crtc matching crtc_state->crtc

Cc: Daniel Vetter <daniel@ffwll.ch>
Suggested-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171101201619.6175-1-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-11-20 21:14:22 +02:00
Ville Syrjälä
10b47ee02d drm: Check crtc_state->enable rather than crtc->enabled in drm_plane_helper_check_state()
drm_plane_helper_check_state() is supposed to do things the atomic way,
so it should not be inspecting crtc->enabled. Rather we should be
looking at crtc_state->enable.

We have a slight complication due to drm_plane_helper_check_update()
reusing drm_plane_helper_check_state() for non-atomic drivers. Thus
we'll have to pass the crtc_state in manally and construct a fake
crtc_state in drm_plane_helper_check_update().

v2: Fix the WARNs about plane_state->crtc matching crtc_state->crtc

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171101201558.6059-1-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-11-20 20:33:21 +02:00
Thierry Reding
e1335e2f0c drm/tegra: sor: Reimplement pad clock
The current implementation of the pad clock isn't quite correct. This
has the side-effect of being incompatible with the implementation for
Tegra186 (provided by the BPMP) and therefore would require a massive
change to the driver to cope with the differences. Instead, simply do
what Tegra186 does and add some code to fallback to the old behaviour
for existing device trees.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-11-20 13:23:54 +01:00
Linus Torvalds
e60e1ee606 main drm pull request for v4.15
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Merge tag 'drm-for-v4.15' of git://people.freedesktop.org/~airlied/linux

Pull drm updates from Dave Airlie:
 "This is the main drm pull request for v4.15.

  Core:
   - Atomic object lifetime fixes
   - Atomic iterator improvements
   - Sparse/smatch fixes
   - Legacy kms ioctls to be interruptible
   - EDID override improvements
   - fb/gem helper cleanups
   - Simple outreachy patches
   - Documentation improvements
   - Fix dma-buf rcu races
   - DRM mode object leasing for improving VR use cases.
   - vgaarb improvements for non-x86 platforms.

  New driver:
   - tve200: Faraday Technology TVE200 block.

     This "TV Encoder" encodes a ITU-T BT.656 stream and can be found in
     the StorLink SL3516 (later Cortina Systems CS3516) as well as the
     Grain Media GM8180.

  New bridges:
   - SiI9234 support

  New panels:
   - S6E63J0X03, OTM8009A, Seiko 43WVF1G, 7" rpi touch panel, Toshiba
     LT089AC19000, Innolux AT043TN24

  i915:
   - Remove Coffeelake from alpha support
   - Cannonlake workarounds
   - Infoframe refactoring for DisplayPort
   - VBT updates
   - DisplayPort vswing/emph/buffer translation refactoring
   - CCS fixes
   - Restore GPU clock boost on missed vblanks
   - Scatter list updates for userptr allocations
   - Gen9+ transition watermarks
   - Display IPC (Isochronous Priority Control)
   - Private PAT management
   - GVT: improved error handling and pci config sanitizing
   - Execlist refactoring
   - Transparent Huge Page support
   - User defined priorities support
   - HuC/GuC firmware refactoring
   - DP MST fixes
   - eDP power sequencing fixes
   - Use RCU instead of stop_machine
   - PSR state tracking support
   - Eviction fixes
   - BDW DP aux channel timeout fixes
   - LSPCON fixes
   - Cannonlake PLL fixes

  amdgpu:
   - Per VM BO support
   - Powerplay cleanups
   - CI powerplay support
   - PASID mgr for kfd
   - SR-IOV fixes
   - initial GPU reset for vega10
   - Prime mmap support
   - TTM updates
   - Clock query interface for Raven
   - Fence to handle ioctl
   - UVD encode ring support on Polaris
   - Transparent huge page DMA support
   - Compute LRU pipe tweaks
   - BO flag to allow buffers to opt out of implicit sync
   - CTX priority setting API
   - VRAM lost infrastructure plumbing

  qxl:
   - fix flicker since atomic rework

  amdkfd:
   - Further improvements from internal AMD tree
   - Usermode events
   - Drop radeon support

  nouveau:
   - Pascal temperature sensor support
   - Improved BAR2 handling
   - MMU rework to support Pascal MMU

  exynos:
   - Improved HDMI/mixer support
   - HDMI audio interface support

  tegra:
   - Prep work for tegra186
   - Cleanup/fixes

  msm:
   - Preemption support for a5xx
   - Display fixes for 8x96 (snapdragon 820)
   - Async cursor plane fixes
   - FW loading rework
   - GPU debugging improvements

  vc4:
   - Prep for DSI panels
   - fix T-format tiling scanout
   - New madvise ioctl

  Rockchip:
   - LVDS support

  omapdrm:
   - omap4 HDMI CEC support

  etnaviv:
   - GPU performance counters groundwork

  sun4i:
   - refactor driver load + TCON backend
   - HDMI improvements
   - A31 support
   - Misc fixes

  udl:
   - Probe/EDID read fixes.

  tilcdc:
   - Misc fixes.

  pl111:
   - Support more variants

  adv7511:
   - Improve EDID handling.
   - HDMI CEC support

  sii8620:
   - Add remote control support"

* tag 'drm-for-v4.15' of git://people.freedesktop.org/~airlied/linux: (1480 commits)
  drm/rockchip: analogix_dp: Use mutex rather than spinlock
  drm/mode_object: fix documentation for object lookups.
  drm/i915: Reorder context-close to avoid calling i915_vma_close() under RCU
  drm/i915: Move init_clock_gating() back to where it was
  drm/i915: Prune the reservation shared fence array
  drm/i915: Idle the GPU before shinking everything
  drm/i915: Lock llist_del_first() vs llist_del_all()
  drm/i915: Calculate ironlake intermediate watermarks correctly, v2.
  drm/i915: Disable lazy PPGTT page table optimization for vGPU
  drm/i915/execlists: Remove the priority "optimisation"
  drm/i915: Filter out spurious execlists context-switch interrupts
  drm/amdgpu: use irq-safe lock for kiq->ring_lock
  drm/amdgpu: bypass lru touch for KIQ ring submission
  drm/amdgpu: Potential uninitialized variable in amdgpu_vm_update_directories()
  drm/amdgpu: potential uninitialized variable in amdgpu_vce_ring_parse_cs()
  drm/amd/powerplay: initialize a variable before using it
  drm/amd/powerplay: suppress KASAN out of bounds warning in vega10_populate_all_memory_levels
  drm/amd/amdgpu: fix evicted VRAM bo adjudgement condition
  drm/vblank: Tune drm_crtc_accurate_vblank_count() WARN down to a debug
  drm/rockchip: add CONFIG_OF dependency for lvds
  ...
2017-11-15 20:42:10 -08:00
Linus Torvalds
2cd83ba5be IOMMU Updates for Linux v4.15
* Enforce MSI multiple IRQ alignment in AMD IOMMU
 
  * VT-d PASID error handling fixes
 
  * Add r8a7795 IPMMU support
 
  * Manage runtime PM links on exynos at {add,remove}_device callbacks
 
  * Fix Mediatek driver name to avoid conflict
 
  * Add terminate support to qcom fault handler
 
  * 64-bit IOVA optimizations
 
  * Simplfy IOVA domain destruction, better use of rcache, and
    skip anchor nodes on copy
 
  * Convert to IOMMU TLB sync API in io-pgtable-arm{-v7s}
 
  * Drop command queue lock when waiting for CMD_SYNC completion on
    ARM SMMU implementations supporting MSI to cacheable memory
 
  * iomu-vmsa cleanup inspired by missed IOTLB sync callbacks
 
  * Fix sleeping lock with preemption disabled for RT
 
  * Dual MMU support for TI DRA7xx DSPs
 
  * Optional flush option on IOVA allocation avoiding overhead when
    caller can try other options
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Merge tag 'iommu-v4.15-rc1' of git://github.com/awilliam/linux-vfio

Pull IOMMU updates from Alex Williamson:
 "As Joerg mentioned[1], he's out on paternity leave through the end of
  the year and I'm filling in for him in the interim:

   - Enforce MSI multiple IRQ alignment in AMD IOMMU

   - VT-d PASID error handling fixes

   - Add r8a7795 IPMMU support

   - Manage runtime PM links on exynos at {add,remove}_device callbacks

   - Fix Mediatek driver name to avoid conflict

   - Add terminate support to qcom fault handler

   - 64-bit IOVA optimizations

   - Simplfy IOVA domain destruction, better use of rcache, and skip
     anchor nodes on copy

   - Convert to IOMMU TLB sync API in io-pgtable-arm{-v7s}

   - Drop command queue lock when waiting for CMD_SYNC completion on ARM
     SMMU implementations supporting MSI to cacheable memory

   - iomu-vmsa cleanup inspired by missed IOTLB sync callbacks

   - Fix sleeping lock with preemption disabled for RT

   - Dual MMU support for TI DRA7xx DSPs

   - Optional flush option on IOVA allocation avoiding overhead when
     caller can try other options

  [1] https://lkml.org/lkml/2017/10/22/72"

* tag 'iommu-v4.15-rc1' of git://github.com/awilliam/linux-vfio: (54 commits)
  iommu/iova: Use raw_cpu_ptr() instead of get_cpu_ptr() for ->fq
  iommu/mediatek: Fix driver name
  iommu/ipmmu-vmsa: Hook up r8a7795 DT matching code
  iommu/ipmmu-vmsa: Allow two bit SL0
  iommu/ipmmu-vmsa: Make IMBUSCTR setup optional
  iommu/ipmmu-vmsa: Write IMCTR twice
  iommu/ipmmu-vmsa: IPMMU device is 40-bit bus master
  iommu/ipmmu-vmsa: Make use of IOMMU_OF_DECLARE()
  iommu/ipmmu-vmsa: Enable multi context support
  iommu/ipmmu-vmsa: Add optional root device feature
  iommu/ipmmu-vmsa: Introduce features, break out alias
  iommu/ipmmu-vmsa: Unify ipmmu_ops
  iommu/ipmmu-vmsa: Clean up struct ipmmu_vmsa_iommu_priv
  iommu/ipmmu-vmsa: Simplify group allocation
  iommu/ipmmu-vmsa: Unify domain alloc/free
  iommu/ipmmu-vmsa: Fix return value check in ipmmu_find_group_dma()
  iommu/vt-d: Clear pasid table entry when memory unbound
  iommu/vt-d: Clear Page Request Overflow fault bit
  iommu/vt-d: Missing checks for pasid tables if allocation fails
  iommu/amd: Limit the IOVA page range to the specified addresses
  ...
2017-11-14 16:43:27 -08:00
Jani Nikula
d471ed04b4 drm/drivers: drop redundant drm_edid_to_eld() calls
drm_add_edid_modes() now fills in the ELD automatically, so the calls to
drm_edid_to_eld() are redundant. Remove them.

All the other places are obvious, but nv50 has detached
drm_edid_to_eld() from the drm_add_edid_modes() call.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Archit Taneja <architt@codeaurora.org>
Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: CK Hu <ck.hu@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Mark Yao <mark.yao@rock-chips.com>
Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Cc: Vincent Abriou <vincent.abriou@st.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Archit Taneja <architt@codeaurora.org>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0959ca02b983afc9e74dd9acd190ba6e25f21678.1509545641.git.jani.nikula@intel.com
2017-11-07 17:43:35 +02:00