mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-28 22:54:05 +08:00
019d22eb0e
2948 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Linus Torvalds
|
f7cdaeeab8 |
power supply and reset changes for the v6.0 series
power-supply core: - none drivers: - pwr-mlxbf: new reset driver for Mellanox BlueField - at91-reset: SAMA7G5 support - ab8500: continue refurbishing - misc. minor fixes -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE72YNB0Y/i3JqeVQT2O7X88g7+poFAmL1g+cACgkQ2O7X88g7 +pqlSQ//bHOcpSskI+fVDkPNbInVdOW7eK+cVdkNyeeEgZMz86C7fcQQ3/LwLhpj Jw3PFhIKklNR6dk+hE3Q6Jw0gzMSBIeCILCPuHLOYc4rWgduUzTEO6gCxy+jtDt+ cfUfP9RsfU47RYT6f5XL4K2Qlu0Plhpro+P7nECYubPRwYVnrpiMYDrOWNb68Yyb gcCjJN21nrQ4fJy/Qai1nUjlKAKJOmL6LBO/qe0EjVSllkGGGmAIDfolvXXmS1ku HZ5IEnpFp6usiXa52Q06QyWF6yp2WFsF1gACfWnimpj3lpPKcY4XSGR/rtAtu1ed qgxjmXoKCEy8z5WLjMlgNzOsVTMNSZyU4MWqrb4zQkR2GyaEqH2K1Hbp22Eu8qDC EHWel114aSHAooOhCXbl1mp7t+1aS+72buagmV2KuGMUMBf0jLKcTJahN0Czek3O EwrlN9INIMgcXZ2Ze7dEO6pJcdUov/fiOlB4rXE/cFIlSILT1dTuBPJCKrAqTePV 7QMYMmTvlSEgdTxgc7c4FaP9+ILxkZ1EgKDvxETKLImevXyecngep8S+9uq2cVkA lYdt33MnOHMx0AktFjKS0EEU1zkYN0z+yT3/0uuqzfT5/5xdvIqedXqkncl3Mdqq Ckdnya9n5NGmQXDr+0iuKBe510+nZX3yf1exTBbogOf97uBYiR8= =ulQI -----END PGP SIGNATURE----- Merge tag 'for-v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply Pull power supply and reset updates from Sebastian Reichel: "No core patches, only driver updates: - pwr-mlxbf: new reset driver for Mellanox BlueField - at91-reset: SAMA7G5 support - ab8500: continue refurbishing - misc minor fixes" * tag 'for-v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply: (29 commits) power: supply: olpc_battery: Hold the reference returned by of_find_compatible_node power: supply: ab8500: add missing destroy_workqueue in ab8500_charger_bind power: supply: ab8500: Remove flush_scheduled_work() call. power: supply: ab8500_fg: drop duplicated 'is' in comment power: supply: ab8500: Drop external charger leftovers power: supply: ab8500: Add MAINTAINERS entry dt-bindings: power: reset: qcom,pshold: convert to dtschema power: supply: Fix typo in power_supply_check_supplies power: reset: pwr-mlxbf: change rst_pwr_hid and low_pwr_hid from global to local variables power: reset: pwr-mlxbf: add missing include power: reset: at91-reset: add support for SAMA7G5 power: reset: at91-reset: add reset_controller_dev support power: reset: at91-reset: add at91_reset_data power: reset: at91-reset: document structures and enums dt-bindings: reset: add sama7g5 definitions dt-bindings: reset: atmel,at91sam9260-reset: add sama7g5 bindings dt-bindings: reset: convert Atmel/Microchip reset controller to YAML power: reset: pwr-mlxbf: add BlueField SoC power control driver power: supply: ab8500: Exit maintenance if too low voltage power: supply: ab8500: Respect charge_restart_voltage_uv ... |
||
|
Linus Torvalds
|
5e2e7383b5 |
Pin control bulk changes for v6.0:
Core changes:
- Add PINCTRL_PINGROUP() helper macro (and use it in the AMD driver).
New drivers:
- Intel Meteor Lake support.
- Reneasas RZ/V2M and r8a779g0 (R-Car V4H).
- AXP209 variants AXP221, AXP223 and AXP809.
- Qualcomm MSM8909, PM8226, PMP8074 and SM6375.
- Allwinner D1.
Improvements:
- Proper pin multiplexing in the AMD driver.
- Mediatek MT8192 can use generic drive strength and pin
bias, then fixes on top plus some I2C pin group fixes.
- Have the Allwinner Sunplus SP7021 use the generic DT schema and
make interrupts optional.
- Handle Qualcomm SC7280 ADSP.
- Handle Qualcomm MSM8916 CAMSS GP clock muxing.
- High impedance bias on ZynqMP.
- Serialize StarFive access to MMIO.
- Immutable gpiochip for BCM2835, Ingenic, Qualcomm SPMI GPIO.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmLy1PoACgkQQRCzN7AZ
XXOavA/+O9lIcZqt/I3ZzA4+paEJsXM/win6NKGUHlAE76D5qOvMEXPYCszccGVl
0ZV9s3A3xmlb0AQZONeiK5M6FTghnIHiPMI5Ewzw358hZQg68Mgaba5+/yTqc9ZT
L5zs6whboB1Mlr05L3g5e5ImM1FdFklGHimI6G/evE5r1ZXAAdoyXbSzWgtgLwp9
Gn3rstfqxwwPa9QWIjCXXIeZ/EFnX6BRFT5Pu47dRz/67UWB3xzJjRkZXBf8Nag9
/H/TpmkXSFNaP8HK2kN8m5eNtfWLYM1AmjFPNICWtKLhH12ArD3j+MBYLcJoDnAI
JZryrMSFi2P14Ov42zYeJaSjReTt/QBcRAlWBhSiuotJHl6wrFXzM6wA6JirfvsJ
XQsNm7rKfkmfJ84VjqmCg6QF+39fwKw9MYY9IMXsey7864pBWSyl2xYXUjwXFLua
EWh+6I1CX4db/S6I/uqvluDenT0NKAPZ3rwK5Al1m1DMI47kz0qoW5ZxAW10xeYB
BNGN7IyRvYZhfA/DHcxMB5XgateIKTJqfcYnmHD29Ep4skEetOSac0wVytd3S+Hw
v1zklpcGDLHNiCBXmTYniTlfgBkWJUmVCLA4K6TjSNUKfeoR+33wlpnPHveq8ckn
PJLf79A+5Br3IsLnr6AzDrmtCd0sV46Gy8Vi5I1TD1i/LUUhnL0=
=enmk
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Outside the pinctrl driver and DT bindings we hit some Arm DT files,
patched by the maintainers.
Other than that it is business as usual.
Core changes:
- Add PINCTRL_PINGROUP() helper macro (and use it in the AMD driver).
New drivers:
- Intel Meteor Lake support.
- Reneasas RZ/V2M and r8a779g0 (R-Car V4H).
- AXP209 variants AXP221, AXP223 and AXP809.
- Qualcomm MSM8909, PM8226, PMP8074 and SM6375.
- Allwinner D1.
Improvements:
- Proper pin multiplexing in the AMD driver.
- Mediatek MT8192 can use generic drive strength and pin bias, then
fixes on top plus some I2C pin group fixes.
- Have the Allwinner Sunplus SP7021 use the generic DT schema and
make interrupts optional.
- Handle Qualcomm SC7280 ADSP.
- Handle Qualcomm MSM8916 CAMSS GP clock muxing.
- High impedance bias on ZynqMP.
- Serialize StarFive access to MMIO.
- Immutable gpiochip for BCM2835, Ingenic, Qualcomm SPMI GPIO"
* tag 'pinctrl-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (117 commits)
dt-bindings: pinctrl: qcom,pmic-gpio: add PM8226 constraints
pinctrl: qcom: Make PINCTRL_SM8450 depend on PINCTRL_MSM
pinctrl: qcom: sm8250: Fix PDC map
pinctrl: amd: Fix an unused variable
dt-bindings: pinctrl: mt8186: Add and use drive-strength-microamp
dt-bindings: pinctrl: mt8186: Add gpio-line-names property
ARM: dts: imxrt1170-pinfunc: Add pinctrl binding header
pinctrl: amd: Use unicode for debugfs output
pinctrl: amd: Fix newline declaration in debugfs output
pinctrl: at91: Fix typo 'the the' in comment
dt-bindings: pinctrl: st,stm32: Correct 'resets' property name
pinctrl: mvebu: Missing a blank line after declarations.
pinctrl: qcom: Add SM6375 TLMM driver
dt-bindings: pinctrl: Add DT schema for SM6375 TLMM
dt-bindings: pinctrl: mt8195: Use drive-strength-microamp in examples
Revert "pinctrl: qcom: spmi-gpio: make the irqchip immutable"
pinctrl: imx93: Add MODULE_DEVICE_TABLE()
pinctrl: sunxi: Add driver for Allwinner D1
pinctrl: sunxi: Make some layout parameters dynamic
pinctrl: sunxi: Refactor register/offset calculation
...
|
||
|
Linus Torvalds
|
668c3c237f |
sound updates for 6.0-rc1
As diffstat shows, we've had lots of developments in a wide range
at this time; the majority of changes are about ASoC, including
subsystem-wide cleanups, continued SOF / Intel updates and a
bunch of new drivers (as usual), while there have been some
significant (but almost invisible) improvements in ALSA core
side, too. Below are some highlights:
Core:
- Faster lookups of control elements with Xarray; normal user
won't notice, but on the devices with tons of control elements,
it can be visibly faster
- Support for input validation for controls; this will harden
for badly written drivers in general with a slight overhead
- Deferred async signal handling for working around the potential
deadlocks
- Cleanup / refactoring raw MIDI locking code
ASoC:
- Restructing of the set_fmt() callbacks for making things clearer
in situations like CODEC to CODEC links
- Clean up and modernizing the DAI naming scheme setups
- Merge of more of the Intel AVS driver stack, including some
board integrations
- New version 4 mechanism for communication with SOF DSPs
- Suppoort for dynamically selecting the PLL to use at runtime on
i.MX platforms
- Improvements for CODEC to CODEC support in the generic cards
- Support for AMD Jadeite and various machines, AMD RPL, Intel
MetorLake DSPs, Mediatek MT8186 DSPs and MT6366, nVidia Tegra
MDDRC, OPE and PEQ, NXP TFA9890, Qualcomm SDM845, WCD9335 and
WAS883x, and Texas Instruments TAS2780
HD- and USB-audio:
- Continued improvement for CS35L41 (sub)codec support
- More quirks for various devices (HP, Lenovo, Dell, Clevo)
-----BEGIN PGP SIGNATURE-----
iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmLr5bcOHHRpd2FpQHN1
c2UuZGUACgkQLtJE4w1nLE93IQ/+OleeiGv7C487QN5MrBCkdFnSAiXsXDArcMgo
Gt6XLubH54et1tqi2ms4gRQOqr4HiBelERuqmaCLMZfEgVDc0VhJnf2jjhluYq9+
o9+kcYKul6qTZeNZLPjEX8pBvDe7HzOl7yep++ZnKeH6DAKNQQLDjVuOcQU/BXdY
kL8vYrLI3zfqj/pCePb5xpkBx4XdCrE3TfiCr3tAHVg9MyvSGOJyWs02mEBqQRnc
rlLmkjQVQyln/AGK4RAPMmrrFytktAvBjmIDyFL7kAzhdxe0ouNzTvdxESeojNJv
CVo/p3hl/+0LYjpD2x9v2pQuifOfpjwSCy6f8jsaF366sMwR1D45h051prILsxAF
05D5AOwMCnnJdFQFxw3mIkoDva3/PRX8GFfHsXoz+efc5Ibp8ksNYVgAJ3D2TTtt
7nAYMn0dimVDtw2LHiKantgWAs/rOqD3hDzGxFj2sR662ahsHr8pT8csnJAGoBvW
7kgx7ZzFo/wSyZJqVqV7p4g6J79ScehRwhqoiwZau9Eo+PhuxZUKvm4RwGFh0Vvg
GbiVRPfLV4xQd/pDin6qRX1M7cgPc62qGLkhQHAzrX6H5ipwIbQrpyDGLjwdSEp8
XcQmzCG1zGOvb9A8BY1VBOQXxZRTqN58XujbZ6hsms7Uw8sqagxpYLA/e1bvt1E1
RQoHQRw=
=1n0/
-----END PGP SIGNATURE-----
Merge tag 'sound-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"As the diffstat shows, we've had lots of developments in a wide range
at this time; the majority of changes are about ASoC, including
subsystem-wide cleanups, continued SOF / Intel updates and a bunch of
new drivers (as usual), while there have been some significant (but
almost invisible) improvements in ALSA core side, too.
Below are some highlights:
Core:
- Faster lookups of control elements with Xarray; normal user won't
notice, but on the devices with tons of control elements, it can be
visibly faster
- Support for input validation for controls; this will harden for
badly written drivers in general with a slight overhead
- Deferred async signal handling for working around the potential
deadlocks
- Cleanup / refactoring raw MIDI locking code
ASoC:
- Restructing of the set_fmt() callbacks for making things clearer in
situations like CODEC to CODEC links
- Clean up and modernizing the DAI naming scheme setups
- Merge of more of the Intel AVS driver stack, including some board
integrations
- New version 4 mechanism for communication with SOF DSPs
- Suppoort for dynamically selecting the PLL to use at runtime on
i.MX platforms
- Improvements for CODEC to CODEC support in the generic cards
- Support for AMD Jadeite and various machines, AMD RPL, Intel
MetorLake DSPs, Mediatek MT8186 DSPs and MT6366, nVidia Tegra
MDDRC, OPE and PEQ, NXP TFA9890, Qualcomm SDM845, WCD9335 and
WAS883x, and Texas Instruments TAS2780
HD- and USB-audio:
- Continued improvement for CS35L41 (sub)codec support
- More quirks for various devices (HP, Lenovo, Dell, Clevo)"
* tag 'sound-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (778 commits)
ALSA: hda/realtek: Add quirk for HP Spectre x360 15-eb0xxx
ALSA: line6: Replace sprintf() with sysfs_emit()
ALSA: hda: Replace sprintf() with sysfs_emit()
ALSA: pcm: Replace sprintf() with sysfs_emit()
ALSA: core: Replace scnprintf() with sysfs_emit()
ALSA: control-led: Replace sprintf() with sysfs_emit()
ALSA: aoa: Replace sprintf() with sysfs_emit()
ALSA: ac97: Replace sprintf() with sysfs_emit()
ALSA: hda/realtek: Add quirk for Clevo NV45PZ
ALSA: hda/realtek: Add quirk for Lenovo Yoga9 14IAP7
ALSA: control: Use deferred fasync helper
ALSA: pcm: Use deferred fasync helper
ALSA: timer: Use deferred fasync helper
ALSA: core: Add async signal helpers
ASoC: q6asm: use kcalloc() instead of kzalloc()
ACPI: scan: Add CLSA0101 Laptop Support
ALSA: hda: cs35l41: Support CLSA0101
ALSA: hda: cs35l41: Use the CS35L41 HDA internal define
ASoC: dt-bindings: use spi-peripheral-props.yaml
ASoC: codecs: va-macro: use fsgen as clock
...
|
||
|
Linus Torvalds
|
36001a2fa6 |
The clk core gains a new set of APIs that allow drivers to both acquire clks
and prepare and enable them at the same time. This also comes with devm support
so that drivers can make a single call to get and prepare and enable the clk
and have that all undone when their driver is removed. Many folks have
requested this feature over the years, but we've had disagreements about how to
implement it and if it was worthwhile to encourage drivers to use such an API.
Now it's here, so let's see how it goes. I hope that by introducing this API we
can identify drivers that would benefit from further consolidation of clk API
usage, possibly by moving such logic to the bus layer and out of drivers
altogether.
Outside of that major API update, we have the usual collection of driver
updates. A few new SoCs are supported, mostly Qualcomm and Renesas this time
around. Then we have the long tail of non-critical fixes and minor feature
additions to various clk drivers. And finally more clk provider migration to
struct clk_parent_data, reducing boot times in the process.
Core:
- devm helpers for clk_get() + clk_prepare() and clk_enable()
New Drivers:
- Support for the camera clock controller in Qualcomm SM8450 and
the display and gpu clock controllers in Qualcomm SM8350
- Add support for the Renesas RZ/Five SoC
Updates:
- Various fixes, new clocks and USB GDSCs are introduced for Qualcomm IPQ8074
- Fixes to Qualcomm MSM8939 for issues introduced by inheriting the MSM8916
GCC driver
- Support for a new type of voteable GDSCs used by Qualcomm SC8280XP PCIe
GDSCs
- Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux implementation
- Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994 GCC are
migrated to use clk_parent_data
- Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845 and
SM8250
- Qualcomm MSM8916 gains more possible frequencies for its GP clocks.
- The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic the
design in IPQ8074 to allow the GCC driver to probe earlier.
- The regulator based mmcx supply for Qualcomm dispcc and videocc is dropped,
as the only upstream target that adapted this interface was transitioned
several kernel versions ago
- Qualcomm GDSCs found to be enabled at boot will now reflect in the enable
count of the supply, as was done with the regulator supplies previously
- Correct adc1, nic_media and edma1's parents for NXP i.MX93
- rdiv, mfd values, the return rate in recalc_rate and add more frequencies in
the table for fracn-gppll on i.MX
- Remove Allwinner workaround logic/compatible in fixed factor code
- MediaTek clk driver cleanups
- Add reset support to more MediaTek clk drivers
- deduplicate Allwinner ccu_clks arrays
- Allwinner H6 GPU DFS support
- Adjust Allwinner Kconfig to limit choice
- Fix initconst confusion on Renesas R-Car Gen4
- Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L
- Add PFC and WDT clocks and resets on Renesas RZ/V2M
- Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on
Renesas R-Car S4-8
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmLsVRsRHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSVo7g//WK8+RORL+I48Pzu21Al+eT4Thz3OQJJj
v3Jk4UY8/7Hnj5jpXI/FguOyah14Jpjp6dJdIvJ/llIHGQHiwIjXlrGQghtOMMHO
6Tkgc4MTPrkQ7asF/D22afG1yMv/qPne2HAtu7gRVebn6AOaje2tnbbQA0e11geD
9wPWhzhgCdShLxxjifN9t1ucklW9BCij1dhczEsf13uACwkUwihC26s3JTzvMxF+
PAXQ1YFzooFFBop6eT0+jQ8JB5V1HPZ55q7K144aFIMhbue4VzyFtTxL16wdzygX
qeMT9cHy1agLEk8djyh/ZIGU/iUD2byE3zTU6xIITfj+oEMTrYdoQIv/chk4h/4u
gz2ihCY4Tj2nBRblDuaXRn46E5XlAVlllJ7bFrK3SlpefyPEc3B6qF8tm1wBJ5pL
dfP2DZACrFEqHVYxZpj6VTLDoR7c1fuyQT0SbPagnqAiboS2wlB4zyyogrOXZ/JO
FqMC+qEkxm25ByY0+RgiKnZ7GSAyt6etZcFGnA3yz7jgoXT4PRYk3uQ40wxE/ttx
eoUoc3QbW5mjSNLlcb8FcxVRkPoh2g+vGlkhQx2xJ5RMbk07pqylaCs5p6cbh0uu
8wn8yIq3bqYTFDR0zurwWGKVRcnH4ukzKScnUfpbrvzXJ9bhHXVC3kAHtXlpOzRe
5IVQPxEVd+8=
=jUh+
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"The clk core gains a new set of APIs that allow drivers to both
acquire clks and prepare and enable them at the same time. This also
comes with devm support so that drivers can make a single call to get
and prepare and enable the clk and have that all undone when their
driver is removed.
Many folks have requested this feature over the years, but we've had
disagreements about how to implement it and if it was worthwhile to
encourage drivers to use such an API.
Now it's here, so let's see how it goes.
I hope that by introducing this API we can identify drivers that would
benefit from further consolidation of clk API usage, possibly by
moving such logic to the bus layer and out of drivers altogether.
Outside of that major API update, we have the usual collection of
driver updates. A few new SoCs are supported, mostly Qualcomm and
Renesas this time around. Then we have the long tail of non-critical
fixes and minor feature additions to various clk drivers.
And finally more clk provider migration to struct clk_parent_data,
reducing boot times in the process.
Summary:
Core:
- devm helpers for clk_get() + clk_prepare() and clk_enable()
New Drivers:
- Support for the camera clock controller in Qualcomm SM8450 and the
display and gpu clock controllers in Qualcomm SM8350
- Add support for the Renesas RZ/Five SoC
Updates:
- Various fixes, new clocks and USB GDSCs are introduced for Qualcomm
IPQ8074
- Fixes to Qualcomm MSM8939 for issues introduced by inheriting the
MSM8916 GCC driver
- Support for a new type of voteable GDSCs used by Qualcomm SC8280XP
PCIe GDSCs
- Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux
implementation
- Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994
GCC are migrated to use clk_parent_data
- Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845
and SM8250
- Qualcomm MSM8916 gains more possible frequencies for its GP clocks.
- The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic
the design in IPQ8074 to allow the GCC driver to probe earlier.
- The regulator based mmcx supply for Qualcomm dispcc and videocc is
dropped, as the only upstream target that adapted this interface
was transitioned several kernel versions ago
- Qualcomm GDSCs found to be enabled at boot will now reflect in the
enable count of the supply, as was done with the regulator supplies
previously
- Correct adc1, nic_media and edma1's parents for NXP i.MX93
- rdiv, mfd values, the return rate in recalc_rate and add more
frequencies in the table for fracn-gppll on i.MX
- Remove Allwinner workaround logic/compatible in fixed factor code
- MediaTek clk driver cleanups
- Add reset support to more MediaTek clk drivers
- deduplicate Allwinner ccu_clks arrays
- Allwinner H6 GPU DFS support
- Adjust Allwinner Kconfig to limit choice
- Fix initconst confusion on Renesas R-Car Gen4
- Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L
- Add PFC and WDT clocks and resets on Renesas RZ/V2M
- Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on
Renesas R-Car S4-8"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (124 commits)
clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw()
clk: mux: Introduce devm_clk_hw_register_mux_parent_hws()
clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()
clk: qcom: gcc-msm8994: use parent_hws for gpll0/4
clk: qcom: clk-rpm: convert to parent_data API
dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc
clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies
clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies
clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies
clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions
clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock
clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk
clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled
clk: qcom: Drop mmcx gdsc supply for dispcc and videocc
clk: qcom: fix build error initializer element is not constant
clk: sprd: Add dt-bindings include file for UMS512
dt-bindings: clk: sprd: Add bindings for ums512 clock controller
clk: sunxi-ng: sun50i: h6: Modify GPU clock configuration to support DFS
dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
clk: qcom: add support for SM8350 DISPCC
...
|
||
|
Linus Torvalds
|
37644cac6e |
gpio: updates for v6.0-rc1
- remove gpio-vr41xx driver as the only platform using it got dropped too
- add support for suspend/resume to gpio-davinci
- improvements to the GPIO character device code
- add support for disabling bias for in-kernel users (up until now
only user-space could set it)
- drop unused devm_gpio_free()
- fix a refcount issue in gpiolib OF
- use device match helpers where applicable
- add support for a new model to gpio-rockchip
- non-functional improvements in gpio-adp5588
- improve and simplify teardown in gpio-twl4030 and gpio-ucb1400
- modernize the gpio-74xx-mmio and gpio-adnp drivers
- coding style improvements in gpio-xilinx, gpio-104-idi-48
- support new model (pca9571) in gpio-pca9570
- convert the DT bindings to YAML for gpio-mvebu and update the document
- don't return error codes from remove() in gpio-brcmstb
- add a library for the intel 8255 PPI interface and use it in drivers
- reduce using magic numbers and improve code readability in several drivers
- convert DT bindings to YAML for gpio-tpic2810
- add new models to DT bindings for gpio-frl-imx
- Kconfig improvements
- other minor tweaks and improvements
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAmLruBoACgkQEacuoBRx
13LSqA//QMdrdsYOvSp3m6Dy1swj8a2VpeInDclx/JQ51hIsv03lW6sysrRBBKfy
gslkj0KO+kelEQbcHZdXF6f434Y2QqSU/JRCPQlQ55Uo3vSbUulvVkUtSoegdNKG
airr5KebZtLzjBgc23n38HiTJxa1J238+3UScxYHqL9jQ6AA6sPx7Kpy2zlTwojn
iygJ1CKuyMyHOjU1uhAWYVzCAoguVvOb58emUt5HUsOjjW42d8T+iCHxrJnjC3ST
YWwHnkSd3GO5CLI+5w7MmLk4kaOA8KU7PGRljglwpbsNGknUQ3PFFSlqFUziBzMU
nOG1gZ9bvzOy5xjFcLkT3p/NHZiTnyq+ugDl2RAVQB2UF31KHk2sVGrzIsRpbBgt
kDst5Wn21oymfEO6FM269h5ln+haXouJv2eQvnayBr3rfMxaZCm8veFxjQBDRADf
D3muvi6u/EJPsPg08owcaVrINPVYVGQIzQp5hi+UCBkzXghn+MovNuI/i07Qf1kr
fBELOXTy+MGK22p+rO+rXsp0Cp1zUIbwSz0m8ImbhLqcYLa+Vm5bJHk31/Igvbv3
9FMR75RmfE98EvMhd6ECarZHF9rvCVN7R1U9P1aK8+85m7X5eIVehoQ125uAZf+N
+W49bceSCI/mGqIg8MiQCM5NIW0AXvyjd7gTNN5kr7qsMGTJI3c=
=rGNU
-----END PGP SIGNATURE-----
Merge tag 'gpio-updates-for-v6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
Pull gpio updates from Bartosz Golaszewski:
"Here are the updates for this merge window from the GPIO subsystem.
We have more lines removed than added thanks to dropping of a driver
for a platform that's no longer supported. Otherwise the changes are
pretty straightforward: support for some new models, various
improvements to existing drivers, some tweaks to the core library code
and DT bindings updates.
Summary:
- remove gpio-vr41xx driver as the only platform using it got dropped
too
- add support for suspend/resume to gpio-davinci
- improvements to the GPIO character device code
- add support for disabling bias for in-kernel users (up until now
only user-space could set it)
- drop unused devm_gpio_free()
- fix a refcount issue in gpiolib OF
- use device match helpers where applicable
- add support for a new model to gpio-rockchip
- non-functional improvements in gpio-adp5588
- improve and simplify teardown in gpio-twl4030 and gpio-ucb1400
- modernize the gpio-74xx-mmio and gpio-adnp drivers
- coding style improvements in gpio-xilinx, gpio-104-idi-48
- support new model (pca9571) in gpio-pca9570
- convert the DT bindings to YAML for gpio-mvebu and update the
document
- don't return error codes from remove() in gpio-brcmstb
- add a library for the intel 8255 PPI interface and use it in
drivers
- reduce using magic numbers and improve code readability in several
drivers
- convert DT bindings to YAML for gpio-tpic2810
- add new models to DT bindings for gpio-frl-imx
- Kconfig improvements
- other minor tweaks and improvements"
* tag 'gpio-updates-for-v6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (52 commits)
dt-bindings: gpio: fsl-imx-gpio: Add i.MXRT compatibles
gpio: 74xx-mmio: Use bits instead of plain numbers for flags
gpio: xilinx: add missing blank line after declarations
MAINTAINERS: Update Intel 8255 GPIO driver file list
gpio: gpio-mm: Implement and utilize register structures
gpio: 104-idi-48: Implement and utilize register structures
gpio: 104-dio-48e: Implement and utilize register structures
gpio: i8255: Introduce the Intel 8255 interface library module
gpio: 104-idio-16: Implement and utilize register structures
gpio: ws16c48: Implement and utilize register structures
gpio: remove VR41XX related gpio driver
dt-bindings: gpio: add pull-disable flag
gpiolib: acpi: support bias pull disable
gpiolib: of: support bias pull disable
gpiolib: add support for bias pull disable
gpio: 74xx-mmio: use bits.h macros for all masks
gpio: 74xx-mmio: Check MMIO_74XX_DIR_IN flag in mmio_74xx_dir_in()
gpio: 74xx-mmio: Make use of device properties
gpiolib: cdev: compile out HTE unless CONFIG_HTE selected
gpiolib: cdev: consolidate edge detector configuration flags
...
|
||
|
Linus Torvalds
|
da8d07af4b |
Devicetree updates for v6.0:
Bindings:
- Add spi-peripheral-props.yaml references to various SPI device
bindings
- Convert qcom,pm8916-wdt, ds1307, Qualcomm BAM DMA, is31fl319x,
skyworks,aat1290, Rockchip EMAC, gpio-ir-receiver, ahci-ceva, Arm CCN
PMU, rda,8810pl-intc, sil,sii9022, ps2-gpio, and arm-firmware-suite
bindings to DT schema format
- New bindings for Arm virtual platforms display, Qualcomm IMEM memory
region, Samsung S5PV210 ChipID, EM Microelectronic EM3027 RTC, and
arm,cortex-a78ae
- Add vendor prefixes for asrock, bytedance, hxt, ingrasys, inventec,
quanta, and densitron
- Add missing MSI and IOMMU properties to host-generic-pci
- Remove bindings for removed EFM32 platform
- Remove old chosen.txt binding (replaced by schema)
- Treewide add missing type information for properties
- Treewide fixing of typos and its vs. it's in bindings. Its all good
now.
- Drop unnecessary quoting in power related schemas
- Several LED binding updates which didn't get picked up
- Move various bindings to proper directories
DT core code:
- Convert unittest GPIO related tests to use fwnode
- Check ima-kexec-buffer against memory bounds
- Print reserved-memory allocation/reservation failures as errors
- Cleanup early_init_dt_reserve_memory_arch()
- Simplify of_overlay_fdt_apply() tail
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmLpmdUQHHJvYmhAa2Vy
bmVsLm9yZwAKCRD6+121jbxhw8RKD/0dWJ6kDoM5IgS+gzklHA4cBgtHoqHa8Aun
wDMP6bLxFtlGtAExkfO1ZvNgv1movEYwtSkNKKLuzK/Uv65ln693xWMKza0VEQCl
1/C1+BQUGMrrMxheMvyWyoGTzOuP65Oh74xDutVlOMN5GxUNEtnU6OdX+F1TLNtD
utL0arf44y8pAC+eouLTl0bDeMi3rnLT7Y/UEuhh59nVVy+Fi04jvV/UjNx0Vp6m
/jViiCSxPl77zU2nL7kdOE91Peaqb4YgdXjSgvnhXcJ8zDZZgai64u3Kq0k5whM6
U6HvIpjvzwDJG5qfW7rdM8dFMUECYNWMqlrqhpX1m/FQQejUBalPnklTtqwkrzsj
8QXJB0y1BMf6lwIjFDHZoxk4sfd3fcSJegkZK+wip9FdpGe+78GBUp2RU+gfMgv9
lUSLq0mrmjEuazqm+C95okzFbLeZk+WAgAmH2GYaTc1VYa6WrBYnTZIy8ngTe+VS
ywklQbBUXMaV13A5gKQSNZx9rdyJVgqRcLuRxosxNt5ms411oiKjjj2m6adTUXmR
jos67YYdSHiKmn7Omj8biOw2lDQe0PMZmhgqNTe7nAWho26v6uV/HgLz6xNPtEDx
Lj6+xBz96RH0ANWS9O0GLk+GDe7svsXTmj+9GkCFlY3PioMvB3Fmph7p9Hjxkq2P
8zQFxWGgAg==
=8/kk
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"Bindings:
- Add spi-peripheral-props.yaml references to various SPI device
bindings
- Convert qcom,pm8916-wdt, ds1307, Qualcomm BAM DMA, is31fl319x,
skyworks,aat1290, Rockchip EMAC, gpio-ir-receiver, ahci-ceva, Arm
CCN PMU, rda,8810pl-intc, sil,sii9022, ps2-gpio, and
arm-firmware-suite bindings to DT schema format
- New bindings for Arm virtual platforms display, Qualcomm IMEM
memory region, Samsung S5PV210 ChipID, EM Microelectronic EM3027
RTC, and arm,cortex-a78ae
- Add vendor prefixes for asrock, bytedance, hxt, ingrasys, inventec,
quanta, and densitron
- Add missing MSI and IOMMU properties to host-generic-pci
- Remove bindings for removed EFM32 platform
- Remove old chosen.txt binding (replaced by schema)
- Treewide add missing type information for properties
- Treewide fixing of typos and its vs. it's in bindings. Its all good
now.
- Drop unnecessary quoting in power related schemas
- Several LED binding updates which didn't get picked up
- Move various bindings to proper directories
DT core code:
- Convert unittest GPIO related tests to use fwnode
- Check ima-kexec-buffer against memory bounds
- Print reserved-memory allocation/reservation failures as errors
- Cleanup early_init_dt_reserve_memory_arch()
- Simplify of_overlay_fdt_apply() tail"
* tag 'devicetree-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (65 commits)
dt-bindings: mtd: microchip,mchp48l640: use spi-peripheral-props.yaml
dt-bindings: power: supply: drop quotes when not needed
dt-bindings: power: reset: drop quotes when not needed
dt-bindings: power: drop quotes when not needed
dt-bindings: PCI: host-generic-pci: Allow IOMMU and MSI properties
of/fdt: declared return type does not match actual return type
devicetree/bindings: correct possessive "its" typos
dt-bindings: net: convert emac_rockchip.txt to YAML
dt-bindings: eeprom: microchip,93lc46b: move to eeprom directory
dt-bindings: eeprom: at25: use spi-peripheral-props.yaml
dt-bindings: display: use spi-peripheral-props.yaml
dt-bindings: watchdog: qcom,pm8916-wdt: convert to dtschema
dt-bindings: power: reset: qcom,pon: use absolute path to other schema
dt-bindings: iio/dac: adi,ad5766: Add missing type to 'output-range-microvolts'
dt-bindings: power: supply: charger-manager: Add missing type for 'cm-battery-stat'
dt-bindings: panel: raydium,rm67191: Add missing type to 'video-mode'
of/fdt: Clean up early_init_dt_reserve_memory_arch()
dt-bindings: PCI: fsl,imx6q-pcie: Add missing type for 'reset-gpio-active-high'
dt-bindings: rtc: Add EM Microelectronic EM3027 bindings
dt-bindings: rtc: ds1307: Convert to json-schema
...
|
||
|
Linus Torvalds
|
c1c76700a0 |
SPDX changes for 6.0-rc1
Here is the set of SPDX comment updates for 6.0-rc1. Nothing huge here, just a number of updated SPDX license tags and cleanups based on the review of a number of common patterns in GPLv2 boilerplate text. Also included in here are a few other minor updates, 2 USB files, and one Documentation file update to get the SPDX lines correct. All of these have been in the linux-next tree for a very long time. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYupz3g8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ynPUgCgslaf2ssCgW5IeuXbhla+ZBRAzisAnjVgOvLN 4AKdqbiBNlFbCroQwmeQ =v1sg -----END PGP SIGNATURE----- Merge tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx Pull SPDX updates from Greg KH: "Here is the set of SPDX comment updates for 6.0-rc1. Nothing huge here, just a number of updated SPDX license tags and cleanups based on the review of a number of common patterns in GPLv2 boilerplate text. Also included in here are a few other minor updates, two USB files, and one Documentation file update to get the SPDX lines correct. All of these have been in the linux-next tree for a very long time" * tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx: (28 commits) Documentation: samsung-s3c24xx: Add blank line after SPDX directive x86/crypto: Remove stray comment terminator treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_406.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_398.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_391.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_390.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_385.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_319.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_318.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_298.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_292.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_179.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 2) treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 1) treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_160.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_152.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_149.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_147.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_133.RULE ... |
||
|
Linus Torvalds
|
228dfe98a3 |
Char / Misc driver changes for 6.0-rc1
Here is the large set of char and misc and other driver subsystem
changes for 6.0-rc1.
Highlights include:
- large set of IIO driver updates, additions, and cleanups
- new habanalabs device support added (loads of register maps
much like GPUs have)
- soundwire driver updates
- phy driver updates
- slimbus driver updates
- tiny virt driver fixes and updates
- misc driver fixes and updates
- interconnect driver updates
- hwtracing driver updates
- fpga driver updates
- extcon driver updates
- firmware driver updates
- counter driver update
- mhi driver fixes and updates
- binder driver fixes and updates
- speakup driver fixes
Full details are in the long shortlog contents.
All of these have been in linux-next for a while without any reported
problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYup9QQ8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ylBKQCfaSuzl9ZP9dTvAw2FPp14oRqXnpoAnicvWAoq
1vU9Vtq2c73uBVLdZm4m
=AwP3
-----END PGP SIGNATURE-----
Merge tag 'char-misc-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char / misc driver updates from Greg KH:
"Here is the large set of char and misc and other driver subsystem
changes for 6.0-rc1.
Highlights include:
- large set of IIO driver updates, additions, and cleanups
- new habanalabs device support added (loads of register maps much
like GPUs have)
- soundwire driver updates
- phy driver updates
- slimbus driver updates
- tiny virt driver fixes and updates
- misc driver fixes and updates
- interconnect driver updates
- hwtracing driver updates
- fpga driver updates
- extcon driver updates
- firmware driver updates
- counter driver update
- mhi driver fixes and updates
- binder driver fixes and updates
- speakup driver fixes
All of these have been in linux-next for a while without any reported
problems"
* tag 'char-misc-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (634 commits)
drivers: lkdtm: fix clang -Wformat warning
char: remove VR41XX related char driver
misc: Mark MICROCODE_MINOR unused
spmi: trace: fix stack-out-of-bound access in SPMI tracing functions
dt-bindings: iio: adc: Add compatible for MT8188
iio: light: isl29028: Fix the warning in isl29028_remove()
iio: accel: sca3300: Extend the trigger buffer from 16 to 32 bytes
iio: fix iio_format_avail_range() printing for none IIO_VAL_INT
iio: adc: max1027: unlock on error path in max1027_read_single_value()
iio: proximity: sx9324: add empty line in front of bullet list
iio: magnetometer: hmc5843: Remove duplicate 'the'
iio: magn: yas530: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
iio: magnetometer: ak8974: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
iio: light: veml6030: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
iio: light: vcnl4035: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
iio: light: vcnl4000: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
iio: light: tsl2591: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr()
iio: light: tsl2583: Use DEFINE_RUNTIME_DEV_PM_OPS and pm_ptr()
iio: light: isl29028: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr()
iio: light: gp2ap002: Switch to DEFINE_RUNTIME_DEV_PM_OPS and pm_ptr()
...
|
||
Stephen Boyd
|
dfcbbd73dd |
Merge branches 'clk-renesas', 'clk-spreadtrum', 'clk-imx' and 'clk-qcom' into clk-next
* clk-renesas: (22 commits) clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_config clk: renesas: r9a07g043: Add support for RZ/Five SoC dt-bindings: clock: r9a07g043-cpg: Add Renesas RZ/Five CPG Clock and Reset Definitions clk: renesas: r8a779f0: Add HSCIF clocks clk: renesas: r8a779f0: Add PCIe clocks clk: renesas: r8a779f0: Add Z0 and Z1 clock support dt-bindings: clock: renesas,rzg2l: Simplify header file references clk: renesas: rza1: Remove struct rz_cpg clk: renesas: r8a7779: Remove struct r8a7779_cpg clk: renesas: r8a7778: Remove struct r8a7778_cpg clk: renesas: sh73a0: Remove sh73a0_cpg.reg clk: renesas: r8a7740: Remove r8a7740_cpg.reg clk: renesas: r8a73a4: Remove r8a73a4_cpg.reg clk: renesas: r8a779f0: Add SDHI0 clock clk: renesas: r8a779f0: Add thermal clock clk: renesas: rzg2l: Fix reset status function clk: renesas: r9a06g032: Fix UART clkgrp bitsel clk: renesas: r9a06g032: Drop some unused fields clk: renesas: r9a09g011: Add WDT clock and reset entries clk: renesas: r9a09g011: Add PFC clock and reset entries ... * clk-spreadtrum: clk: sprd: Add dt-bindings include file for UMS512 dt-bindings: clk: sprd: Add bindings for ums512 clock controller * clk-imx: clk: imx: clk-fracn-gppll: Add more freq config for video pll clk: imx: clk-fracn-gppll: correct rdiv clk: imx: clk-fracn-gppll: Return rate in rate table properly in ->recalc_rate() clk: imx: clk-fracn-gppll: fix mfd value clk: imx93: Correct the edma1's parent clock clk: imx93: correct nic_media parent clk: imx93: use adc_root as the parent clock of adc1 * clk-qcom: (62 commits) clk: qcom: gcc-msm8994: use parent_hws for gpll0/4 clk: qcom: clk-rpm: convert to parent_data API dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled clk: qcom: Drop mmcx gdsc supply for dispcc and videocc clk: qcom: fix build error initializer element is not constant dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources clk: qcom: add support for SM8350 DISPCC clk: qcom: add support for SM8350 GPUCC clk: qcom: add camera clock controller driver for SM8450 SoC clk: qcom: clk-alpha-pll: add Rivian EVO PLL configuration interfaces clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces clk: qcom: clk-alpha-pll: limit exported symbols to GPL licensed code clk: qcom: clk-alpha-pll: fix clk_trion_pll_configure description ... |
||
|
Linus Torvalds
|
dd65b96492 |
ARM: new SoC support for 6.0
This adds initial support for two SoC families that have been under review for a while. In both cases, the origonal idea was to have a minimally functional version, but we ended up leaving out the clk drivers that are still under review and will be merged through the corresponding subsystem tree. The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and based on the 32-bit NPCM7xx family but is now getting added to arch/arm64 as well. Sunplus SP7021, also known as Plus1, is a general-purpose System-in-Package design based on the 32-bit Cortex-A7 SoC on the main chip, plus an I/O chip and memory in the same -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLo+24ACgkQmmx57+YA GNkPVw//XAC/uK7WR4oz1D1YaPPNhEvFa6hV1gjGB7Iif72SzyDJmC+36MATU/AY neQjCOLJMhxI0hpDGY9nLYe+aP1C6vD32zsjffjt/+s9em+YZZCUkRJuQ5xO3fID Uk8ZAnCIcOqX9sjXr9ChW8irlcWFbKzhgWXnPqwQmycIaE7QVz1wx32dbc64YuAK S+290U8wbj8bukr33TyZPMdYlfqNU3c1W+dCaeVsQlX1juoHEV3stmIjslRefd6X Jre22YJE41VlPufZej76nHXuVnjKf54Oi347TcbPOWNDtEAIESt3mzKy+zICBT2p v01rNBf0SogyOtSbWDPTFCAH9W9hujSOJIUOWpbOLaPdfElXxcoTBwj2e2LMoW0k ke7YR1m6FKDam5GFU9Oe98CWIiVm/GnTA5mnhhETU1QTXQ3KeZ+Z8X779YuSWPv9 kJuOPRSk9NdcfRtxZz1vpCvhv/2hBbeBuz+GZi3bisMWdvVqS3lFqVbr6kziQbJZ kE6KJH48FdL0VLVvuy+aNSF2umLT42b+5+cmQFuP2zePQgo1DEMKEtFXpZjQJbha 3iu3sHnieOFMLcbNzbqSz2im3yYNBjl1M5qoGEXaw3Rkzqiht0kMNvAa4LmAejbh E+5BIczwWNbaUKgToV1ij65O4a78Bw98m2SIS7awEZC5MW/nXYA= =7Id+ -----END PGP SIGNATURE----- Merge tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM new SoC support from Arnd Bergmann: "This adds initial support for two SoC families that have been under review for a while. In both cases, the origonal idea was to have a minimally functional version, but we ended up leaving out the clk drivers that are still under review and will be merged through the corresponding subsystem tree. The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and based on the 32-bit NPCM7xx family but is now getting added to arch/arm64 as well. Sunplus SP7021, also known as Plus1, is a general-purpose System-in-Package design based on the 32-bit Cortex-A7 SoC on the main chip, plus an I/O chip and memory in the same" * tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) MAINTAINERS: rectify entry for ARM/NUVOTON NPCM ARCHITECTURE arm64: defconfig: Add Nuvoton NPCM family support arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add maintainer reset: npcm: Add NPCM8XX support dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: using syscon instead of device data ARM: dts: nuvoton: add reset syscon property dt-bindings: reset: npcm: add GCR syscon property dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock dt-bindings: watchdog: npcm: Add npcm845 compatible string dt-bindings: timer: npcm: Add npcm845 compatible string ARM: dts: Add Sunplus SP7021-Demo-V3 board device tree ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig ARM: sunplus: Add initial support for Sunplus SP7021 SoC irqchip: Add Sunplus SP7021 interrupt controller driver ... |
||
|
Linus Torvalds
|
3976d758e0 |
ARM: DT changes for 6.0
As usual, the bulk of the changes for the SoC tree are devicetree file
updates, and most of these changes are for 64-bit embedded machines.
As before, there are a ton of style cleanups, and additional hardware
support for existing machines.
Looking only at the new SoC, the notable additions are:
- A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit:
BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146,
BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813.
Each SoC comes with a corresponding reference board.
- The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and
i.MX8 embedded SoCs, now using Cortex-A55 cores and the
Ethos-U65 NPU.
- Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end
of Arm based Laptop SoCs, and its automotive cousin, the
SA8540P. The SC8280XP is used in the Lenovo Thinkpad X13s
laptop that also gets added here in addition to the reference
boards.
- Allwinner H616, a newer version of the H6 SoC, targeted at
Set-top-box applications. It comes with dts files for the
Orange Pi zero2 single-board computer and the X96 Mate
set-top-box
- Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip
in the Armada SoC family based on the Cortex-A55 core.
New machines based on previously supported SoCs include:
- Several new machines on NXP i.MX platforms: multiple Toradex
Colibri boards using the "Iris" and "Ixora" carriers,
DH electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems
TQMa8MPQL, and phytech phyBOARD-Polis-i.MX8MM.
- Google Chameleon v3 FPGA board based on Intel Arria10 and
Stratix 10 Software Virtual platform, both in the SoCFPGA
platform.
- Two new wireless devices based on Broadcom SoCs:
The Asus GT-AX6000 Router and the Cisco Meraki MR26 access point
- Improved Chromebook support for both the Mediatek and Qualcomm
SoC families brought added machines: Acer Chromebook 514 (MT8192),
Acer Chromebook Spin 513 (MT8195) and a couple of SC7180 based
machines including the Lenovo IdeaPad Chromebook Duet 3.
- Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on
Qualcomm SDM845, while Mi 5s Plus is based on MSM8996.
- Finally, there are a few development board on other chips:
PCB8309 (Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308)
DH DRC Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm
SDM660)
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLo+7MACgkQmmx57+YA
GNlTQQ//QnOoW3fl2l4TvuBuP1Vxp7KW3GxZEkWBEfy7lfgkfBzksJ2GT+c96fxk
+XEvSJcDsSo8zNYXXu/q0jjVKW4lEkiBtaB53NbLayNTFtJccKPiL4hccUkwSg1K
zOhfu6SEgkwuYNAhtcQOfIec+gdF2PvpZSWUfuGvM2Z3rNhhyfhgoRRZCpc62eeS
VQ+bVJH/7hG4XAJEcwmNK+8GoCcLbOclCa14oa9/LuEVjfYwOblfPjSflmfALzbM
BoTDdeMbZoOdy3LOmLpT26Wv7zWQxLhTpiSYiSV0CI4NHUfzJj8ncNh+w9OiN+KO
Z7cblHhveW5WSEP/jDp9YTf2XXA5UgpFQQjuXS8zQVECw5YxrSBB96GroQhvpcmT
oSS0BVvlmp5snBRx4Oev2ldJ0BuyYYljF0DmmTrQ6s2gvB4WBlRSqplCAkDy59Im
+mc5BBTqZYoxzCpzXEZR7VPzk1jzAO5wnYYd1mLJSHVExlSw8CQijy1a4YXxsvmK
4Sysrm8UbmPN/0anbiyPKeIkuNuufFUvUCR3Vm2HnMzNPza8YBJ0xm6zr8J7ecXe
QcucpXyLi17GTLOm+pcyj2fQ19yVqO3xbutP4sy9StctEXLZe3rH2hY+GPK6N+Uj
83MbABMCmpUAyPMzR0AwTKx/RwWbf1jjYvcKg2VW8NNV5kkQQzM=
=X6mA
-----END PGP SIGNATURE-----
Merge tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM DT updates from Arnd Bergmann:
"As usual, the bulk of the changes for the SoC tree are devicetree file
updates, and most of these changes are for 64-bit embedded machines.
As before, there are a ton of style cleanups, and additional hardware
support for existing machines.
Looking only at the new SoC, the notable additions are:
- A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit:
BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146,
BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813. Each SoC comes
with a corresponding reference board.
- The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and
i.MX8 embedded SoCs, now using Cortex-A55 cores and the Ethos-U65
NPU.
- Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end of
Arm based Laptop SoCs, and its automotive cousin, the SA8540P. The
SC8280XP is used in the Lenovo Thinkpad X13s laptop that also gets
added here in addition to the reference boards.
- Allwinner H616, a newer version of the H6 SoC, targeted at
Set-top-box applications. It comes with dts files for the Orange Pi
zero2 single-board computer and the X96 Mate set-top-box
- Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip in the
Armada SoC family based on the Cortex-A55 core.
New machines based on previously supported SoCs include:
- Several new machines on NXP i.MX platforms: multiple Toradex
Colibri boards using the "Iris" and "Ixora" carriers, DH
electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems TQMa8MPQL, and
phytech phyBOARD-Polis-i.MX8MM.
- Google Chameleon v3 FPGA board based on Intel Arria10 and Stratix
10 Software Virtual platform, both in the SoCFPGA platform.
- Two new wireless devices based on Broadcom SoCs: The Asus GT-AX6000
Router and the Cisco Meraki MR26 access point
- Improved Chromebook support for both the Mediatek and Qualcomm SoC
families brought added machines: Acer Chromebook 514 (MT8192), Acer
Chromebook Spin 513 (MT8195) and a couple of SC7180 based machines
including the Lenovo IdeaPad Chromebook Duet 3.
- Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on
Qualcomm SDM845, while Mi 5s Plus is based on MSM8996.
- Finally, there are a few development board on other chips: PCB8309
(Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308) DH DRC
Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm SDM660)"
* tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (829 commits)
dt-bindings: soc: bcm: use absolute path to other schema
dt-bindings: soc: bcm: drop quotes when not needed
dt-bindings: soc: microchip: use absolute path to other schema
dt-bindings: soc: microchip: drop quotes when not needed
ARM: dts: lan966x: keep lan966 entries alphabetically sorted
ARM: dts: lan966x: add support for pcb8309
dt-bindings: arm: at91: add lan966 pcb8309 board
ARM: dts: lan966x: Enable network driver on pcb8291
ARM: dts: lan966x: Disable can0 on pcb8291
ARM: dts: lan966x: Add gpio-restart
dt-bindings: arm: aspeed: add Aspeed Evaluation boards
arm64: dts: qcom: Add support for Xiaomi Mi Mix2s
dt-bindings: arm: qcom: Add Xiaomi Mi Mix2s bindings
dt-bindings: arm: qcom: Document lg,judyln and lg,judyp devices
dt-bindings: arm: qcom: add missing SM6350 board compatibles
dt-bindings: arm: qcom: add missing SM6125 board compatibles
dt-bindings: arm: qcom: add missing SDM845 board compatibles
dt-bindings: arm: qcom: add missing SDM636 board compatibles
dt-bindings: arm: qcom: add missing SDM630 board compatibles
dt-bindings: arm: qcom: add missing QCS404 board compatibles
...
|
||
Arnd Bergmann
|
99978d2fd9 |
More Qualcomm driver changes for v5.20
This adds support for booting secondary cores, SPM, SMD-RPM and RPM power-domain support for the MSM8909 platform. It drops an unnecessary print in icc-bwmon, corrects SA8540P entries in socinfo and a Kconfig build dependency for QCOM_RPMPD. Lastly it continues to clean up up the Devicetree bindings for the Qualcomm drivers. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLYinIbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FryMQANQKam+7lJrykwF3bt8t e/ZR1SWPcKTu5dudsnA2GACnycQ8XQr5M06HRVghwveleXbjHyE3beLEy/NwfbTL P4ufdDtg/UCwZXJ+p2ZDtbKIWQQU1qgItekYiN3lDEnb3Y5R7vI2h2mhdDOZh8yn HtzI5EeI5gMilZ7yYtqPR3DrXpfdYBaGANshyzmP07eDTz+UyaSSKoALsy7jeWB2 9d4/inH35Tuqv/98oLaf+gK1vH89AVA13N6fVaQxgPOne3FN1bsqBFGc/RvW+phH CG+D86lrxq7iChdEcvcoPCkabYi4lNqhbKZOiAAimqrwFCIksVJSE7adDul0JcPF g0ml1jWIx+Jsj5TmuRH01CaxCuLtv9WKARi64vqA8dwSYuak8irP3WXbbtv/sNgW PokJovzDwwSs71Rh8PmlXC//XY8gbsVj/umI8lEsS5/PrvdCXYsRTjRzvZ5uNtiQ 5s1fm6xMT2AMbp+Y6ZcnmPhuGntfiJZFj9GivfZuaYF44Ov6mRScHnRADC9oXpBf 7qlaC1T05PBUHOMB19xpOOsqtBpfX9TCaCqhsVxhH4bjzzYoMuV+yYlI3CqPv3yL v9bKfMkbsOpZywCxyve2d6jqCeL8fA2iPw3MzFIlmESRA4MwdXswmxHCE3C7FOHA SZkdXKa4EeWQRBf9g5ri3EM/ =gLQ3 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLZTeMACgkQmmx57+YA GNmWzg//eCc5hZXF1HumCX21ueWjwnAaZWZZECe+Plc0GB6nMnPVgCw2S29SCfYQ cpR1B0YME/AgK7GiwdxW7mh9wtRzAtR7aSn2Z3nsmF7lMTJI5mJTDVIApoCvgHDu 5eyFIoiwtWYKFht5TLvC56fnOW73Jp6m5K4HElH2q6A387uurc8ClmuhnG7Dbhsp WCYB7aqfqYlMybf8EYo3BAng63v6wLDf93+HyGokRiRHeh/h7xF4liLVY9XCNxOH NSxBn8zZDRttEww+xSP+hDpTo316YG3SiNf3XW5ojVMrSUsbJM76DMTuPW70LJvK obL4SL7zPeo7yH0NiHK699k+jchozb6Uq9WNnWHc3b5ABXK1RV0BoUNPtTHjiYBs ojJnqjPmGJHaLmrvqEihyzRxXJtFMFU22t2EwdUmxQyYdgffS35W6lJtlNP/q7ph i+DFoyKsmH8T9zNibNXjoV5NAo73OyKKriWjQS/DYR2/T/kwooXo9h9RS8rppo4M kqumzGT2gdLoYI/1hBgXurQpMr231XvesLNSNJpQNz3UfYC0cuC7nAe6EQ5Jn2Da hLQrRSj+TMghSq8dw5yOx1fvWjyYT1uFKiSgOkWXvX6Pcui6UC5oJ3zivv7JOXuc Jjn+0B31KIBUyh8hq4cNrGaF8edVf8Y0vxp0mKsnnYjQxxuZHkc= =TP2T -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers More Qualcomm driver changes for v5.20 This adds support for booting secondary cores, SPM, SMD-RPM and RPM power-domain support for the MSM8909 platform. It drops an unnecessary print in icc-bwmon, corrects SA8540P entries in socinfo and a Kconfig build dependency for QCOM_RPMPD. Lastly it continues to clean up up the Devicetree bindings for the Qualcomm drivers. * tag 'qcom-drivers-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: dt-bindings: soc: qcom: qcom,smd-rpm: add power-controller dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmp dt-bindings: soc: qcom,rpmh-rsc: simplify qcom,tcs-config ARM: mach-qcom: Add support for MSM8909 dt-bindings: arm: cpus: Document "qcom,msm8909-smp" enable-method soc: qcom: spm: Add CPU data for MSM8909 dt-bindings: soc: qcom: spm: Add MSM8909 CPU compatible soc: qcom: rpmpd: Add compatible for MSM8909 dt-bindings: power: qcom-rpmpd: Add MSM8909 power domains soc: qcom: smd-rpm: Add compatible for MSM8909 dt-bindings: soc: qcom: smd-rpm: Add MSM8909 soc: qcom: icc-bwmon: Remove unnecessary print function dev_err() soc: qcom: socinfo: Fix the id of SA8540P SoC soc: qcom: Make QCOM_RPMPD depend on PM Link: https://lore.kernel.org/r/20220720230648.2113609-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
2d0f3f13a9 |
Merge branch 'nuvoton/newsoc' into arm/newsoc
Merge the new SoC support from Tomer Maimon: "This patchset adds initial support for the Nuvoton Arbel NPCM8XX Board Management controller (BMC) SoC family. The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC. The NPCM8XX computing subsystem comprises a quadcore ARM Cortex A35 ARM-V8 architecture. This patchset adds minimal architecture and drivers such as: Clocksource, Clock, Reset, and WD. Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX. This patchset was tested on the Arbel NPCM8XX evaluation board." I'm leaving out the clk controller driver, which is still under review. * nuvoton/newsoc: arm64: defconfig: Add Nuvoton NPCM family support arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add maintainer reset: npcm: Add NPCM8XX support dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: using syscon instead of device data ARM: dts: nuvoton: add reset syscon property dt-bindings: reset: npcm: add GCR syscon property dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock dt-bindings: watchdog: npcm: Add npcm845 compatible string dt-bindings: timer: npcm: Add npcm845 compatible string |
||
Tomer Maimon
|
08e950449c |
dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock
Add binding for the Arbel BMC NPCM8XX Clock controller. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Nuno Sá
|
d042656a21 |
dt-bindings: gpio: add pull-disable flag
This extends the flags that can be used in GPIO specifiers to indicate that no bias is intended in the pin. Signed-off-by: Nuno Sá <nuno.sa@analog.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> |
||
Stephan Gerhold
|
c61c6c6507 |
dt-bindings: power: qcom-rpmpd: Add MSM8909 power domains
MSM8909 has the same power domains as MSM8916 so just define them as aliases for the existing definitions. Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220705143523.3390944-4-stephan.gerhold@kernkonzept.com |
||
Greg Kroah-Hartman
|
6598a382bd |
interconnect changes for 5.20
Here are the interconnect changes for the 5.20-rc1 merge window consisting of two new drivers, misc driver improvements and new device managed API. Core change: - Add device managed bulk API Driver changes: - New driver for NXP i.MX8MP platforms - New driver for Qualcomm SM6350 platforms - Multiple bucket support for Qualcomm RPM-based drivers. Signed-off-by: Georgi Djakov <djakov@kernel.org> -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJi0YXiAAoJEIDQzArG2BZjA1YP/02pishqRKRk6t4M18zKbwwK Preh54CDOrxvd2Fqno3Ft3JLGqd6EtpyDbFV9g/90o43WFHKmEn70Jbmi3N60aqj a4M5KU7b+fQyNqus1Z/XQFsfqZ1suAiQHYljIWsbWVkaYHti2geQThblmZ8bsr2m AZ0MtDMRvix0XEekDHgS6l52C8owLr3kGbuHGZuQNTGQPKCI5+sQ26+eh49khQUj ecxndxuQSj3gMtEBw5AaxY3djpV6DJs/qmkPBZaxpDDSc2RNnb+6ZNKMeaarvz0j TI3ZRwq+CGbBB/DQOmEx2Sbo2rlMXd0IQotBJDiN1xs/pXRSyoaWZUW/KK0erZcN D1XL33Yzxu67NIKl5K8GteP0OxGTzyE9y91Yh2mprCBdRxg77zyQd+NDtiJ+wMqW hp+JoOOINa1muGWGqVZxUt3ACU3Wn4TCzFQajzRDsdHNrx79nLaRQzfu0SsCXfBL DkkMaJIkt069yWzfhUBgAkq8X+En4SPcA662EqQbxXXQ5hF7Knlj25q70diu7lxq O63KPSkN8GIu5fyhyFBpJ9nRxT70k7PDxJW40cL0sSejiprPc4UzKUQD4wQjK2OC 1gNRwKkWGq13SbfOmqy2G9CW5+tsTWqUoXRzYfHr4q8Cpwc9pZA8pXvYS5ujTFtq g1ZbGI2Aw906ZM3nqmUJ =VTig -----END PGP SIGNATURE----- Merge tag 'icc-5.20-rc1-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: interconnect changes for 5.20 Here are the interconnect changes for the 5.20-rc1 merge window consisting of two new drivers, misc driver improvements and new device managed API. Core change: - Add device managed bulk API Driver changes: - New driver for NXP i.MX8MP platforms - New driver for Qualcomm SM6350 platforms - Multiple bucket support for Qualcomm RPM-based drivers. Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-5.20-rc1-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: PM / devfreq: imx: Register i.MX8MP interconnect device interconnect: imx: Add platform driver for imx8mp interconnect: imx: configure NoC mode/prioriry/ext_control interconnect: imx: introduce imx_icc_provider interconnect: imx: set src node interconnect: imx: fix max_node_id interconnect: qcom: icc-rpm: Set bandwidth and clock for bucket values interconnect: qcom: icc-rpm: Support multiple buckets interconnect: qcom: icc-rpm: Change to use qcom_icc_xlate_extended() interconnect: qcom: Move qcom_icc_xlate_extended() to a common file dt-bindings: interconnect: Update property for icc-rpm path tag interconnect: icc-rpm: Set destination bandwidth as well as source bandwidth interconnect: qcom: msm8939: Use icc_sync_state interconnect: add device managed bulk API dt-bindings: interconnect: add fsl,imx8mp.h dt-bindings: interconnect: imx8m: Add bindings for imx8mp noc interconnect: qcom: Add SM6350 driver support dt-bindings: interconnect: Add Qualcomm SM6350 NoC support dt-bindings: interconnect: qcom: Split out rpmh-common bindings interconnect: qcom: icc-rpmh: Support child NoC device probe |
||
Georgi Djakov
|
33f033dc30 |
Merge branch 'icc-imx8mp' into icc-next
This patchset is to support i.MX8MP NoC settings, i.MX8MP NoC initial value after power up is invalid, need set a valid value after related power domain up. This patchset also includes two patch[1,2] during my development to enable the ICC feature for i.MX8MP. I not include ddrc DVFS in this patchset, ths patchset is only to support NoC value mode/priority/ext_control being set to a valid value that suggested by i.MX Chip Design Team. The value is same as NXP downstream one inside Arm Trusted Firmware: https://source.codeaurora.org/external/imx/imx-atf/tree/plat/imx/imx8m/i/gpc.c?h=lf_v2.4#n97 Link: https://lore.kernel.org/r/20220703091132.1412063-1-peng.fan@oss.nxp.com Signed-off-by: Georgi Djakov <djakov@kernel.org> |
||
|
Arnd Bergmann
|
e0a5925055 |
Qualcomm ARM64 DTS updates for v5.20
This introduces initial support for Lenovo ThinkPad X13s, Qualcomm 8cx Gen 3 Compute Reference Device, SA8295P Automotive Development Platform, Xiaomi Mi 5s Plus, five new SC7180 Chrome OS boards, Inforce IFC6560, LG G7 ThinQ and LG V35 ThinQ. With IPQ8074 gaining GDSC support, this was expressed in the gcc node and defined for the USB nodes. The SDHCI reset line was defined to get the storage devices into a known state. For MSM8996 interconnect providers, the second DSI interface, resets for SDHCI are introduced. Support for the Xiaomi Mi 5s Plus is introduced and the Dragonboard 820c gains definitions for its LEDs. The MSM8998 platform changes consists of a various cleanup patches, the FxTec Pro1 is split out from using the MTP dts and Sony Xperia devices on the "Yoshino" platform gains ToF sensor. On SC7180 five new Trogdor based boards are added and the description of keyboard and detachables is improved. On the SC7280-based Herobrine board DisplayPort is enabled, SPI flash clock rate is changed, WiFi is enabled and the modem firmware path is updated. The Villager boards gains touchscreen, and keyboard backlight. This introduces initial support for the SC8280XP (aka 8cx Gen 3) and related automotive platforms are introduced, with support for the Qualcomm reference board, the Lenovo Thinkpad X13s and the SA8295P Automotive Development Platform. In addition to a wide range of smaller fixes on the SDM630 and SDM660 platforms, support for the secondary high speed USB controller is introduced and the Sony Xperia "Nile" platform gains support for the RGB status LED. Support for the Inforce IFC6560 board is introduced. On SDM845 the bandwidth monitor for the CPU subsystem is introduced, to scale LLCC clock rate based on profiling. CPU and cluster idle states are switched to OSI hierarchical states. DB845c and SHIFT 6mq gains LED support and new support for the LG G7 ThinQ and LG V35 ThinQ boards are added. DLL/DDR configuration for SDHCI nodes are defined for SM6125. On SM8250 the GPU per-process page tables is enabled and for RB5 the Light Pulse Generator-based LEDs are added. The display clock controller is introduced for SM8350. On SM8450 this introduces the camera clock controller and the UART typically used for Bluetooth. The interconnect path for the crypto engine is added to the SCM node, to ensure this is adequately clocked. The assigned-clock-rate for the display processor is dropped from several platforms, now that the driver derrives the min and max from the clock. In addition to this a wide range of fixes for stylistic issues and issues discovered through Devicetree binding validation across many platforms and boards are introduced. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLPLQkbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3Fe7gQAKK2W3OKC5uKllNc7ICE rTeQeVNoZPxtqgvTcpAViarDCZin1jo21vDusK3q1iLICSN3XPvfvEYnYIRit/AU lRK0O/OBfVzzf+6qsTZqAUybLF2heYA6woESbcIoZMcmZYPwNTmVQvMuPnd0uBro yasN7Nm/wcWBlbnyWWAwnU8sYlBx0OfiXq/3z60adDJFJr5DoEFeapkrV/wr9dpx YR6kLRM7h9zzqctjOmqM/ZPxI8z3dS83eMS/4k1CkeuTKxQ+pIaBDm5WqhoWuuHH CY5Ebc7PzsbEWsx9Qt+bxur5lbeT5brAlGFLNtpn55hz9JQyCrUTIRgPJI21vT7O swlGFfW3IYsp8sU3cV7cQ8W7TGrv/1syUbEA+vCEudd00+TEUM+QJmI7bzZVHPUx Ari4poAb0D8w2517dTHEiBVQ7a7eRGbMqvJEraWNtklcbNAocV53U6Sz7XAr4Bjm 0FFbCc18C+DuvMd12B8Vp92Vy8Q62M0fcnaMiL5+QVzGx1fj1bq1aL7kUuUhgsP/ 3esJUw4dNVK3d4b2uy3DR3trobr8jjirMuXKa5V8WUvr3vP9z4hRLTM9l6fecGRW 0qrzf5iehwJ8itiUYtm/AyGYq1TjkJYxbhtQW8oRiQAJBIyRPjtPITq54l0yLz7/ w1faJprsybDMh+ESmaHYPbZK =89g4 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLQL/QACgkQmmx57+YA GNmMUxAAu7iL+YiuKDOxO9vD3INq5XukdZvbCOaiyWkwafsyf0YqhlIXUV0LD/q3 dpDm2/od9KQGvMG9WE34Fdq2e9nj35NiRHkKM5wLVTuypgh62VmP1PH8q0z+L+hr A9IdxwzgXd+ZoDMSkPVHjZauBrALeqxuQshoEvBE11EncCIeQrsxHDIzGjIBlohc yZ5EGAYBRDt7dmRv2M3Vpk68gJc5F264zc/mljbrnf1iW/C1b3z6PXtRZXt6p+iq Dzfbh+LeWIo2ddrkXhcU3ZFiafMZ5zTLZWWtKystqU9lk3fVvvp1ZcoeEgg9j5tQ 2TgddYBJTOHm9vlJIYD6zo/AL6adixYOPZOnSzWY17zC8Yq7e5lbc/A4NkoL3lUZ oTbEtjmR55hJG2C6JNLsCDuI2eo5zJ9KZB8rE9CBp+kWh2UExjKVbk1LDjUQcLQl 0cYDbIDeLJFSwSMQ18GeoLbsp3rSlPUOMuoUCdKCsCp9xLzWIxBR7LbthO/R3OOE mXsxGQTwn2PbEZEqFddW3vvcBF+FL1IQ/YgC6F/1MKbvU60KjdWNYqeXSz9PZ/AR 6HyszhnGyGUU0xCWx93XHgfSCKTr8zkjD1zloWy5ibX4rUUg+iC2TnQ3n7srQNCj S8bpFED4JXfFj+LfgR9vZr5sUM+C1oYiIVXccZ9QLwiNWLfAfFQ= =XnF9 -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 DTS updates for v5.20 This introduces initial support for Lenovo ThinkPad X13s, Qualcomm 8cx Gen 3 Compute Reference Device, SA8295P Automotive Development Platform, Xiaomi Mi 5s Plus, five new SC7180 Chrome OS boards, Inforce IFC6560, LG G7 ThinQ and LG V35 ThinQ. With IPQ8074 gaining GDSC support, this was expressed in the gcc node and defined for the USB nodes. The SDHCI reset line was defined to get the storage devices into a known state. For MSM8996 interconnect providers, the second DSI interface, resets for SDHCI are introduced. Support for the Xiaomi Mi 5s Plus is introduced and the Dragonboard 820c gains definitions for its LEDs. The MSM8998 platform changes consists of a various cleanup patches, the FxTec Pro1 is split out from using the MTP dts and Sony Xperia devices on the "Yoshino" platform gains ToF sensor. On SC7180 five new Trogdor based boards are added and the description of keyboard and detachables is improved. On the SC7280-based Herobrine board DisplayPort is enabled, SPI flash clock rate is changed, WiFi is enabled and the modem firmware path is updated. The Villager boards gains touchscreen, and keyboard backlight. This introduces initial support for the SC8280XP (aka 8cx Gen 3) and related automotive platforms are introduced, with support for the Qualcomm reference board, the Lenovo Thinkpad X13s and the SA8295P Automotive Development Platform. In addition to a wide range of smaller fixes on the SDM630 and SDM660 platforms, support for the secondary high speed USB controller is introduced and the Sony Xperia "Nile" platform gains support for the RGB status LED. Support for the Inforce IFC6560 board is introduced. On SDM845 the bandwidth monitor for the CPU subsystem is introduced, to scale LLCC clock rate based on profiling. CPU and cluster idle states are switched to OSI hierarchical states. DB845c and SHIFT 6mq gains LED support and new support for the LG G7 ThinQ and LG V35 ThinQ boards are added. DLL/DDR configuration for SDHCI nodes are defined for SM6125. On SM8250 the GPU per-process page tables is enabled and for RB5 the Light Pulse Generator-based LEDs are added. The display clock controller is introduced for SM8350. On SM8450 this introduces the camera clock controller and the UART typically used for Bluetooth. The interconnect path for the crypto engine is added to the SCM node, to ensure this is adequately clocked. The assigned-clock-rate for the display processor is dropped from several platforms, now that the driver derrives the min and max from the clock. In addition to this a wide range of fixes for stylistic issues and issues discovered through Devicetree binding validation across many platforms and boards are introduced. * tag 'qcom-arm64-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (193 commits) arm64: dts: qcom: sc8280xp: fix DP PHY node unit addresses arm64: dts: qcom: sc8280xp: fix usb_0 HS PHY ref clock arm64: dts: qcom: sc7280: fix PCIe clock reference docs: arm: index.rst: add google/chromebook-boot-flow arm64: dts: qcom: msm8996: clean up PCIe PHY node arm64: dts: qcom: msm8996: use non-empty ranges for PCIe PHYs arm64: dts: qcom: sm8450: drop UFS PHY clock-cells arm64: dts: qcom: sm8250: drop UFS PHY clock-cells arm64: dts: qcom: sc8280xp: drop UFS PHY clock-cells arm64: dts: qcom: sm8450: drop USB PHY clock index arm64: dts: qcom: sm8350: drop USB PHY clock index arm64: dts: qcom: msm8998: drop USB PHY clock index arm64: dts: qcom: ipq8074: drop USB PHY clock index arm64: dts: qcom: ipq6018: drop USB PHY clock index arm64: dts: qcom: sm8250: add missing PCIe PHY clock-cells arm64: dts: qcom: sc7280: drop PCIe PHY clock index Revert "arm64: dts: qcom: Fix 'reg-names' for sdhci nodes" arm64: dts: qcom: sc7180-idp: add vdds supply to the DSI PHY arm64: dts: qcom: sc7280: use constants for gpucc clocks and power-domains arm64: dts: qcom: msm8996: add missing DSI clock assignments ... Link: https://lore.kernel.org/r/20220713203939.1431054-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
f10c00ae86 |
memory: tegra: Changes for v5.20-rc1
Add memory client definitions for the Multi-Gigabit Ethernet (MGBE) controllers found on Tegra234. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmLIexUTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoSjxEACmshdcN262kiaAYvB96jfG3kVBKnID q2HfIh0/6x54ZhlOo5v4ROpwD1AnHpo5p6nWZOWmIhSYL7tm9gIZNoGIgg7wF7HS M1vD3J6Yl89l1JlYASjpqWB+r0X9FRFVWE+Zj+xHi0NFxlyfYFxaqBnXAl4aMQ/9 Bx9+YpEO+XYnsLfsMnn4AUx2QXjjrhavBNP4tqTgc/9DWE6Eg+PdEdqr+Q7ZshZJ 5S534RxrenVJXi70pbNmfaYF2do8HzvbzACAU8l9bhGDTRLj5piMudSxWtOTgguw GFzbGZh7vaKq8D51Ko+LWs2RFG8jIlLoCBDjZPF8pmdOiMPLNxyaVD88ZzF7HM7S +MP1hWiQRifl/68XnNEDT7NC+1vMfK2kRrpqVayYuFWmWWWhb+TxiJVjSJS8wd0I UaEK8G5lPU/o2m2Z5SiR2Sip+uLSeHYZs5x+cyrYub8I/v41bieuNY1rkJYDaMif UOUiiYz90QizIdLg6+S6eZ5xxFAeNin9JTNH8lA3yTtedi3Qv8kfYvSubWBWDe2z XAlRr/lMwsuEwnZbIerzaIu/VYDYkryhO8Vo4Q76avDEJgdxu7X82QOmdZ4ozyo3 vYc/3jrYOVX0W8zXUDuF/jdUKq/PVq8xkIqaZglRtWnMNgJX1Zod+UPQI0aAYlWz 76ARO9cHKhJ1Gg== =iQ4G -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLN3zQACgkQmmx57+YA GNkNnxAAqKF9TCK/YCCIpcuawZBMPDSLVNiCPqjHdK0ZSLRsKjr6EoR4T77sFjrq PdiZThT7sMlZ/434d4dy+12mivzXmHrPDv8CoQRJtzcSoJ71E31SI6610pqMWZeF k6WHHd33obab60BRkBlmOq097UfX5FYG+FxyKl13UKltHGydWXU+4xOPR3xm6UqU ey7MOebSUesmW9f4CG5ynLtOmojp4D5fcYWGIMabawKQK0m9zRY5qMg7OVT4aeOr oSDAkKKoQcCM9sH2whoQzMpyznj2vZKPiHefgNKk2JSYlqyoJsHc6DP6ZHPoNo4o wDY/K1DJwLTH8QfJriEKQG8H5tXoSDGvAyOBI/YMhxhyip/bASV3AabNDn6u6ckg 6VOmJ273DFbqqjahtI88B2mWhkO996CkV2fHXEZCi8RnNPDNVFijMaBSGQjG8dPn VbIJbtvb+dvGHKcaA1Oi1kYGNa0S5cGCTrv+gK4GOLhrThoIldmAONSV+CtEK1TA wB4+wR7f8QXgTqBm3+9IiJebT7eST5Eh66pIutBB3PyWfpvlHUsl3CldJu0apCWo +gJaIk/WjKgfgiY4l0wXHchFlwotA0ma/CCsfm64+9zgjvo+nlX/heC3QtCC5cCC tnIUXrvk/boh3cX9ItZZvnHs7S5eK9yfFZqkoVytGJdRRPM5e8w= =Ayiz -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.20-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers memory: tegra: Changes for v5.20-rc1 Add memory client definitions for the Multi-Gigabit Ethernet (MGBE) controllers found on Tegra234. * tag 'tegra-for-5.20-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: memory: tegra: Add MGBE memory clients for Tegra234 dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB 2.0 binding dt-bindings: arm: tegra: Add NVIDIA Tegra194 AXI2APB binding dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB 1.0 binding dt-bindings: memory: Add Tegra234 MGBE memory clients dt-bindings: Add Tegra234 MGBE clocks and resets dt-bindings: power: Add Tegra234 MGBE power domains dt-bindings: Add headers for Tegra234 GPCDMA Link: https://lore.kernel.org/r/20220708185608.676474-5-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Cixi Geng
|
8c18fece15 |
clk: sprd: Add dt-bindings include file for UMS512
This file defines all UMS512 clock indexes, it should be included in the device tree in which there's device using the clocks. Signed-off-by: Cixi Geng <cixi.geng1@unisoc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220505101433.1575096-4-gengcixi@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Arnd Bergmann
|
a41bf1aabd |
dt-bindings: Changes for v5.20-rc1
These changes add clock, reset, memory client and power domain definitions for various devices found on Tegra234 along with a few device tree bindings for new hardware. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmLIeLYTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zodtBEACW4bu7bO2/aAQNOX4R0qUOM64nj9cE sqxo1A7JxxGQWBsjiVCD62nCnRP1ehqF2anVEdCJvh2eXlWHdhTgs/lV2HK712Ny otkgok/1pVKfvwTuziyqyOHyKD0j2ZoDJlRgYDTF+WUrVrXXnQyc32lt+zmibtH1 w3TIx6vx4FUnYJELNQPeqbbBP450eIGJ8fZBhIM68kqF/4HKVb4e2jofV3Gd1SBx wSBDW63nvqmvErmHfS9LVEX5GcRm0m4RvHWCMK61yc92BwlRKOlweTYczfZmw3oB feVtW59+yHYUWa9Dx7PATz7ns+YgpVI9ZU35NKT31/B0gLWh52kZuXFwA9g+02fE vq7qV3FhFZtyMBp8CaYopp1INCxU0xXTxvIRw+R00Y5Fab6XUGz+qKTDyHVfhkcD LtSHyWQ5h/PAUrcBaAALuvkU8ZCYvdOfTQMQBm5sUoTBMFQ7GsuvOmGy48HbWxLV n1SRZNNoXAKWK20Ko+ydLe5rAWpAKOb5onufPhm0JiGziVto/Q/qz9tsh+5lE0Gw v9W9poXoLlfwpAdLteAchKCgCGIuWims0XwRxVz8lvudEb6OUyMlr2eUNNYFMGsd SnPwHUO67fm6/hxA5NoHDuy0mdynJEcDXaJ+OORfezT/JILgIughAp51+/Whk88p ByXU/MOC+61yoA== =3/dX -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLMQ3IACgkQmmx57+YA GNldFQ//SrIZR5mCeRnLSZEdw5xah7TXwvIOvDw+4JQ3Fbrzq63L/ggm307q6WcC 4ymOP0ImzAxbHp7Vc5qb6wELSSIiGBy/4y3g/rVinK1ZFRqHiiOkVwHABQp5GMhM h/Xm3QVym9UDA4a0hy6EUREb5QHo0l/yYgsXoRJLfh1HuARswevAu2GK+Q4rEH1b 8aG8xm7fbhafhAJzzJkufOH6WHyhelP0zCVs9Ipa0oOcz1t0/cqYhLDQH/43r76z oN+NbEOuCxEShTAhEZ2K5F6lXtR1CB20BE4y5lfMebevSRIXjfN2XfQnJfcAcCY/ CfT0RCi0w4uz5ZgnkWhI+SbXNT7oHSDvdEogOI1yKm1tm0F8PqUKsPv3tL/P7H0D BcOmPslYP10iRuwXDZzbE5FgCZwjIacwJF24BLqI8nEr1U6aC13rwlnsB7mWk1E5 OXuo/1T0X8R34OrZQzkNpV2WAhT/jNMC5Pj01h0A2XAX0UGB2vP+P5wWurumMkwn V8VX82qN0FN6LOOnm+YgreLHv8uR6V95EzIDnvND3dyz0qvsajlIo1Q+PACsVUOA fBuxDd2/ABAMglqNNTZTg75PIosrbRqtaaZDq2ehlyWUjn4BGWaEv4W0zZBpyrZB CMUQ7ZBhJapvXoRxjOkkPU7WmfYo/CQtjxRkkBS03O+xNIZJxRo= =iDCl -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v5.20-rc1 These changes add clock, reset, memory client and power domain definitions for various devices found on Tegra234 along with a few device tree bindings for new hardware. * tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: tegra-ccplex-cluster: Remove status from required properties dt-bindings: Add headers for Host1x and VIC on Tegra234 dt-bindings: timer: Add Tegra186 & Tegra234 Timer dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB 2.0 binding dt-bindings: arm: tegra: Add NVIDIA Tegra194 AXI2APB binding dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB 1.0 binding dt-bindings: memory: Add Tegra234 MGBE memory clients dt-bindings: Add Tegra234 MGBE clocks and resets dt-bindings: power: Add Tegra234 MGBE power domains dt-bindings: Add headers for Tegra234 GPCDMA Link: https://lore.kernel.org/r/20220708185608.676474-4-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Mikko Perttunen
|
63a6ef2360 |
dt-bindings: Add headers for Host1x and VIC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers for Host1x and VIC on Tegra234. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
||
Claudiu Beznea
|
4d5e3b06e1 |
dt-bindings: microchip-otpc: document Microchip OTPC
Document Microchip OTP controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220706100627.6534-2-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
||
Qin Jian
|
5543604a05 |
dt-bindings: clock: Add bindings for SP7021 clock driver
Add documentation to describe Sunplus SP7021 clock driver bindings. Signed-off-by: Qin Jian <qinjian@cqplus1.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Qin Jian
|
55bfc376b8 |
dt-bindings: reset: Add bindings for SP7021 reset driver
Add documentation to describe Sunplus SP7021 reset driver bindings. Signed-off-by: Qin Jian <qinjian@cqplus1.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
132582d210 |
Renesas ARM DT updates for v5.20 (take two)
- Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB
development board,
- AA1024XD12 panel overlay support for the Draak, Ebisu, and
Salvator-X(S) development boards,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYsfxkAAKCRCKwlD9ZEnx
cGKNAQC5Wl91yn3heD50V0vXjs6CqNm/bdrWOEmnwwlcnyClqQEAnQjTHs4iriar
110WP2JSNUoZwawygZFq0jHBgMVFOQA=
=LnAY
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLIF6MACgkQmmx57+YA
GNkxQw//ZHD0LKpT4v1C1o1y4MNuVujljbC/uS9Wk+vhYuWebo0OKAu8CEyAwoVO
SsnYuNpzjLiMlbDc+Id+9C9IbF2k97hUJWDJWMOLF2wtESRtAwkoYHiJToMH9216
zUxrFpah4LAMKDwPxOqLvBl9/5Hzy4L7tfslmQijiupfGGF6gWiWrA+kgBXpX9+L
Y1H9PdTd+XLuqmXXa3o+RA0n8d6ZlYxYAJ73OC6nXhr/fd2dpmS/nYtchM3AeLVp
QAJSf9NnJQPm17G+6TvBHOIOBjyCSsLWemNEbXPkyW3X/H/LCz1RyEeU0fy0B4eu
wzEwLd/YveEh8WX/l+r8g6gF8OjzzXoQvFIAe4lfXvkUhwFohiCQuBXI34TBzCzb
fGUKJohs6GSrjKRskIJzaojuaHuKMIlX3+Ynx8XoJqczbWZpqdMs+xTFBnNk8HGH
lYLsX+rlphZhPeTPQNT2Q7eEnH3skTzBG2Hmhy/2kpZMxtV/epdMt/+BRSRsa/Rp
LKAL+npYkF9m8Xn0HyWCh2gEpWTHnBOGG/8O7XaPQpJxEfKgCncBjRWGlJlze4Gh
zRJmfE4OyqhHnXmbpgRNglZjNtiq+z3L7vKLwFYYpvL3lcZtzr75vGpBCt+wyQMf
b2ZXUPVG0h7bIOuf6RvYYKkNgEePuLyXlAWuhaTdskoDUrQy2EA=
=wgc5
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.20 (take two)
- Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB
development board,
- AA1024XD12 panel overlay support for the Draak, Ebisu, and
Salvator-X(S) development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Add panel overlay for Draak and Ebisu boards
arm64: dts: renesas: Add panel overlay for Salvator-X(S) boards
arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay support
arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort order
ARM: dts: r9a06g032-rzn1d400-db: Add switch description
dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter
ARM: dts: r9a06g032: Describe switch
ARM: dts: r9a06g032: Describe GMAC2
ARM: dts: r9a06g032: Describe MII converter
arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in comment
ARM: dts: renesas: Fix DA9063 watchdog subnode names
arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHz
Link: https://lore.kernel.org/r/cover.1657278845.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
AngeloGioacchino Del Regno
|
2b48db01a0 |
dt-bindings: power: Add MediaTek Helio X10 MT6795 power domains
Add power domains dt-bindings for MediaTek Helio X10 (MT6795). Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220503141441.125852-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
||
Thierry Reding
|
833f5a7eb2 |
dt-bindings: memory: Add Tegra234 MGBE memory clients
Add the memory client and stream ID definitions for the MGBE hardware found on Tegra234 SoCs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
||
|
Thierry Reding
|
b0aedf342b |
dt-bindings: Add Tegra234 MGBE clocks and resets
Add the clocks and resets used by the MGBE Ethernet hardware found on Tegra234 SoCs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
||
|
Thierry Reding
|
5de7d31b50 |
dt-bindings: power: Add Tegra234 MGBE power domains
Add power domain IDs for the four MGBE power partitions found on Tegra234. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
||
Bjorn Andersson
|
1352b15288 | Merge branch '20220706154337.2026269-1-robert.foss@linaro.org' into arm64-for-5.20 | ||
|
Bjorn Andersson
|
8273ea8994 | Merge branch '20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into arm64-for-5.20 | ||
|
Bjorn Andersson
|
7e06c69221 | Merge branch '20220706154337.2026269-1-robert.foss@linaro.org' into clk-for-5.20 | ||
|
Bjorn Andersson
|
fb162534b3 | Merge branch '20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into clk-for-5.20 | ||
Vladimir Zapolskiy
|
494e984af5 |
dt-bindings: clock: add QCOM SM8450 camera clock bindings
The change adds device tree bindings for camera clock controller found on SM8450 SoC. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220701062622.2757831-2-vladimir.zapolskiy@linaro.org |
||
Jonathan Marek
|
909e5be2ca |
dt-bindings: clock: Add Qcom SM8350 DISPCC bindings
Add sm8350 DISPCC bindings, which are simply a symlink to the sm8250 bindings. Update the documentation with the new compatible. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220706154337.2026269-4-robert.foss@linaro.org |
||
Robert Foss
|
e67a004482 |
dt-bindings: clock: Add Qcom SM8350 GPUCC bindings
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM8350 SoCs. Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Dmitry Baryshkov <dmityr.baryshkov@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220706154337.2026269-2-robert.foss@linaro.org |
||
Geert Uytterhoeven
|
ce05f30dc3 |
Renesas RZ/Five DT Binding Definitions
Clock and reset definitions for the Renesas RZ/Five (R9A07G043) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYsPl3QAKCRCKwlD9ZEnx cHpUAP0Ub6ksTqu3eQHjJZGdD1o8UpR+AK27Sjwm7h6JTZLuiAEAxuug14RU9gBC mJIv1qjFvEYKdeO/f8ASGJ/eKgFS1AY= =LTRY -----END PGP SIGNATURE----- Merge tag 'renesas-r9a07g043-dt-binding-defs-tag2' into HEAD Renesas RZ/Five DT Binding Definitions Clock and reset definitions for the Renesas RZ/Five (R9A07G043) SoC, shared by driver and DT source files. |
||
Lad Prabhakar
|
668d361c9d |
dt-bindings: clock: r9a07g043-cpg: Add Renesas RZ/Five CPG Clock and Reset Definitions
Renesas RZ/Five SoC has almost the same clock structure compared to the Renesas RZ/G2UL SoC, re-use the r9a07g043-cpg.h header file and just amend the RZ/Five CPG clock and reset definitions. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220622181723.13033-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
Peng Fan
|
e2a4a0eeb0 |
dt-bindings: interconnect: add fsl,imx8mp.h
Add fsl,imx8mp.h for i.MX8MP Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220703091132.1412063-3-peng.fan@oss.nxp.com Signed-off-by: Georgi Djakov <djakov@kernel.org> |
||
|
Bjorn Andersson
|
877460f6a4 | Merge branch '20220515210048.483898-8-robimarko@gmail.com' into arm64-for-5.20 | ||
Phil Edworthy
|
34e3b69b1e |
dt-bindings: pinctrl: Add DT bindings for Renesas RZ/V2M pinctrl
Add device tree binding documentation and header file for Renesas RZ/V2M pinctrl. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220624084833.22605-2-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Bjorn Andersson
|
c87969d218 | Merge branch '20220515210048.483898-8-robimarko@gmail.com' into clk-for-5.20 | ||
Robert Marko
|
74622e401e |
dt-bindings: clock: qcom: ipq8074: add USB GDSCs
Add bindings for the USB GDSCs found in IPQ8074 GCC. Signed-off-by: Robert Marko <robimarko@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220515210048.483898-8-robimarko@gmail.com |
||
|
Robert Marko
|
90e6d29060 |
dt-bindings: clock: qcom: ipq8074: add PPE crypto clock
Add binding for the PPE crypto clock in IPQ8074. Signed-off-by: Robert Marko <robimarko@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220515210048.483898-4-robimarko@gmail.com |
||
|
Bjorn Andersson
|
36a7b63f06 |
dt-bindings: mailbox: qcom-ipcc: Add NSP1 client
Add a client for the NSP1 found in some recent Qualcomm platforms. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220629041438.1352536-3-bjorn.andersson@linaro.org |
||
Bryan O'Donoghue
|
07e7fcf171 |
clk: qcom: gcc-msm8939: Add missing SYSTEM_MM_NOC_BFDCD_CLK_SRC
When adding in the indexes for this clock-controller we missed
SYSTEM_MM_NOC_BFDCD_CLK_SRC.
Add it in now.
Fixes:
|
||
Yassine Oudjana
|
57b8b2113e
|
ASoC: dt-bindings: Add bindings for WCD9335 DAIs
Add bindings for the DAIs available in WCD9335 to avoid having to use unclear number indices in device trees. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220622161322.168017-2-y.oudjana@protonmail.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
Clément Léger
|
45ed13d9b4 |
dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter
This MII converter can be found on the RZ/N1 processor family. The MII converter ports are declared as subnodes which are then referenced by users of the PCS driver such as the switch. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20220624144001.95518-5-clement.leger@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |