No core changes this time.
New drivers:
- Xlinix Versal pin control driver.
- Ocelot LAN969x pin control driver.
- T-Head TH1520 RISC-V SoC pin control driver.
- Qualcomm SM8750, IPQ5424, QCS8300, SAR2130P and QCS615 SoC
pin control drivers.
- Qualcomm SM8750 LPASS (low power audio subsystem)
pin control driver.
- Qualcomm PM8937 mixsig IC pin control support, GPIO and
MPP (multi-purpose-pin).
- Samsung Exynos8895 and Exynos9810 SoC pin control driver.
- SpacemiT K1 SoC pin control driver.
- Airhoa EN7581 IC pin control driver.
Improvements:
- The Renesas subdriver now supports schmitt-trigger and
open drain pin configurations if the hardware supports it.
- Support GPIOF and GPIOG banks in the Aspeed G6 SoC.
- Support the DSW community in the Intel Elkhartlake SoC.
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Merge tag 'pinctrl-v6.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"No core changes this time.
New drivers:
- Xlinix Versal pin control driver
- Ocelot LAN969x pin control driver
- T-Head TH1520 RISC-V SoC pin control driver
- Qualcomm SM8750, IPQ5424, QCS8300, SAR2130P and QCS615 SoC pin
control drivers
- Qualcomm SM8750 LPASS (low power audio subsystem) pin control
driver
- Qualcomm PM8937 mixsig IC pin control support, GPIO and MPP
(multi-purpose-pin)
- Samsung Exynos8895 and Exynos9810 SoC pin control driver
- SpacemiT K1 SoC pin control driver
- Airhoa EN7581 IC pin control driver
Improvements:
- The Renesas subdriver now supports schmitt-trigger and open drain
pin configurations if the hardware supports it
- Support GPIOF and GPIOG banks in the Aspeed G6 SoC
- Support the DSW community in the Intel Elkhartlake SoC"
* tag 'pinctrl-v6.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (105 commits)
pinctrl: airoha: Use unsigned long for bit search
pinctrl: k210: Undef K210_PC_DEFAULT
pinctrl: qcom: spmi: fix debugfs drive strength
pinctrl: qcom: Add sm8750 pinctrl driver
dt-bindings: pinctrl: qcom: Add sm8750 pinctrl
pinctrl: cy8c95x0: remove unneeded goto labels
pinctrl: cy8c95x0: embed iterator to the for-loop
pinctrl: cy8c95x0: Use temporary variable for struct device
pinctrl: cy8c95x0: use flexible sleeping in reset function
pinctrl: cy8c95x0: switch to using devm_regulator_get_enable()
pinctrl: cy8c95x0: Use 2-argument strscpy()
dt-bindings: pinctrl: sx150xq: allow gpio line naming
pinctrl: single: add marvell,pxa1908-padconf compatible
dt-bindings: pinctrl: pinctrl-single: add marvell,pxa1908-padconf compatible
dt-bindings: pinctrl: correct typo of description for cv1800
pinctrl: qcom: spmi-mpp: Add PM8937 compatible
dt-bindings: pinctrl: qcom,pmic-mpp: Document PM8937 compatible
pinctrl: qcom-pmic-gpio: add support for PM8937
dt-bindings: pinctrl: qcom,pmic-gpio: add PM8937
pinctrl: Use of_property_present() for non-boolean properties
...
Instead of risking alignment problems and causing (false positive) array
bound warnings when casting a u32 to (64-bit) unsigned long, just use a
native unsigned long for doing bit searches. Avoids warning with GCC 15's
-Warray-bounds -fdiagnostics-details:
In file included from ../include/linux/bitmap.h:11,
from ../include/linux/cpumask.h:12,
from ../arch/x86/include/asm/paravirt.h:21,
from ../arch/x86/include/asm/irqflags.h:80,
from ../include/linux/irqflags.h:18,
from ../include/linux/spinlock.h:59,
from ../include/linux/irq.h:14,
from ../include/linux/irqchip/chained_irq.h:10,
from ../include/linux/gpio/driver.h:8,
from ../drivers/pinctrl/mediatek/pinctrl-airoha.c:11:
In function 'find_next_bit',
inlined from 'airoha_irq_handler' at ../drivers/pinctrl/mediatek/pinctrl-airoha.c:2394:3:
../include/linux/find.h:65:23: error: array subscript 'long unsigned int[0]' is partly outside array bounds of 'u32[1]' {aka 'unsigned int[1]'} [-Werror=array-bounds=]
65 | val = *addr & GENMASK(size - 1, offset);
| ^~~~~
../drivers/pinctrl/mediatek/pinctrl-airoha.c: In function 'airoha_irq_handler':
../drivers/pinctrl/mediatek/pinctrl-airoha.c:2387:21: note: object 'status' of size 4
2387 | u32 status;
| ^~~~~~
Signed-off-by: Kees Cook <kees@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/20241117114534.work.292-kees@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When the temporary macro K210_PC_DEFAULT is not needed anymore,
use its name in the #undef statement instead of
the incorrect "DEFAULT" name.
Fixes: d4c34d09ab ("pinctrl: Add RISC-V Canaan Kendryte K210 FPIOA driver")
Signed-off-by: zhang jiao <zhangjiao2@cmss.chinamobile.com>
Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
Link: https://lore.kernel.org/20241113071201.5440-1-zhangjiao2@cmss.chinamobile.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Commit 723e8462a4 ("pinctrl: qcom: spmi-gpio: Fix the GPIO strength
mapping") fixed a long-standing issue in the Qualcomm SPMI PMIC gpio
driver which had the 'low' and 'high' drive strength settings switched
but failed to update the debugfs interface which still gets this wrong.
Fix the debugfs code so that the exported values match the hardware
settings.
Note that this probably means that most devicetrees that try to describe
the firmware settings got this wrong if the settings were derived from
debugfs. Before the above mentioned commit the settings would have
actually matched the firmware settings even if they were described
incorrectly, but now they are inverted.
Fixes: 723e8462a4 ("pinctrl: qcom: spmi-gpio: Fix the GPIO strength mapping")
Fixes: eadff30244 ("pinctrl: Qualcomm SPMI PMIC GPIO pin controller driver")
Cc: Anjelique Melendez <quic_amelende@quicinc.com>
Cc: stable@vger.kernel.org # 3.19
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/20241025121622.1496-1-johan+linaro@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In some cases the code uses goto labels to just return an error code.
Replace those with direct return:s and drop unneeded goto labels.
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-7-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When we iterate through nports the iterator variable is effectively
being not used outside of the loop. Make it clear by moving its definition
into the for-loop. This makes code cleaner as well.
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-6-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use a temporary variable for the struct device pointers to avoid
dereferencing. This makes code a bit neater.
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-5-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The device reset assert and deassert length was created by usleep_range()
but that does not ensure optimal handling of all the different values from
device tree properties. By switching to the new flexible sleeping helper
function, fsleep(), the correct delay function is called depending on
delay length, e.g. udelay(), usleep_range() or msleep().
While at it, move out GPIO consumer name setting of the reset conditional,
the all necessary checks are already done there, so logically that call is
not related to the reset sequence.
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-4-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The driver does not actively manage regulator state past probe() time,
so we can use devm_regulator_get_enable() to simplify the code.
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-3-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use 2-argument strscpy(), which is not only shorter but also provides
an additional check that destination buffer is an array.
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-2-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add the "marvell,pxa1908-padconf" compatible to allow migrating to a
separate pinctrl driver later.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Link: https://lore.kernel.org/20241104-pxa1908-lkml-v13-3-e050609b8d6c@skole.hr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The use of of_property_read_bool() for non-boolean properties is
deprecated in favor of of_property_present() when testing for property
presence.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20241104194437.327430-1-robh@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This includes following Intel pinctrl changes for v6.13 merge window:
- Expose DSW community on Elkhart Lake.
- Elaborate in the code comment the pull bias settings.
Both have been in linux-next with no reported issues.
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Merge tag 'intel-pinctrl-v6.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel
intel-pinctrl for v6.13-2
This includes following Intel pinctrl changes for v6.13 merge window:
- Expose DSW community on Elkhart Lake.
- Elaborate in the code comment the pull bias settings.
Both have been in linux-next with no reported issues.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Use the gpiochip_populate_parent_fwspec_twocell() helper.
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Merge tag 'renesas-pinctrl-for-v6.13-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: renesas: Updates for v6.13 (take two)
- Use the gpiochip_populate_parent_fwspec_twocell() helper.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Hardware has a DSW (Deep Sleep Well) community that might be exposed
by some BIOSes. Add support for it in the driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Add a human readable decoder for pull bias values in the comment.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
1. Add new pin controller drivers for new Samsung SoCs: Exynos8895,
Exynos9810, Exynos990.
2. Correct the condition when applying further interrupt constraints on
certain Samsung pin controllers. The condition was simply not
effective.
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Merge tag 'samsung-pinctrl-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
Samsung pinctrl drivers changes for v6.13
1. Add new pin controller drivers for new Samsung SoCs: Exynos8895,
Exynos9810, Exynos990.
2. Correct the condition when applying further interrupt constraints on
certain Samsung pin controllers. The condition was simply not
effective.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add drive strength configuration support for GPIO F and G groups.
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/20241023104406.4083460-1-billy_tsai@aspeedtech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The map pointer is freed by pinctrl_utils_free_map(). It must not be a
devm_ pointer or it leads to a double free when the device is unloaded.
This is similar to a couple bugs Harshit Mogalapalli fixed earlier in
commits 3fd976afe9 ("pinctrl: nuvoton: fix a double free in
ma35_pinctrl_dt_node_to_map_func()") and 4575962aee ("pinctrl: sophgo:
fix double free in cv1800_pctrl_dt_node_to_map()").
Fixes: a83c29e1d1 ("pinctrl: spacemit: add support for SpacemiT K1 SoC")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Acked-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/4b5f1306-dc01-4edc-96d3-b232b930ddf2@stanley.mountain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add Samsung Exynos9810 SoC specific data to enable pinctrl
support for platforms based on Exynos9810.
Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241026-exynos9810-v3-8-b89de9441ea8@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
When two client of the same gpio call pinctrl_select_state() for the
same functionality, we are seeing NULL pointer issue while accessing
desc->mux_owner.
Let's say two processes A, B executing in pin_request() for the same pin
and process A updates the desc->mux_usecount but not yet updated the
desc->mux_owner while process B see the desc->mux_usecount which got
updated by A path and further executes strcmp and while accessing
desc->mux_owner it crashes with NULL pointer.
Serialize the access to mux related setting with a mutex lock.
cpu0 (process A) cpu1(process B)
pinctrl_select_state() { pinctrl_select_state() {
pin_request() { pin_request() {
...
....
} else {
desc->mux_usecount++;
desc->mux_usecount && strcmp(desc->mux_owner, owner)) {
if (desc->mux_usecount > 1)
return 0;
desc->mux_owner = owner;
} }
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Link: https://lore.kernel.org/20241014192930.1539673-1-quic_mojha@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since commit 0166dc11be ("of: make CONFIG_OF user selectable"), OF
can be enabled on all architectures. Therefore depending on
COMPILE_TEST as an alternative is no longer needed.
As ARM_SCMI_PROTOCOL already depends on COMPILE_TEST, we also don't
need to add COMPILE_TEST as an alternative dependency for it.
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Link: https://lore.kernel.org/20241022134017.172411db@endymion.delvare
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add driver for the pincontrol device as present on the Qualcomm
SAR2130P platform. This is based on the msm-5.10 tree, tag
KERNEL.PLATFORM.1.0.r4-00400-NEO.0.
Co-developed-by: Mayank Grover <groverm@codeaurora.org>
Signed-off-by: Mayank Grover <groverm@codeaurora.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/20241018-sar2130p-tlmm-v2-2-11a1d09a6e5f@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Marks GPIOs as used on RZ/A1 and RZ/A2,
- Add open-drain and schmitt-trigger support on RZ/V2H(P),
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-pinctrl-for-v6.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: renesas: Updates for v6.13
- Marks GPIOs as used on RZ/A1 and RZ/A2,
- Add open-drain and schmitt-trigger support on RZ/V2H(P),
- Miscellaneous fixes and improvements.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
SpacemiT's K1 SoC has a pinctrl controller which use single register
to describe all functions, which include bias pull up/down(strong pull),
drive strength, schmitter trigger, slew rate, mux mode.
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/20241016-02-k1-pinctrl-v5-2-03d395222e4f@gentoo.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add SoC pinctrl configuration for the Exynos 990. The bank types
used are the same as Exynos 850, so we can reuse its macros.
Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20241016154838.64515-4-igor.belwon@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
The initialization of muxtype deferences pointer func before func
is sanity checked with a null pointer check, hence we have a null
pointer deference issue. Fix this by only deferencing func with
the assignment to muxtype after func has been null pointer checked.
Fixes: 1fc30cd927 ("pinctrl: th1520: Factor out casts")
Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Reported-by: Kees Bakker <kees@ijzerbout.nl>
Acked-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241016155655.334518-1-colin.i.king@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Canaan Kendryte K230 pin controller is only present on Canaan
Kendryte K230 SoCs. Hence add a dependency on ARCH_CANAAN, to prevent
asking the user about this driver when configuring a kernel without
Canaan Kendryte series SoC platform support.
Fixes: 545887eab6 ("pinctrl: canaan: Add support for k230 SoC")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/d70279ba02a67250203744b38314f4475b3c5671.1728986052.git.geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When compile-testing without CONfIG_OF:
drivers/pinctrl/pinctrl-th1520.c: In function 'th1520_pinctrl_dt_node_to_map':
drivers/pinctrl/pinctrl-th1520.c:455:23: error: implicit declaration of function 'pinconf_generic_parse_dt_config'; did you mean 'pinconf_generic_dump_config'? [-Wimplicit-function-declaration]
455 | ret = pinconf_generic_parse_dt_config(child, pctldev, &configs, &nconfigs);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| pinconf_generic_dump_config
Enforce this using Kconig dependencies.
Fixes: bed5cd6f8a ("pinctrl: Add driver for the T-Head TH1520 SoC")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Drew Fustini <drew@pdp7.com>
Link: https://lore.kernel.org/20241015151126.2401855-1-arnd@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add explicit selection of the PINCTRL_RZG2L config option for the
RZ/V2H(P) (R9A09G057) SoC, ensuring pin control driver is enabled
for this SoC.
Fixes: 9bd95ac86e ("pinctrl: renesas: rzg2l: Add support for RZ/V2H SoC")
Reported-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241010132726.702658-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The current implementation only calls chained_irq_enter() and
chained_irq_exit() if it detects pending interrupts.
```
for (i = 0; i < info->stride; i++) {
uregmap_read(info->map, id_reg + 4 * i, ®);
if (!reg)
continue;
chained_irq_enter(parent_chip, desc);
```
However, in case of GPIO pin configured in level mode and the parent
controller configured in edge mode, GPIO interrupt might be lowered by the
hardware. In the result, if the interrupt is short enough, the parent
interrupt is still pending while the GPIO interrupt is cleared;
chained_irq_enter() never gets called and the system hangs trying to
service the parent interrupt.
Moving chained_irq_enter() and chained_irq_exit() outside the for loop
ensures that they are called even when GPIO interrupt is lowered by the
hardware.
The similar code with chained_irq_enter() / chained_irq_exit() functions
wrapping interrupt checking loop may be found in many other drivers:
```
grep -r -A 10 chained_irq_enter drivers/pinctrl
```
Cc: stable@vger.kernel.org
Signed-off-by: Sergey Matsievskiy <matsievskiysv@gmail.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/20241012105743.12450-2-matsievskiysv@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
'new_map' is allocated using devm_* which takes care of freeing the
allocated data on device removal, call to
.dt_free_map = pinconf_generic_dt_free_map
double frees the map as pinconf_generic_dt_free_map() calls
pinctrl_utils_free_map().
Fix this by using kcalloc() instead of auto-managed devm_kcalloc().
Cc: stable@vger.kernel.org
Fixes: f805e35631 ("pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver")
Reported-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com>
Link: https://lore.kernel.org/20241010205237.1245318-1-harshit.m.mogalapalli@oracle.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Found those two while reading the code:
EDGE_TRAGGER -> EDGE_TRIGGER
BOTH_EADGE -> BOTH_EDGES
No functional changes, compile tested only.
Signed-off-by: Marc Ferland <marc.ferland@sonatest.com>
Link: https://lore.kernel.org/20241009151249.2086702-1-marc.ferland@sonatest.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
After commit 0edb555a65 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.
Convert all platform drivers below drivers/pinctrl to use .remove(),
with the eventual goal to drop struct platform_driver::remove_new(). As
.remove() and .remove_new() have the same prototypes, conversion is done
by just changing the structure member name in the driver initializer.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://lore.kernel.org/20241007205803.444994-8-u.kleine-koenig@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Limit the casts to get the mux data and flags from the driver data
pointer with each pin to two inline functions as requested by Andy
during review.
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Drew Fustini <dfustini@tenstorrent.com>
Tested-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241011144826.381104-4-emil.renner.berthing@canonical.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When Drew took over the pinctrl driver it seems like he didn't use the
git tree I pointed him at and thus missed some important fixes to the
tables describing valid pinmux settings.
The documentation has a nice overview table of these settings but
unfortunately it doesn't fully match the register descriptions, which
seem to be the correct version.
Fixes: bed5cd6f8a ("pinctrl: Add driver for the T-Head TH1520 SoC")
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Drew Fustini <dfustini@tenstorrent.com>
Tested-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241011144826.381104-3-emil.renner.berthing@canonical.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When Drew took over the pinctrl driver he must have changed
all the -ENOTSUPP returns into -EOPNOTSUPP. This subtle change
was most likely not spotted because it was never mentioned in the
changelog of the patchset, but it breaks all the places in the
pin control and GPIO frameworks where -ENOTSUPP is expected.
Fixes: bed5cd6f8a ("pinctrl: Add driver for the T-Head TH1520 SoC")
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Drew Fustini <dfustini@tenstorrent.com>
Tested-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241011144826.381104-2-emil.renner.berthing@canonical.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The 'node' member has never been part of this structure so drop its
description.
Fixes: 8b242ca700 ("pinctrl: Add Xilinx ZynqMP pinctrl driver support")
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/20241010080432.7781-1-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The parameters' descriptions are wrong, drop the invalid ones and
document the ones that are missing the description.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/20241010080347.7759-1-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
'map' is allocated using devm_* which takes care of freeing the allocated
data, but in error paths there is a call to pinctrl_utils_free_map()
which also does kfree(map) which leads to a double free.
Use kcalloc() instead of devm_kcalloc() as freeing is manually handled.
Fixes: a29d8e93e7 ("pinctrl: sophgo: add support for CV1800B SoC")
Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com>
Link: https://lore.kernel.org/20241010111830.3474719-1-harshit.m.mogalapalli@oracle.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Added definitions for some pins which were missing from the
S32G2 SIUL2 pinctrl driver. These pins are used by the JTAG,
PFE and LLCE hardware modules.
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
Link: https://lore.kernel.org/20241002135920.3647322-2-andrei.stefanescu@oss.nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
