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ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handler
The ARM PCS mandates that the length and stride bits of the fpscr are cleared on entry to and return from a public interface. Although signal handlers run asynchronously with respect to the interrupted function, the handler itself expects to run as though it has been called like a normal function. This patch updates the state mirroring the VFP hardware before entry to a signal handler so that it adheres to the PCS. Furthermore, we disable VFP to ensure that we trap on any floating point operation performed by the signal handler and synchronise the hardware appropriately. A check is inserted after the signal handler to avoid redundant flushing if VFP was not used. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -564,6 +564,21 @@ int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp,
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if (err)
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return -EFAULT;
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/* Ensure that VFP is disabled. */
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vfp_flush_hwstate(thread);
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/*
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* As per the PCS, clear the length and stride bits for function
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* entry.
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*/
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hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK);
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/*
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* Disable VFP in the hwstate so that we can detect if it gets
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* used.
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*/
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hwstate->fpexc &= ~FPEXC_EN;
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return 0;
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}
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@ -576,7 +591,12 @@ int vfp_restore_user_hwstate(struct user_vfp __user *ufp,
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unsigned long fpexc;
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int err = 0;
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vfp_flush_hwstate(thread);
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/*
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* If VFP has been used, then disable it to avoid corrupting
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* the new thread state.
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*/
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if (hwstate->fpexc & FPEXC_EN)
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vfp_flush_hwstate(thread);
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/*
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* Copy the floating point registers. There can be unused
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