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spi: spi-fsl-lpspi: Fix off-by-one in prescale max
The commit783bf5d09f
("spi: spi-fsl-lpspi: limit PRESCALE bit in TCR register") doesn't implement the prescaler maximum as intended. The maximum allowed value for i.MX93 should be 1 and for i.MX7ULP it should be 7. So this needs also a adjustment of the comparison in the scldiv calculation. Fixes:783bf5d09f
("spi: spi-fsl-lpspi: limit PRESCALE bit in TCR register") Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://patch.msgid.link/20240905111537.90389-1-wahrenst@gmx.net Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -136,7 +136,7 @@ static struct fsl_lpspi_devtype_data imx93_lpspi_devtype_data = {
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};
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static struct fsl_lpspi_devtype_data imx7ulp_lpspi_devtype_data = {
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.prescale_max = 8,
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.prescale_max = 7,
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};
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static const struct of_device_id fsl_lpspi_dt_ids[] = {
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@ -336,7 +336,7 @@ static int fsl_lpspi_set_bitrate(struct fsl_lpspi_data *fsl_lpspi)
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div = DIV_ROUND_UP(perclk_rate, config.speed_hz);
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for (prescale = 0; prescale < prescale_max; prescale++) {
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for (prescale = 0; prescale <= prescale_max; prescale++) {
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scldiv = div / (1 << prescale) - 2;
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if (scldiv < 256) {
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fsl_lpspi->config.prescale = prescale;
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