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ARM: dts: refresh dts file for arch mmp
Append mmp2 and pxa910 dts files. Update PXA168 dts files for irq, timer, gpio components. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Haojian Zhuang
parent
641f4d562c
commit
ff290fc3ed
38
arch/arm/boot/dts/mmp2-brownstone.dts
Normal file
38
arch/arm/boot/dts/mmp2-brownstone.dts
Normal file
@ -0,0 +1,38 @@
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/*
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* Copyright (C) 2012 Marvell Technology Group Ltd.
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* Author: Haojian Zhuang <haojian.zhuang@marvell.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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/dts-v1/;
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/include/ "mmp2.dtsi"
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/ {
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model = "Marvell MMP2 Aspenite Development Board";
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compatible = "mrvl,mmp2-brownstone", "mrvl,mmp2";
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chosen {
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bootargs = "console=ttyS2,38400 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";
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};
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memory {
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reg = <0x00000000 0x04000000>;
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};
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soc {
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apb@d4000000 {
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uart3: uart@d4018000 {
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status = "okay";
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};
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twsi1: i2c@d4011000 {
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status = "okay";
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};
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rtc: rtc@d4010000 {
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status = "okay";
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};
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};
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};
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};
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220
arch/arm/boot/dts/mmp2.dtsi
Normal file
220
arch/arm/boot/dts/mmp2.dtsi
Normal file
@ -0,0 +1,220 @@
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/*
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* Copyright (C) 2012 Marvell Technology Group Ltd.
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* Author: Haojian Zhuang <haojian.zhuang@marvell.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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/include/ "skeleton.dtsi"
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/ {
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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i2c0 = &twsi1;
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i2c1 = &twsi2;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&intc>;
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ranges;
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axi@d4200000 { /* AXI */
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compatible = "mrvl,axi-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xd4200000 0x00200000>;
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ranges;
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intc: interrupt-controller@d4282000 {
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compatible = "mrvl,mmp2-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0xd4282000 0x1000>;
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mrvl,intc-nr-irqs = <64>;
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};
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intcmux4@d4282150 {
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compatible = "mrvl,mmp2-mux-intc";
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interrupts = <4>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x150 0x4>, <0x168 0x4>;
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reg-names = "mux status", "mux mask";
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mrvl,intc-nr-irqs = <2>;
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};
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intcmux5: interrupt-controller@d4282154 {
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compatible = "mrvl,mmp2-mux-intc";
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interrupts = <5>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x154 0x4>, <0x16c 0x4>;
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reg-names = "mux status", "mux mask";
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mrvl,intc-nr-irqs = <2>;
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mrvl,clr-mfp-irq = <1>;
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};
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intcmux9: interrupt-controller@d4282180 {
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compatible = "mrvl,mmp2-mux-intc";
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interrupts = <9>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x180 0x4>, <0x17c 0x4>;
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reg-names = "mux status", "mux mask";
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mrvl,intc-nr-irqs = <3>;
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};
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intcmux17: interrupt-controller@d4282158 {
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compatible = "mrvl,mmp2-mux-intc";
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interrupts = <17>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x158 0x4>, <0x170 0x4>;
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reg-names = "mux status", "mux mask";
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mrvl,intc-nr-irqs = <5>;
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};
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intcmux35: interrupt-controller@d428215c {
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compatible = "mrvl,mmp2-mux-intc";
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interrupts = <35>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x15c 0x4>, <0x174 0x4>;
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reg-names = "mux status", "mux mask";
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mrvl,intc-nr-irqs = <15>;
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};
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intcmux51: interrupt-controller@d4282160 {
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compatible = "mrvl,mmp2-mux-intc";
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interrupts = <51>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x160 0x4>, <0x178 0x4>;
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reg-names = "mux status", "mux mask";
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mrvl,intc-nr-irqs = <2>;
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};
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intcmux55: interrupt-controller@d4282188 {
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compatible = "mrvl,mmp2-mux-intc";
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interrupts = <55>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x188 0x4>, <0x184 0x4>;
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reg-names = "mux status", "mux mask";
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mrvl,intc-nr-irqs = <2>;
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};
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};
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apb@d4000000 { /* APB */
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compatible = "mrvl,apb-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xd4000000 0x00200000>;
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ranges;
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timer0: timer@d4014000 {
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compatible = "mrvl,mmp-timer";
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reg = <0xd4014000 0x100>;
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interrupts = <13>;
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};
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uart1: uart@d4030000 {
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compatible = "mrvl,mmp-uart";
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reg = <0xd4030000 0x1000>;
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interrupts = <27>;
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status = "disabled";
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};
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uart2: uart@d4017000 {
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compatible = "mrvl,mmp-uart";
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reg = <0xd4017000 0x1000>;
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interrupts = <28>;
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status = "disabled";
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};
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uart3: uart@d4018000 {
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compatible = "mrvl,mmp-uart";
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reg = <0xd4018000 0x1000>;
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interrupts = <24>;
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status = "disabled";
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};
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uart4: uart@d4016000 {
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compatible = "mrvl,mmp-uart";
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reg = <0xd4016000 0x1000>;
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interrupts = <46>;
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status = "disabled";
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};
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gpio@d4019000 {
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compatible = "mrvl,mmp-gpio";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xd4019000 0x1000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <49>;
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interrupt-names = "gpio_mux";
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interrupt-controller;
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#interrupt-cells = <1>;
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ranges;
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gcb0: gpio@d4019000 {
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reg = <0xd4019000 0x4>;
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};
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gcb1: gpio@d4019004 {
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reg = <0xd4019004 0x4>;
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};
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gcb2: gpio@d4019008 {
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reg = <0xd4019008 0x4>;
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};
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gcb3: gpio@d4019100 {
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reg = <0xd4019100 0x4>;
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};
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gcb4: gpio@d4019104 {
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reg = <0xd4019104 0x4>;
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};
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gcb5: gpio@d4019108 {
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reg = <0xd4019108 0x4>;
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};
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};
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twsi1: i2c@d4011000 {
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compatible = "mrvl,mmp-twsi";
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reg = <0xd4011000 0x1000>;
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interrupts = <7>;
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mrvl,i2c-fast-mode;
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status = "disabled";
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};
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twsi2: i2c@d4025000 {
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compatible = "mrvl,mmp-twsi";
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reg = <0xd4025000 0x1000>;
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interrupts = <58>;
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status = "disabled";
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};
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rtc: rtc@d4010000 {
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compatible = "mrvl,mmp-rtc";
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reg = <0xd4010000 0x1000>;
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interrupts = <1 0>;
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interrupt-names = "rtc 1Hz", "rtc alarm";
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interrupt-parent = <&intcmux5>;
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status = "disabled";
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};
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};
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};
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};
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@ -18,13 +18,6 @@
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i2c1 = &twsi2;
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};
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intc: intc-interrupt-controller@d4282000 {
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compatible = "mrvl,mmp-intc", "mrvl,intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0xd4282000 0x1000>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -32,6 +25,23 @@
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interrupt-parent = <&intc>;
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ranges;
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axi@d4200000 { /* AXI */
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compatible = "mrvl,axi-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xd4200000 0x00200000>;
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ranges;
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intc: interrupt-controller@d4282000 {
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compatible = "mrvl,mmp-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0xd4282000 0x1000>;
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mrvl,intc-nr-irqs = <64>;
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};
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};
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apb@d4000000 { /* APB */
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compatible = "mrvl,apb-bus", "simple-bus";
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#address-cells = <1>;
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@ -39,40 +49,65 @@
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reg = <0xd4000000 0x00200000>;
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ranges;
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timer0: timer@d4014000 {
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compatible = "mrvl,mmp-timer";
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reg = <0xd4014000 0x100>;
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interrupts = <13>;
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};
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uart1: uart@d4017000 {
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compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
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compatible = "mrvl,mmp-uart";
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reg = <0xd4017000 0x1000>;
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interrupts = <27>;
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status = "disabled";
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};
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uart2: uart@d4018000 {
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compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
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compatible = "mrvl,mmp-uart";
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reg = <0xd4018000 0x1000>;
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interrupts = <28>;
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status = "disabled";
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};
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uart3: uart@d4026000 {
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compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
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compatible = "mrvl,mmp-uart";
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reg = <0xd4026000 0x1000>;
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interrupts = <29>;
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status = "disabled";
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};
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gpio: gpio@d4019000 {
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compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";
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gpio@d4019000 {
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compatible = "mrvl,mmp-gpio";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xd4019000 0x1000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <49>;
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interrupt-names = "gpio_mux";
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gpio-controller;
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#gpio-cells = <1>;
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interrupt-controller;
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#interrupt-cells = <1>;
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ranges;
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gcb0: gpio@d4019000 {
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reg = <0xd4019000 0x4>;
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};
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gcb1: gpio@d4019004 {
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reg = <0xd4019004 0x4>;
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};
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gcb2: gpio@d4019008 {
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reg = <0xd4019008 0x4>;
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};
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gcb3: gpio@d4019100 {
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reg = <0xd4019100 0x4>;
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};
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};
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twsi1: i2c@d4011000 {
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compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
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compatible = "mrvl,mmp-twsi";
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reg = <0xd4011000 0x1000>;
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interrupts = <7>;
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mrvl,i2c-fast-mode;
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@ -80,7 +115,7 @@
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};
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twsi2: i2c@d4025000 {
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compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
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compatible = "mrvl,mmp-twsi";
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reg = <0xd4025000 0x1000>;
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interrupts = <58>;
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status = "disabled";
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38
arch/arm/boot/dts/pxa910-dkb.dts
Normal file
38
arch/arm/boot/dts/pxa910-dkb.dts
Normal file
@ -0,0 +1,38 @@
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/*
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* Copyright (C) 2012 Marvell Technology Group Ltd.
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* Author: Haojian Zhuang <haojian.zhuang@marvell.com>
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*
|
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* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* publishhed by the Free Software Foundation.
|
||||
*/
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/dts-v1/;
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/include/ "pxa910.dtsi"
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/ {
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model = "Marvell PXA910 DKB Development Board";
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compatible = "mrvl,pxa910-dkb", "mrvl,pxa910";
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chosen {
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bootargs = "console=ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";
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};
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memory {
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reg = <0x00000000 0x10000000>;
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};
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soc {
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apb@d4000000 {
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uart1: uart@d4017000 {
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status = "okay";
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};
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twsi1: i2c@d4011000 {
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status = "okay";
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};
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rtc: rtc@d4010000 {
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status = "okay";
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};
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};
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};
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};
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140
arch/arm/boot/dts/pxa910.dtsi
Normal file
140
arch/arm/boot/dts/pxa910.dtsi
Normal file
@ -0,0 +1,140 @@
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/*
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* Copyright (C) 2012 Marvell Technology Group Ltd.
|
||||
* Author: Haojian Zhuang <haojian.zhuang@marvell.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* publishhed by the Free Software Foundation.
|
||||
*/
|
||||
|
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/include/ "skeleton.dtsi"
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|
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/ {
|
||||
aliases {
|
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serial0 = &uart1;
|
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serial1 = &uart2;
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serial2 = &uart3;
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i2c0 = &twsi1;
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i2c1 = &twsi2;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
|
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interrupt-parent = <&intc>;
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ranges;
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axi@d4200000 { /* AXI */
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compatible = "mrvl,axi-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xd4200000 0x00200000>;
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ranges;
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intc: interrupt-controller@d4282000 {
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compatible = "mrvl,mmp-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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||||
reg = <0xd4282000 0x1000>;
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mrvl,intc-nr-irqs = <64>;
|
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};
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||||
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};
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apb@d4000000 { /* APB */
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compatible = "mrvl,apb-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xd4000000 0x00200000>;
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ranges;
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timer0: timer@d4014000 {
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compatible = "mrvl,mmp-timer";
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reg = <0xd4014000 0x100>;
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interrupts = <13>;
|
||||
};
|
||||
|
||||
timer1: timer@d4016000 {
|
||||
compatible = "mrvl,mmp-timer";
|
||||
reg = <0xd4016000 0x100>;
|
||||
interrupts = <29>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@d4017000 {
|
||||
compatible = "mrvl,mmp-uart";
|
||||
reg = <0xd4017000 0x1000>;
|
||||
interrupts = <27>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@d4018000 {
|
||||
compatible = "mrvl,mmp-uart";
|
||||
reg = <0xd4018000 0x1000>;
|
||||
interrupts = <28>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: uart@d4036000 {
|
||||
compatible = "mrvl,mmp-uart";
|
||||
reg = <0xd4036000 0x1000>;
|
||||
interrupts = <59>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpio@d4019000 {
|
||||
compatible = "mrvl,mmp-gpio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xd4019000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <49>;
|
||||
interrupt-names = "gpio_mux";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
|
||||
gcb0: gpio@d4019000 {
|
||||
reg = <0xd4019000 0x4>;
|
||||
};
|
||||
|
||||
gcb1: gpio@d4019004 {
|
||||
reg = <0xd4019004 0x4>;
|
||||
};
|
||||
|
||||
gcb2: gpio@d4019008 {
|
||||
reg = <0xd4019008 0x4>;
|
||||
};
|
||||
|
||||
gcb3: gpio@d4019100 {
|
||||
reg = <0xd4019100 0x4>;
|
||||
};
|
||||
};
|
||||
|
||||
twsi1: i2c@d4011000 {
|
||||
compatible = "mrvl,mmp-twsi";
|
||||
reg = <0xd4011000 0x1000>;
|
||||
interrupts = <7>;
|
||||
mrvl,i2c-fast-mode;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
twsi2: i2c@d4037000 {
|
||||
compatible = "mrvl,mmp-twsi";
|
||||
reg = <0xd4037000 0x1000>;
|
||||
interrupts = <54>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
rtc: rtc@d4010000 {
|
||||
compatible = "mrvl,mmp-rtc";
|
||||
reg = <0xd4010000 0x1000>;
|
||||
interrupts = <5 6>;
|
||||
interrupt-names = "rtc 1Hz", "rtc alarm";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user