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hisi_sas: Add fatal irq handler

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Add handlers for fatal interrupts.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
John Garry 2015-11-18 00:50:58 +08:00 committed by Martin K. Petersen
parent e4189d539f
commit ff165289f9
1 changed files with 119 additions and 0 deletions
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119
drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
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@ -1573,6 +1573,93 @@ static irqreturn_t cq_interrupt_v1_hw(int irq, void *p)
return IRQ_HANDLED;
}
static irqreturn_t fatal_ecc_int_v1_hw(int irq, void *p)
{
struct hisi_hba *hisi_hba = p;
struct device *dev = &hisi_hba->pdev->dev;
u32 ecc_int = hisi_sas_read32(hisi_hba, SAS_ECC_INTR);
if (ecc_int & SAS_ECC_INTR_DQ_ECC1B_MSK) {
u32 ecc_err = hisi_sas_read32(hisi_hba, HGC_ECC_ERR);
panic("%s: Fatal DQ 1b ECC interrupt (0x%x)\n",
dev_name(dev), ecc_err);
}
if (ecc_int & SAS_ECC_INTR_DQ_ECCBAD_MSK) {
u32 addr = (hisi_sas_read32(hisi_hba, HGC_DQ_ECC_ADDR) &
HGC_DQ_ECC_ADDR_BAD_MSK) >>
HGC_DQ_ECC_ADDR_BAD_OFF;
panic("%s: Fatal DQ RAM ECC interrupt @ 0x%08x\n",
dev_name(dev), addr);
}
if (ecc_int & SAS_ECC_INTR_IOST_ECC1B_MSK) {
u32 ecc_err = hisi_sas_read32(hisi_hba, HGC_ECC_ERR);
panic("%s: Fatal IOST 1b ECC interrupt (0x%x)\n",
dev_name(dev), ecc_err);
}
if (ecc_int & SAS_ECC_INTR_IOST_ECCBAD_MSK) {
u32 addr = (hisi_sas_read32(hisi_hba, HGC_IOST_ECC_ADDR) &
HGC_IOST_ECC_ADDR_BAD_MSK) >>
HGC_IOST_ECC_ADDR_BAD_OFF;
panic("%s: Fatal IOST RAM ECC interrupt @ 0x%08x\n",
dev_name(dev), addr);
}
if (ecc_int & SAS_ECC_INTR_ITCT_ECCBAD_MSK) {
u32 addr = (hisi_sas_read32(hisi_hba, HGC_ITCT_ECC_ADDR) &
HGC_ITCT_ECC_ADDR_BAD_MSK) >>
HGC_ITCT_ECC_ADDR_BAD_OFF;
panic("%s: Fatal TCT RAM ECC interrupt @ 0x%08x\n",
dev_name(dev), addr);
}
if (ecc_int & SAS_ECC_INTR_ITCT_ECC1B_MSK) {
u32 ecc_err = hisi_sas_read32(hisi_hba, HGC_ECC_ERR);
panic("%s: Fatal ITCT 1b ECC interrupt (0x%x)\n",
dev_name(dev), ecc_err);
}
hisi_sas_write32(hisi_hba, SAS_ECC_INTR, ecc_int | 0x3f);
return IRQ_HANDLED;
}
static irqreturn_t fatal_axi_int_v1_hw(int irq, void *p)
{
struct hisi_hba *hisi_hba = p;
struct device *dev = &hisi_hba->pdev->dev;
u32 axi_int = hisi_sas_read32(hisi_hba, ENT_INT_SRC2);
u32 axi_info = hisi_sas_read32(hisi_hba, HGC_AXI_FIFO_ERR_INFO);
if (axi_int & ENT_INT_SRC2_DQ_CFG_ERR_MSK)
panic("%s: Fatal DQ_CFG_ERR interrupt (0x%x)\n",
dev_name(dev), axi_info);
if (axi_int & ENT_INT_SRC2_CQ_CFG_ERR_MSK)
panic("%s: Fatal CQ_CFG_ERR interrupt (0x%x)\n",
dev_name(dev), axi_info);
if (axi_int & ENT_INT_SRC2_AXI_WRONG_INT_MSK)
panic("%s: Fatal AXI_WRONG_INT interrupt (0x%x)\n",
dev_name(dev), axi_info);
if (axi_int & ENT_INT_SRC2_AXI_OVERLF_INT_MSK)
panic("%s: Fatal AXI_OVERLF_INT incorrect interrupt (0x%x)\n",
dev_name(dev), axi_info);
hisi_sas_write32(hisi_hba, ENT_INT_SRC2, axi_int | 0x30000000);
return IRQ_HANDLED;
}
static const char phy_int_names[HISI_SAS_PHY_INT_NR][32] = {
{"Bcast"},
{"Phy Up"},
@ -1580,12 +1667,22 @@ static const char phy_int_names[HISI_SAS_PHY_INT_NR][32] = {
};
static const char cq_int_name[32] = "cq";
static const char fatal_int_name[HISI_SAS_FATAL_INT_NR][32] = {
"fatal ecc",
"fatal axi"
};
static irq_handler_t phy_interrupts[HISI_SAS_PHY_INT_NR] = {
int_bcast_v1_hw,
int_phyup_v1_hw,
int_abnormal_v1_hw
};
static irq_handler_t fatal_interrupts[HISI_SAS_MAX_QUEUES] = {
fatal_ecc_int_v1_hw,
fatal_axi_int_v1_hw
};
static int interrupt_init_v1_hw(struct hisi_hba *hisi_hba)
{
struct device *dev = &hisi_hba->pdev->dev;
@ -1646,6 +1743,28 @@ static int interrupt_init_v1_hw(struct hisi_hba *hisi_hba)
}
}
idx = (hisi_hba->n_phy * HISI_SAS_PHY_INT_NR) + hisi_hba->queue_count;
for (i = 0; i < HISI_SAS_FATAL_INT_NR; i++, idx++) {
irq = irq_of_parse_and_map(np, idx);
if (!irq) {
dev_err(dev, "irq init: could not map fatal interrupt %d\n",
idx);
return -ENOENT;
}
(void)snprintf(&int_names[idx * HISI_SAS_NAME_LEN],
HISI_SAS_NAME_LEN,
"%s %s:%d", dev_name(dev), fatal_int_name[i], i);
rc = devm_request_irq(dev, irq, fatal_interrupts[i], 0,
&int_names[idx * HISI_SAS_NAME_LEN],
hisi_hba);
if (rc) {
dev_err(dev,
"irq init: could not request fatal interrupt %d, rc=%d\n",
irq, rc);
return -ENOENT;
}
}
return 0;
}