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memory: brcmstb: dpfe: support new way of passing data from the DCPU
The DCPU can now send message data in two ways: - via the data RAM, as before (this is now message type 0) - via the message RAM (this is message type 1) In order to support both methods, we check the message type of the response (bits 31:28) and then treat the offset (bits 27:0) accordingly. Signed-off-by: Markus Mayer <mmayer@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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@ -45,8 +45,16 @@
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#define REG_TO_DCPU_MBOX 0x10
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#define REG_TO_HOST_MBOX 0x14
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/* Macros to process offsets returned by the DCPU */
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#define DRAM_MSG_ADDR_OFFSET 0x0
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#define DRAM_MSG_TYPE_OFFSET 0x1c
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#define DRAM_MSG_ADDR_MASK ((1UL << DRAM_MSG_TYPE_OFFSET) - 1)
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#define DRAM_MSG_TYPE_MASK ((1UL << \
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(BITS_PER_LONG - DRAM_MSG_TYPE_OFFSET)) - 1)
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/* Message RAM */
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#define DCPU_MSG_RAM(x) (0x100 + (x) * sizeof(u32))
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#define DCPU_MSG_RAM_START 0x100
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#define DCPU_MSG_RAM(x) (DCPU_MSG_RAM_START + (x) * sizeof(u32))
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/* DRAM Info Offsets & Masks */
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#define DRAM_INFO_INTERVAL 0x0
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@ -255,6 +263,40 @@ static unsigned int get_msg_chksum(const u32 msg[])
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return sum;
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}
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static void __iomem *get_msg_ptr(struct private_data *priv, u32 response,
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char *buf, ssize_t *size)
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{
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unsigned int msg_type;
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unsigned int offset;
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void __iomem *ptr = NULL;
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msg_type = (response >> DRAM_MSG_TYPE_OFFSET) & DRAM_MSG_TYPE_MASK;
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offset = (response >> DRAM_MSG_ADDR_OFFSET) & DRAM_MSG_ADDR_MASK;
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/*
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* msg_type == 1: the offset is relative to the message RAM
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* msg_type == 0: the offset is relative to the data RAM (this is the
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* previous way of passing data)
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* msg_type is anything else: there's critical hardware problem
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*/
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switch (msg_type) {
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case 1:
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ptr = priv->regs + DCPU_MSG_RAM_START + offset;
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break;
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case 0:
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ptr = priv->dmem + offset;
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break;
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default:
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dev_emerg(priv->dev, "invalid message reply from DCPU: %#x\n",
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response);
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if (buf && size)
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*size = sprintf(buf,
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"FATAL: communication error with DCPU\n");
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}
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return ptr;
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}
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static int __send_command(struct private_data *priv, unsigned int cmd,
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u32 result[])
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{
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@ -528,7 +570,6 @@ static ssize_t show_refresh(struct device *dev,
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u32 response[MSG_FIELD_MAX];
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void __iomem *info;
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struct private_data *priv;
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unsigned int offset;
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u8 refresh, sr_abort, ppre, thermal_offs, tuf;
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u32 mr4;
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ssize_t ret;
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@ -538,8 +579,10 @@ static ssize_t show_refresh(struct device *dev,
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return ret;
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priv = dev_get_drvdata(dev);
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offset = response[MSG_ARG0];
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info = priv->dmem + offset;
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info = get_msg_ptr(priv, response[MSG_ARG0], buf, &ret);
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if (!info)
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return ret;
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mr4 = readl_relaxed(info + DRAM_INFO_MR4) & DRAM_INFO_MR4_MASK;
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@ -561,7 +604,6 @@ static ssize_t store_refresh(struct device *dev, struct device_attribute *attr,
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u32 response[MSG_FIELD_MAX];
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struct private_data *priv;
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void __iomem *info;
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unsigned int offset;
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unsigned long val;
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int ret;
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@ -574,8 +616,10 @@ static ssize_t store_refresh(struct device *dev, struct device_attribute *attr,
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if (ret)
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return ret;
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offset = response[MSG_ARG0];
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info = priv->dmem + offset;
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info = get_msg_ptr(priv, response[MSG_ARG0], NULL, NULL);
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if (!info)
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return -EIO;
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writel_relaxed(val, info + DRAM_INFO_INTERVAL);
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return count;
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@ -587,16 +631,17 @@ static ssize_t show_vendor(struct device *dev, struct device_attribute *devattr,
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u32 response[MSG_FIELD_MAX];
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struct private_data *priv;
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void __iomem *info;
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unsigned int offset;
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ssize_t ret;
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ret = generic_show(DPFE_CMD_GET_VENDOR, response, dev, buf);
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if (ret)
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return ret;
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offset = response[MSG_ARG0];
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priv = dev_get_drvdata(dev);
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info = priv->dmem + offset;
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info = get_msg_ptr(priv, response[MSG_ARG0], buf, &ret);
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if (!info)
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return ret;
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return sprintf(buf, "%#x %#x %#x %#x %#x\n",
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readl_relaxed(info + DRAM_VENDOR_MR5) & DRAM_VENDOR_MASK,
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