ARM: dts: sun8i: Add ir receiver nodes to H3 dtsi

The H3 ir receiver is completely compatible with the one found in the A31.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Hans de Goede 2016-02-24 00:03:16 +01:00 committed by Maxime Ripard
parent 9338536731
commit fe0a8ea1fb

View File

@ -295,6 +295,14 @@
clock-indices = <0>, <1>; clock-indices = <0>, <1>;
clock-output-names = "apb0_pio", "apb0_ir"; clock-output-names = "apb0_pio", "apb0_ir";
}; };
ir_clk: ir_clk@01f01454 {
compatible = "allwinner,sun4i-a10-mod0-clk";
reg = <0x01f01454 0x4>;
#clock-cells = <0>;
clocks = <&osc32k>, <&osc24M>;
clock-output-names = "ir";
};
}; };
soc { soc {
@ -519,6 +527,16 @@
#reset-cells = <1>; #reset-cells = <1>;
}; };
ir: ir@01f02000 {
compatible = "allwinner,sun5i-a13-ir";
clocks = <&apb0_gates 1>, <&ir_clk>;
clock-names = "apb", "ir";
resets = <&apb0_reset 1>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x01f02000 0x40>;
status = "disabled";
};
r_pio: pinctrl@01f02c00 { r_pio: pinctrl@01f02c00 {
compatible = "allwinner,sun8i-h3-r-pinctrl"; compatible = "allwinner,sun8i-h3-r-pinctrl";
reg = <0x01f02c00 0x400>; reg = <0x01f02c00 0x400>;
@ -529,6 +547,13 @@
#gpio-cells = <3>; #gpio-cells = <3>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <3>; #interrupt-cells = <3>;
ir_pins_a: ir@0 {
allwinner,pins = "PL11";
allwinner,function = "s_cir_rx";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
}; };
}; };
}; };