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ARM: dts: sun8i: Add ir receiver nodes to H3 dtsi
The H3 ir receiver is completely compatible with the one found in the A31. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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9338536731
commit
fe0a8ea1fb
@ -295,6 +295,14 @@
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clock-indices = <0>, <1>;
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clock-indices = <0>, <1>;
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clock-output-names = "apb0_pio", "apb0_ir";
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clock-output-names = "apb0_pio", "apb0_ir";
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};
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};
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ir_clk: ir_clk@01f01454 {
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compatible = "allwinner,sun4i-a10-mod0-clk";
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reg = <0x01f01454 0x4>;
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#clock-cells = <0>;
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clocks = <&osc32k>, <&osc24M>;
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clock-output-names = "ir";
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};
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};
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};
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soc {
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soc {
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@ -519,6 +527,16 @@
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#reset-cells = <1>;
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#reset-cells = <1>;
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};
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};
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ir: ir@01f02000 {
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compatible = "allwinner,sun5i-a13-ir";
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clocks = <&apb0_gates 1>, <&ir_clk>;
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clock-names = "apb", "ir";
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resets = <&apb0_reset 1>;
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x01f02000 0x40>;
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status = "disabled";
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};
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r_pio: pinctrl@01f02c00 {
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r_pio: pinctrl@01f02c00 {
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compatible = "allwinner,sun8i-h3-r-pinctrl";
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compatible = "allwinner,sun8i-h3-r-pinctrl";
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reg = <0x01f02c00 0x400>;
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reg = <0x01f02c00 0x400>;
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@ -529,6 +547,13 @@
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#gpio-cells = <3>;
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#gpio-cells = <3>;
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interrupt-controller;
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interrupt-controller;
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#interrupt-cells = <3>;
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#interrupt-cells = <3>;
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ir_pins_a: ir@0 {
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allwinner,pins = "PL11";
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allwinner,function = "s_cir_rx";
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allwinner,drive = <SUN4I_PINCTRL_10_MA>;
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
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};
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};
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};
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};
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};
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};
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};
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