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ARM: cci driver need big endian fixes in asm code
cci_enable_port_for_self written in asm and it works with h/w registers that are in little endian format. When run in big endian mode it needs byteswaped constants before/after it writes/reads to/from such registers Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
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@ -280,7 +280,7 @@ asmlinkage void __naked cci_enable_port_for_self(void)
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/* Enable the CCI port */
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" ldr r0, [r0, %[offsetof_port_phys]] \n"
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" mov r3, #"__stringify(CCI_ENABLE_REQ)" \n"
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" mov r3, %[cci_enable_req]\n"
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" str r3, [r0, #"__stringify(CCI_PORT_CTRL)"] \n"
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/* poll the status reg for completion */
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@ -288,7 +288,7 @@ asmlinkage void __naked cci_enable_port_for_self(void)
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" ldr r0, [r1] \n"
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" ldr r0, [r0, r1] @ cci_ctrl_base \n"
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"4: ldr r1, [r0, #"__stringify(CCI_CTRL_STATUS)"] \n"
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" tst r1, #1 \n"
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" tst r1, %[cci_control_status_bits] \n"
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" bne 4b \n"
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" mov r0, #0 \n"
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@ -301,6 +301,8 @@ asmlinkage void __naked cci_enable_port_for_self(void)
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"7: .word cci_ctrl_phys - . \n"
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: :
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[sizeof_cpu_port] "i" (sizeof(cpu_port)),
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[cci_enable_req] "i" cpu_to_le32(CCI_ENABLE_REQ),
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[cci_control_status_bits] "i" cpu_to_le32(1),
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#ifndef __ARMEB__
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[offsetof_cpu_port_mpidr_lsb] "i" (offsetof(struct cpu_port, mpidr)),
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#else
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