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ASoC: AC97: S3C: Add controller driver
Add the AC97 controller driver for Samsung SoCs that have one. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Jassi Brar
Mark Brown
parent
994dc4245d
commit
fc93ea2f93
@ -32,7 +32,11 @@ config SND_S3C2443_SOC_AC97
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select S3C2410_DMA
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select AC97_BUS
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select SND_SOC_AC97_BUS
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config SND_S3C_SOC_AC97
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tristate
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select SND_SOC_AC97_BUS
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config SND_S3C24XX_SOC_NEO1973_WM8753
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tristate "SoC I2S Audio support for NEO1973 - WM8753"
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depends on SND_S3C24XX_SOC && MACH_NEO1973_GTA01
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@ -4,12 +4,14 @@ snd-soc-s3c24xx-i2s-objs := s3c24xx-i2s.o
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snd-soc-s3c2412-i2s-objs := s3c2412-i2s.o
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snd-soc-s3c64xx-i2s-objs := s3c64xx-i2s.o
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snd-soc-s3c2443-ac97-objs := s3c2443-ac97.o
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snd-soc-s3c-ac97-objs := s3c-ac97.o
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snd-soc-s3c-i2s-v2-objs := s3c-i2s-v2.o
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snd-soc-s3c-pcm-objs := s3c-pcm.o
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obj-$(CONFIG_SND_S3C24XX_SOC) += snd-soc-s3c24xx.o
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obj-$(CONFIG_SND_S3C24XX_SOC_I2S) += snd-soc-s3c24xx-i2s.o
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obj-$(CONFIG_SND_S3C2443_SOC_AC97) += snd-soc-s3c2443-ac97.o
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obj-$(CONFIG_SND_S3C_SOC_AC97) += snd-soc-s3c-ac97.o
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obj-$(CONFIG_SND_S3C2412_SOC_I2S) += snd-soc-s3c2412-i2s.o
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obj-$(CONFIG_SND_S3C64XX_SOC_I2S) += snd-soc-s3c64xx-i2s.o
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obj-$(CONFIG_SND_S3C_I2SV2_SOC) += snd-soc-s3c-i2s-v2.o
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@ -37,4 +39,3 @@ obj-$(CONFIG_SND_S3C24XX_SOC_SIMTEC) += snd-soc-s3c24xx-simtec.o
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obj-$(CONFIG_SND_S3C24XX_SOC_SIMTEC_HERMES) += snd-soc-s3c24xx-simtec-hermes.o
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obj-$(CONFIG_SND_S3C24XX_SOC_SIMTEC_TLV320AIC23) += snd-soc-s3c24xx-simtec-tlv320aic23.o
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obj-$(CONFIG_SND_S3C64XX_SOC_WM8580) += snd-soc-smdk64xx-wm8580.o
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518
sound/soc/s3c24xx/s3c-ac97.c
Normal file
518
sound/soc/s3c24xx/s3c-ac97.c
Normal file
@ -0,0 +1,518 @@
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/* sound/soc/s3c24xx/s3c-ac97.c
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*
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* ALSA SoC Audio Layer - S3C AC97 Controller driver
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* Evolved from s3c2443-ac97.c
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*
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* Copyright (c) 2010 Samsung Electronics Co. Ltd
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* Author: Jaswinder Singh <jassi.brar@samsung.com>
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* Credits: Graeme Gregory, Sean Choi
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <sound/soc.h>
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#include <plat/regs-ac97.h>
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#include <mach/dma.h>
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#include <plat/audio.h>
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#include "s3c-dma.h"
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#include "s3c-ac97.h"
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#define AC_CMD_ADDR(x) (x << 16)
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#define AC_CMD_DATA(x) (x & 0xffff)
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struct s3c_ac97_info {
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unsigned state;
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struct clk *ac97_clk;
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void __iomem *regs;
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struct mutex lock;
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struct completion done;
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};
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static struct s3c_ac97_info s3c_ac97;
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static struct s3c2410_dma_client s3c_dma_client_out = {
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.name = "AC97 PCMOut"
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};
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static struct s3c2410_dma_client s3c_dma_client_in = {
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.name = "AC97 PCMIn"
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};
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static struct s3c2410_dma_client s3c_dma_client_micin = {
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.name = "AC97 MicIn"
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};
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static struct s3c_dma_params s3c_ac97_pcm_out = {
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.client = &s3c_dma_client_out,
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.dma_size = 4,
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};
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static struct s3c_dma_params s3c_ac97_pcm_in = {
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.client = &s3c_dma_client_in,
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.dma_size = 4,
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};
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static struct s3c_dma_params s3c_ac97_mic_in = {
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.client = &s3c_dma_client_micin,
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.dma_size = 4,
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};
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static void s3c_ac97_activate(struct snd_ac97 *ac97)
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{
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u32 ac_glbctrl, stat;
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stat = readl(s3c_ac97.regs + S3C_AC97_GLBSTAT) & 0x7;
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if (stat == S3C_AC97_GLBSTAT_MAINSTATE_ACTIVE)
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return; /* Return if already active */
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INIT_COMPLETION(s3c_ac97.done);
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ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
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ac_glbctrl = S3C_AC97_GLBCTRL_ACLINKON;
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writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
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msleep(1);
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ac_glbctrl |= S3C_AC97_GLBCTRL_TRANSFERDATAENABLE;
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writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
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msleep(1);
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ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
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ac_glbctrl |= S3C_AC97_GLBCTRL_CODECREADYIE;
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writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
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if (!wait_for_completion_timeout(&s3c_ac97.done, HZ))
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printk(KERN_ERR "AC97: Unable to activate!");
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}
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static unsigned short s3c_ac97_read(struct snd_ac97 *ac97,
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unsigned short reg)
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{
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u32 ac_glbctrl, ac_codec_cmd;
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u32 stat, addr, data;
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mutex_lock(&s3c_ac97.lock);
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s3c_ac97_activate(ac97);
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INIT_COMPLETION(s3c_ac97.done);
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ac_codec_cmd = readl(s3c_ac97.regs + S3C_AC97_CODEC_CMD);
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ac_codec_cmd = S3C_AC97_CODEC_CMD_READ | AC_CMD_ADDR(reg);
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writel(ac_codec_cmd, s3c_ac97.regs + S3C_AC97_CODEC_CMD);
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udelay(50);
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ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
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ac_glbctrl |= S3C_AC97_GLBCTRL_CODECREADYIE;
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writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
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if (!wait_for_completion_timeout(&s3c_ac97.done, HZ))
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printk(KERN_ERR "AC97: Unable to read!");
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stat = readl(s3c_ac97.regs + S3C_AC97_STAT);
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addr = (stat >> 16) & 0x7f;
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data = (stat & 0xffff);
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if (addr != reg)
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printk(KERN_ERR "s3c-ac97: req addr = %02x, rep addr = %02x\n", reg, addr);
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mutex_unlock(&s3c_ac97.lock);
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return (unsigned short)data;
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}
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static void s3c_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
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unsigned short val)
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{
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u32 ac_glbctrl, ac_codec_cmd;
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mutex_lock(&s3c_ac97.lock);
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s3c_ac97_activate(ac97);
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INIT_COMPLETION(s3c_ac97.done);
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ac_codec_cmd = readl(s3c_ac97.regs + S3C_AC97_CODEC_CMD);
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ac_codec_cmd = AC_CMD_ADDR(reg) | AC_CMD_DATA(val);
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writel(ac_codec_cmd, s3c_ac97.regs + S3C_AC97_CODEC_CMD);
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udelay(50);
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ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
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ac_glbctrl |= S3C_AC97_GLBCTRL_CODECREADYIE;
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writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
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if (!wait_for_completion_timeout(&s3c_ac97.done, HZ))
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printk(KERN_ERR "AC97: Unable to write!");
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ac_codec_cmd = readl(s3c_ac97.regs + S3C_AC97_CODEC_CMD);
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ac_codec_cmd |= S3C_AC97_CODEC_CMD_READ;
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writel(ac_codec_cmd, s3c_ac97.regs + S3C_AC97_CODEC_CMD);
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mutex_unlock(&s3c_ac97.lock);
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}
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static void s3c_ac97_cold_reset(struct snd_ac97 *ac97)
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{
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writel(S3C_AC97_GLBCTRL_COLDRESET,
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s3c_ac97.regs + S3C_AC97_GLBCTRL);
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msleep(1);
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writel(0, s3c_ac97.regs + S3C_AC97_GLBCTRL);
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msleep(1);
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}
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static void s3c_ac97_warm_reset(struct snd_ac97 *ac97)
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{
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u32 stat;
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stat = readl(s3c_ac97.regs + S3C_AC97_GLBSTAT) & 0x7;
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if (stat == S3C_AC97_GLBSTAT_MAINSTATE_ACTIVE)
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return; /* Return if already active */
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writel(S3C_AC97_GLBCTRL_WARMRESET, s3c_ac97.regs + S3C_AC97_GLBCTRL);
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msleep(1);
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writel(0, s3c_ac97.regs + S3C_AC97_GLBCTRL);
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msleep(1);
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s3c_ac97_activate(ac97);
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}
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static irqreturn_t s3c_ac97_irq(int irq, void *dev_id)
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{
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u32 ac_glbctrl, ac_glbstat;
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ac_glbstat = readl(s3c_ac97.regs + S3C_AC97_GLBSTAT);
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if (ac_glbstat & S3C_AC97_GLBSTAT_CODECREADY) {
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ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
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ac_glbctrl &= ~S3C_AC97_GLBCTRL_CODECREADYIE;
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writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
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complete(&s3c_ac97.done);
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}
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ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
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ac_glbctrl |= (1<<30); /* Clear interrupt */
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writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
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return IRQ_HANDLED;
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}
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struct snd_ac97_bus_ops soc_ac97_ops = {
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.read = s3c_ac97_read,
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.write = s3c_ac97_write,
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.warm_reset = s3c_ac97_warm_reset,
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.reset = s3c_ac97_cold_reset,
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};
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EXPORT_SYMBOL_GPL(soc_ac97_ops);
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static int s3c_ac97_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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cpu_dai->dma_data = &s3c_ac97_pcm_out;
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else
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cpu_dai->dma_data = &s3c_ac97_pcm_in;
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return 0;
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}
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static int s3c_ac97_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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u32 ac_glbctrl;
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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int channel = ((struct s3c_dma_params *)
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rtd->dai->cpu_dai->dma_data)->channel;
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ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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ac_glbctrl &= ~S3C_AC97_GLBCTRL_PCMINTM_MASK;
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else
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ac_glbctrl &= ~S3C_AC97_GLBCTRL_PCMOUTTM_MASK;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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ac_glbctrl |= S3C_AC97_GLBCTRL_PCMINTM_DMA;
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else
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ac_glbctrl |= S3C_AC97_GLBCTRL_PCMOUTTM_DMA;
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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break;
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}
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writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
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s3c2410_dma_ctrl(channel, S3C2410_DMAOP_STARTED);
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return 0;
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}
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static int s3c_ac97_hw_mic_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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return -ENODEV;
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else
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cpu_dai->dma_data = &s3c_ac97_mic_in;
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return 0;
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}
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static int s3c_ac97_mic_trigger(struct snd_pcm_substream *substream,
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int cmd, struct snd_soc_dai *dai)
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{
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u32 ac_glbctrl;
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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int channel = ((struct s3c_dma_params *)
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rtd->dai->cpu_dai->dma_data)->channel;
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ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
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ac_glbctrl &= ~S3C_AC97_GLBCTRL_MICINTM_MASK;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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ac_glbctrl |= S3C_AC97_GLBCTRL_MICINTM_DMA;
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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break;
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}
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writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
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s3c2410_dma_ctrl(channel, S3C2410_DMAOP_STARTED);
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return 0;
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}
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static struct snd_soc_dai_ops s3c_ac97_dai_ops = {
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.hw_params = s3c_ac97_hw_params,
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.trigger = s3c_ac97_trigger,
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};
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static struct snd_soc_dai_ops s3c_ac97_mic_dai_ops = {
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.hw_params = s3c_ac97_hw_mic_params,
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.trigger = s3c_ac97_mic_trigger,
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};
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struct snd_soc_dai s3c_ac97_dai[] = {
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[S3C_AC97_DAI_PCM] = {
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.name = "s3c-ac97",
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.id = S3C_AC97_DAI_PCM,
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.ac97_control = 1,
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.playback = {
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.stream_name = "AC97 Playback",
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,},
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.capture = {
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.stream_name = "AC97 Capture",
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,},
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.ops = &s3c_ac97_dai_ops,
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},
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[S3C_AC97_DAI_MIC] = {
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.name = "s3c-ac97-mic",
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.id = S3C_AC97_DAI_MIC,
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.ac97_control = 1,
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.capture = {
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.stream_name = "AC97 Mic Capture",
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.channels_min = 1,
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.channels_max = 1,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,},
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.ops = &s3c_ac97_mic_dai_ops,
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},
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};
|
||||
EXPORT_SYMBOL_GPL(s3c_ac97_dai);
|
||||
|
||||
static __devinit int s3c_ac97_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *mem_res, *dmatx_res, *dmarx_res, *dmamic_res, *irq_res;
|
||||
struct s3c_audio_pdata *ac97_pdata;
|
||||
int ret;
|
||||
|
||||
ac97_pdata = pdev->dev.platform_data;
|
||||
if (!ac97_pdata || !ac97_pdata->cfg_gpio) {
|
||||
dev_err(&pdev->dev, "cfg_gpio callback not provided!\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Check for availability of necessary resource */
|
||||
dmatx_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
|
||||
if (!dmatx_res) {
|
||||
dev_err(&pdev->dev, "Unable to get AC97-TX dma resource\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
dmarx_res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
|
||||
if (!dmarx_res) {
|
||||
dev_err(&pdev->dev, "Unable to get AC97-RX dma resource\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
dmamic_res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
|
||||
if (!dmamic_res) {
|
||||
dev_err(&pdev->dev, "Unable to get AC97-MIC dma resource\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!mem_res) {
|
||||
dev_err(&pdev->dev, "Unable to get register resource\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
||||
if (!irq_res) {
|
||||
dev_err(&pdev->dev, "AC97 IRQ not provided!\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
if (!request_mem_region(mem_res->start,
|
||||
resource_size(mem_res), "s3c-ac97")) {
|
||||
dev_err(&pdev->dev, "Unable to request register region\n");
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
s3c_ac97_pcm_out.channel = dmatx_res->start;
|
||||
s3c_ac97_pcm_out.dma_addr = mem_res->start + S3C_AC97_PCM_DATA;
|
||||
s3c_ac97_pcm_in.channel = dmarx_res->start;
|
||||
s3c_ac97_pcm_in.dma_addr = mem_res->start + S3C_AC97_PCM_DATA;
|
||||
s3c_ac97_mic_in.channel = dmamic_res->start;
|
||||
s3c_ac97_mic_in.dma_addr = mem_res->start + S3C_AC97_MIC_DATA;
|
||||
|
||||
init_completion(&s3c_ac97.done);
|
||||
mutex_init(&s3c_ac97.lock);
|
||||
|
||||
s3c_ac97.regs = ioremap(mem_res->start, resource_size(mem_res));
|
||||
if (s3c_ac97.regs == NULL) {
|
||||
dev_err(&pdev->dev, "Unable to ioremap register region\n");
|
||||
ret = -ENXIO;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
s3c_ac97.ac97_clk = clk_get(&pdev->dev, "ac97");
|
||||
if (IS_ERR(s3c_ac97.ac97_clk)) {
|
||||
dev_err(&pdev->dev, "s3c-ac97 failed to get ac97_clock\n");
|
||||
ret = -ENODEV;
|
||||
goto err2;
|
||||
}
|
||||
clk_enable(s3c_ac97.ac97_clk);
|
||||
|
||||
if (ac97_pdata->cfg_gpio(pdev)) {
|
||||
dev_err(&pdev->dev, "Unable to configure gpio\n");
|
||||
ret = -EINVAL;
|
||||
goto err3;
|
||||
}
|
||||
|
||||
ret = request_irq(irq_res->start, s3c_ac97_irq,
|
||||
IRQF_DISABLED, "AC97", NULL);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "s3c-ac97: interrupt request failed.\n");
|
||||
goto err4;
|
||||
}
|
||||
|
||||
s3c_ac97_dai[S3C_AC97_DAI_PCM].dev = &pdev->dev;
|
||||
s3c_ac97_dai[S3C_AC97_DAI_MIC].dev = &pdev->dev;
|
||||
|
||||
ret = snd_soc_register_dais(s3c_ac97_dai, ARRAY_SIZE(s3c_ac97_dai));
|
||||
if (ret)
|
||||
goto err5;
|
||||
|
||||
return 0;
|
||||
|
||||
err5:
|
||||
free_irq(irq_res->start, NULL);
|
||||
err4:
|
||||
err3:
|
||||
clk_disable(s3c_ac97.ac97_clk);
|
||||
clk_put(s3c_ac97.ac97_clk);
|
||||
err2:
|
||||
iounmap(s3c_ac97.regs);
|
||||
err1:
|
||||
release_mem_region(mem_res->start, resource_size(mem_res));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static __devexit int s3c_ac97_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *mem_res, *irq_res;
|
||||
|
||||
snd_soc_unregister_dais(s3c_ac97_dai, ARRAY_SIZE(s3c_ac97_dai));
|
||||
|
||||
irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
||||
if (irq_res)
|
||||
free_irq(irq_res->start, NULL);
|
||||
|
||||
clk_disable(s3c_ac97.ac97_clk);
|
||||
clk_put(s3c_ac97.ac97_clk);
|
||||
|
||||
iounmap(s3c_ac97.regs);
|
||||
|
||||
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (mem_res)
|
||||
release_mem_region(mem_res->start, resource_size(mem_res));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver s3c_ac97_driver = {
|
||||
.probe = s3c_ac97_probe,
|
||||
.remove = s3c_ac97_remove,
|
||||
.driver = {
|
||||
.name = "s3c-ac97",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init s3c_ac97_init(void)
|
||||
{
|
||||
return platform_driver_register(&s3c_ac97_driver);
|
||||
}
|
||||
module_init(s3c_ac97_init);
|
||||
|
||||
static void __exit s3c_ac97_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&s3c_ac97_driver);
|
||||
}
|
||||
module_exit(s3c_ac97_exit);
|
||||
|
||||
MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>");
|
||||
MODULE_DESCRIPTION("AC97 driver for the Samsung SoC");
|
||||
MODULE_LICENSE("GPL");
|
||||
23
sound/soc/s3c24xx/s3c-ac97.h
Normal file
23
sound/soc/s3c24xx/s3c-ac97.h
Normal file
@ -0,0 +1,23 @@
|
||||
/* sound/soc/s3c24xx/s3c-ac97.h
|
||||
*
|
||||
* ALSA SoC Audio Layer - S3C AC97 Controller driver
|
||||
* Evolved from s3c2443-ac97.h
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co. Ltd
|
||||
* Author: Jaswinder Singh <jassi.brar@samsung.com>
|
||||
* Credits: Graeme Gregory, Sean Choi
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __S3C_AC97_H_
|
||||
#define __S3C_AC97_H_
|
||||
|
||||
#define S3C_AC97_DAI_PCM 0
|
||||
#define S3C_AC97_DAI_MIC 1
|
||||
|
||||
extern struct snd_soc_dai s3c_ac97_dai[];
|
||||
|
||||
#endif /* __S3C_AC97_H_ */
|
||||
Loading…
Reference in New Issue
Block a user