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media: s5p-mfc: Add VP9 decoder support
Add support for codec definition and corresponding buffer requirements for VP9 decoder. Signed-off-by: Smitha T Murthy <smitha.t@samsung.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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@ -17,6 +17,8 @@
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/* MFCv10 register definitions*/
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#define S5P_FIMV_MFC_CLOCK_OFF_V10 0x7120
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#define S5P_FIMV_MFC_STATE_V10 0x7124
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#define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570
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#define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574
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/* MFCv10 Context buffer sizes */
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#define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
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@ -33,8 +35,12 @@
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/* MFCv10 codec defines*/
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#define S5P_FIMV_CODEC_HEVC_DEC 17
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#define S5P_FIMV_CODEC_VP9_DEC 18
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#define S5P_FIMV_CODEC_HEVC_ENC 26
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/* Decoder buffer size for MFC v10 */
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#define DEC_VP9_STATIC_BUFFER_SIZE 20480
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/* Encoder buffer size for MFC v10.0 */
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#define ENC_V100_BASE_SIZE(x, y) \
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(((x + 3) * (y + 3) * 8) \
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@ -104,6 +104,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
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case S5P_MFC_CODEC_HEVC_DEC:
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codec_type = S5P_FIMV_CODEC_HEVC_DEC;
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break;
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case S5P_MFC_CODEC_VP9_DEC:
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codec_type = S5P_FIMV_CODEC_VP9_DEC;
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break;
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case S5P_MFC_CODEC_H264_ENC:
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codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
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break;
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@ -73,6 +73,7 @@
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#define S5P_MFC_CODEC_VC1RCV_DEC 6
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#define S5P_MFC_CODEC_VP8_DEC 7
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#define S5P_MFC_CODEC_HEVC_DEC 17
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#define S5P_MFC_CODEC_VP9_DEC 18
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#define S5P_MFC_CODEC_H264_ENC 20
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#define S5P_MFC_CODEC_H264_MVC_ENC 21
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@ -151,6 +151,13 @@ static struct s5p_mfc_fmt formats[] = {
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.num_planes = 1,
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.versions = MFC_V10_BIT,
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},
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{
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.fourcc = V4L2_PIX_FMT_VP9,
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.codec_mode = S5P_FIMV_CODEC_VP9_DEC,
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.type = MFC_FMT_DEC,
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.num_planes = 1,
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.versions = MFC_V10_BIT,
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},
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};
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#define NUM_FORMATS ARRAY_SIZE(formats)
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@ -170,6 +170,8 @@ struct s5p_mfc_regs {
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void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
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void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
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void __iomem *d_min_scratch_buffer_size; /* v10 */
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void __iomem *d_static_buffer_addr; /* v10 */
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void __iomem *d_static_buffer_size; /* v10 */
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/* encoder registers */
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void __iomem *e_frame_width;
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@ -226,6 +226,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
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ctx->scratch_buf_size +
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(ctx->mv_count * ctx->mv_size);
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break;
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case S5P_MFC_CODEC_VP9_DEC:
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mfc_debug(2, "Use min scratch buffer size\n");
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ctx->bank1.size =
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ctx->scratch_buf_size +
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DEC_VP9_STATIC_BUFFER_SIZE;
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break;
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case S5P_MFC_CODEC_H264_ENC:
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if (IS_MFCV10(dev)) {
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mfc_debug(2, "Use min scratch buffer size\n");
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@ -336,6 +342,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
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case S5P_MFC_CODEC_VC1_DEC:
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case S5P_MFC_CODEC_MPEG2_DEC:
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case S5P_MFC_CODEC_VP8_DEC:
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case S5P_MFC_CODEC_VP9_DEC:
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ctx->ctx.size = buf_size->other_dec_ctx;
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break;
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case S5P_MFC_CODEC_H264_ENC:
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@ -566,6 +573,13 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
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buf_size1 -= frame_size_mv;
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}
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}
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if (ctx->codec_mode == S5P_FIMV_CODEC_VP9_DEC) {
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writel(buf_addr1, mfc_regs->d_static_buffer_addr);
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writel(DEC_VP9_STATIC_BUFFER_SIZE,
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mfc_regs->d_static_buffer_size);
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buf_addr1 += DEC_VP9_STATIC_BUFFER_SIZE;
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buf_size1 -= DEC_VP9_STATIC_BUFFER_SIZE;
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}
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mfc_debug(2, "Buf1: %zx, buf_size1: %d (frames %d)\n",
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buf_addr1, buf_size1, ctx->total_dpb_count);
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@ -2272,6 +2286,18 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
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R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8);
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R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8);
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if (!IS_MFCV10(dev))
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goto done;
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/* Initialize registers used in MFC v10 only.
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* Also, over-write the registers which have
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* a different offset for MFC v10.
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*/
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/* decoder registers */
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R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
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R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
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done:
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return &mfc_regs;
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#undef S5P_MFC_REG_ADDR
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