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i.MX2 family: Add basic device support
This patch adds a few on-chip devices for i.MX21/i.MX27 procesors. Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
This commit is contained in:
Juergen Beisert
Robert Schwebel
parent
32dc80c9cb
commit
fc80a5e3d0
@ -4,4 +4,4 @@
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# Object file lists.
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obj-y := system.o generic.o
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obj-y := system.o generic.o devices.o
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231
arch/arm/mach-mx2/devices.c
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231
arch/arm/mach-mx2/devices.c
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/*
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* Author: MontaVista Software, Inc.
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* <source@mvista.com>
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*
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* Based on the OMAP devices.c
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*
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* 2005 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <asm/hardware.h>
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/*
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* Resource definition for the MXC IrDA
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*/
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static struct resource mxc_irda_resources[] = {
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[0] = {
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.start = UART3_BASE_ADDR,
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.end = UART3_BASE_ADDR + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = MXC_INT_UART3,
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.end = MXC_INT_UART3,
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.flags = IORESOURCE_IRQ,
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},
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};
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/* Platform Data for MXC IrDA */
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struct platform_device mxc_irda_device = {
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.name = "mxc_irda",
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.id = 0,
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.num_resources = ARRAY_SIZE(mxc_irda_resources),
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.resource = mxc_irda_resources,
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};
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/*
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* General Purpose Timer
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* - i.MX1: 2 timer (slighly different register handling)
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* - i.MX21: 3 timer
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* - i.MX27: 6 timer
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*/
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/* We use gpt0 as system timer, so do not add a device for this one */
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static struct resource timer1_resources[] = {
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[0] = {
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.start = GPT2_BASE_ADDR,
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.end = GPT2_BASE_ADDR + 0x17,
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.flags = IORESOURCE_MEM
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},
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[1] = {
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.start = MXC_INT_GPT2,
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.end = MXC_INT_GPT2,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device mxc_gpt1 = {
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.name = "imx_gpt",
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.id = 1,
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.num_resources = ARRAY_SIZE(timer1_resources),
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.resource = timer1_resources
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};
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static struct resource timer2_resources[] = {
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[0] = {
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.start = GPT3_BASE_ADDR,
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.end = GPT3_BASE_ADDR + 0x17,
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.flags = IORESOURCE_MEM
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},
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[1] = {
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.start = MXC_INT_GPT3,
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.end = MXC_INT_GPT3,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device mxc_gpt2 = {
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.name = "imx_gpt",
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.id = 2,
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.num_resources = ARRAY_SIZE(timer2_resources),
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.resource = timer2_resources
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};
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#ifdef CONFIG_MACH_MX27
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static struct resource timer3_resources[] = {
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[0] = {
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.start = GPT4_BASE_ADDR,
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.end = GPT4_BASE_ADDR + 0x17,
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.flags = IORESOURCE_MEM
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},
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[1] = {
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.start = MXC_INT_GPT4,
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.end = MXC_INT_GPT4,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device mxc_gpt3 = {
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.name = "imx_gpt",
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.id = 3,
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.num_resources = ARRAY_SIZE(timer3_resources),
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.resource = timer3_resources
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};
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static struct resource timer4_resources[] = {
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[0] = {
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.start = GPT5_BASE_ADDR,
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.end = GPT5_BASE_ADDR + 0x17,
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.flags = IORESOURCE_MEM
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},
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[1] = {
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.start = MXC_INT_GPT5,
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.end = MXC_INT_GPT5,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device mxc_gpt4 = {
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.name = "imx_gpt",
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.id = 4,
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.num_resources = ARRAY_SIZE(timer4_resources),
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.resource = timer4_resources
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};
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static struct resource timer5_resources[] = {
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[0] = {
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.start = GPT6_BASE_ADDR,
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.end = GPT6_BASE_ADDR + 0x17,
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.flags = IORESOURCE_MEM
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},
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[1] = {
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.start = MXC_INT_GPT6,
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.end = MXC_INT_GPT6,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device mxc_gpt5 = {
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.name = "imx_gpt",
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.id = 5,
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.num_resources = ARRAY_SIZE(timer5_resources),
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.resource = timer5_resources
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};
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#endif
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/*
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* Watchdog:
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* - i.MX1
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* - i.MX21
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* - i.MX27
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*/
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static struct resource mxc_wdt_resources[] = {
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{
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.start = WDOG_BASE_ADDR,
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.end = WDOG_BASE_ADDR + 0x30,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device mxc_wdt = {
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.name = "mxc_wdt",
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.id = 0,
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.num_resources = ARRAY_SIZE(mxc_wdt_resources),
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.resource = mxc_wdt_resources,
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};
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/* GPIO port description */
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static struct mxc_gpio_port imx_gpio_ports[] = {
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[0] = {
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.chip.label = "gpio-0",
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.irq = MXC_INT_GPIO,
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.base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 0),
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.virtual_irq_start = MXC_MAX_INT_LINES,
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},
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[1] = {
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.chip.label = "gpio-1",
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.base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 1),
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.virtual_irq_start = MXC_MAX_INT_LINES + 32,
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},
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[2] = {
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.chip.label = "gpio-2",
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.base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 2),
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.virtual_irq_start = MXC_MAX_INT_LINES + 64,
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},
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[3] = {
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.chip.label = "gpio-3",
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.base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 3),
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.virtual_irq_start = MXC_MAX_INT_LINES + 96,
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},
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[4] = {
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.chip.label = "gpio-4",
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.base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 4),
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.virtual_irq_start = MXC_MAX_INT_LINES + 128,
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},
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[5] = {
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.chip.label = "gpio-5",
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.base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 5),
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.virtual_irq_start = MXC_MAX_INT_LINES + 160,
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}
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};
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int __init mxc_register_gpios(void)
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{
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return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
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}
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