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spi: rockchip: read transfer info directly
Just read transfer info directly from the spi device and transfer structures rather than storing it in driver data first. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
ce386100d9
commit
fc1ad8ee33
@ -178,12 +178,8 @@ struct rockchip_spi {
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/* max bus freq supported */
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u32 max_freq;
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u16 mode;
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u8 tmode;
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u8 bpw;
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u8 n_bytes;
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u32 rsd_nsecs;
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unsigned len;
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u32 speed;
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const void *tx;
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@ -194,8 +190,6 @@ struct rockchip_spi {
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bool cs_asserted[ROCKCHIP_SPI_MAX_CS_NUM];
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bool use_dma;
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struct sg_table tx_sg;
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struct sg_table rx_sg;
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struct rockchip_spi_dma_data dma_rx;
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struct rockchip_spi_dma_data dma_tx;
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};
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@ -282,17 +276,6 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
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rs->cs_asserted[spi->chip_select] = cs_asserted;
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}
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static int rockchip_spi_prepare_message(struct spi_master *master,
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struct spi_message *msg)
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{
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struct rockchip_spi *rs = spi_master_get_devdata(master);
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struct spi_device *spi = msg->spi;
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rs->mode = spi->mode;
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return 0;
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}
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static void rockchip_spi_handle_err(struct spi_master *master,
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struct spi_message *msg)
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{
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@ -397,14 +380,15 @@ static void rockchip_spi_dma_txcb(void *data)
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spi_finalize_current_transfer(rs->master);
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}
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static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
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static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
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struct spi_transfer *xfer)
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{
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struct dma_async_tx_descriptor *rxdesc, *txdesc;
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atomic_set(&rs->state, 0);
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rxdesc = NULL;
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if (rs->rx) {
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if (xfer->rx_buf) {
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struct dma_slave_config rxconf = {
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.direction = DMA_DEV_TO_MEM,
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.src_addr = rs->dma_rx.addr,
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@ -416,7 +400,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
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rxdesc = dmaengine_prep_slave_sg(
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rs->dma_rx.ch,
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rs->rx_sg.sgl, rs->rx_sg.nents,
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xfer->rx_sg.sgl, xfer->rx_sg.nents,
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DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT);
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if (!rxdesc)
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return -EINVAL;
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@ -426,7 +410,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
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}
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txdesc = NULL;
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if (rs->tx) {
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if (xfer->tx_buf) {
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struct dma_slave_config txconf = {
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.direction = DMA_MEM_TO_DEV,
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.dst_addr = rs->dma_tx.addr,
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@ -438,7 +422,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
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txdesc = dmaengine_prep_slave_sg(
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rs->dma_tx.ch,
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rs->tx_sg.sgl, rs->tx_sg.nents,
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xfer->tx_sg.sgl, xfer->tx_sg.nents,
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DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT);
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if (!txdesc) {
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if (rxdesc)
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@ -469,7 +453,8 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
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return 1;
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}
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static void rockchip_spi_config(struct rockchip_spi *rs)
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static void rockchip_spi_config(struct rockchip_spi *rs,
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struct spi_device *spi, struct spi_transfer *xfer)
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{
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u32 div = 0;
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u32 dmacr = 0;
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@ -481,13 +466,19 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
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| CR0_EM_BIG << CR0_EM_OFFSET;
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cr0 |= (rs->n_bytes << CR0_DFS_OFFSET);
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cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET);
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cr0 |= (rs->tmode << CR0_XFM_OFFSET);
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cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET;
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if (xfer->rx_buf && xfer->tx_buf)
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cr0 |= CR0_XFM_TR << CR0_XFM_OFFSET;
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else if (xfer->rx_buf)
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cr0 |= CR0_XFM_RO << CR0_XFM_OFFSET;
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else
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cr0 |= CR0_XFM_TO << CR0_XFM_OFFSET;
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if (rs->use_dma) {
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if (rs->tx)
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if (xfer->tx_buf)
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dmacr |= TF_DMA_EN;
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if (rs->rx)
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if (xfer->rx_buf)
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dmacr |= RF_DMA_EN;
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}
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@ -521,11 +512,11 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
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writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0);
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if (rs->n_bytes == 1)
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writel_relaxed(rs->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
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writel_relaxed(xfer->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
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else if (rs->n_bytes == 2)
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writel_relaxed((rs->len / 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
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writel_relaxed((xfer->len / 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
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else
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writel_relaxed((rs->len * 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
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writel_relaxed((xfer->len * 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
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writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_TXFTLR);
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writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR);
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@ -565,24 +556,12 @@ static int rockchip_spi_transfer_one(
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}
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rs->speed = xfer->speed_hz;
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rs->bpw = xfer->bits_per_word;
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rs->n_bytes = rs->bpw >> 3;
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rs->n_bytes = xfer->bits_per_word >> 3;
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rs->tx = xfer->tx_buf;
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rs->tx_end = rs->tx + xfer->len;
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rs->rx = xfer->rx_buf;
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rs->rx_end = rs->rx + xfer->len;
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rs->len = xfer->len;
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rs->tx_sg = xfer->tx_sg;
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rs->rx_sg = xfer->rx_sg;
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if (rs->tx && rs->rx)
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rs->tmode = CR0_XFM_TR;
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else if (rs->tx)
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rs->tmode = CR0_XFM_TO;
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else if (rs->rx)
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rs->tmode = CR0_XFM_RO;
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/* we need prepare dma before spi was enabled */
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if (master->can_dma && master->can_dma(master, spi, xfer))
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@ -590,10 +569,10 @@ static int rockchip_spi_transfer_one(
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else
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rs->use_dma = false;
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rockchip_spi_config(rs);
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rockchip_spi_config(rs, spi, xfer);
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if (rs->use_dma)
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return rockchip_spi_prepare_dma(rs);
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return rockchip_spi_prepare_dma(rs, xfer);
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return rockchip_spi_pio_transfer(rs);
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}
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@ -685,7 +664,6 @@ static int rockchip_spi_probe(struct platform_device *pdev)
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master->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8);
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master->set_cs = rockchip_spi_set_cs;
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master->prepare_message = rockchip_spi_prepare_message;
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master->transfer_one = rockchip_spi_transfer_one;
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master->max_transfer_size = rockchip_spi_max_transfer_size;
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master->handle_err = rockchip_spi_handle_err;
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