ASoC: topology: Modify clock gating parameter parsing to switch

This improves the coding style of this piece of code.

Signed-off-by: Kirill Marinushkin <k.marinushkin@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Cc: Jaroslav Kysela <perex@perex.cz>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Pan Xiuli <xiuli.pan@linux.intel.com>
Cc: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Cc: linux-kernel@vger.kernel.org
Cc: alsa-devel@alsa-project.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Kirill Marinushkin 2018-04-16 19:56:44 +02:00 committed by Mark Brown
parent d59fb28562
commit fbeabd0923
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@ -2007,11 +2007,19 @@ static void set_link_hw_format(struct snd_soc_dai_link *link,
link->dai_fmt = hw_config->fmt & SND_SOC_DAIFMT_FORMAT_MASK;
/* clock gating */
if (hw_config->clock_gated == SND_SOC_TPLG_DAI_CLK_GATE_GATED)
switch (hw_config->clock_gated) {
case SND_SOC_TPLG_DAI_CLK_GATE_GATED:
link->dai_fmt |= SND_SOC_DAIFMT_GATED;
else if (hw_config->clock_gated ==
SND_SOC_TPLG_DAI_CLK_GATE_CONT)
break;
case SND_SOC_TPLG_DAI_CLK_GATE_CONT:
link->dai_fmt |= SND_SOC_DAIFMT_CONT;
break;
default:
/* ignore the value */
break;
}
/* clock signal polarity */
invert_bclk = hw_config->invert_bclk;