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dt-bindings: Fix incorrect 'reg' property sizes
The examples template is a 'simple-bus' with a size of 1 cell for had between 2 and 4 cells which really only errors on I2C or SPI type devices with a single cell. The easiest fix in most cases is to change the 'reg' property to for 1 cell address and size. In some cases with child devices having 2 cells, that doesn't make sense so a bus node is needed. Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Rob Herring <robh@kernel.org>
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@ -295,7 +295,7 @@ examples:
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- |
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cti@20110000 {
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compatible = "arm,coresight-cti", "arm,primecell";
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reg = <0 0x20110000 0 0x1000>;
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reg = <0x20110000 0x1000>;
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clocks = <&soc_smc50mhz>;
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clock-names = "apb_pclk";
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@ -33,5 +33,5 @@ examples:
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- |
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prr: chipid@ff000044 {
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compatible = "renesas,prr";
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reg = <0 0xff000044 0 4>;
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reg = <0xff000044 4>;
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};
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@ -323,7 +323,7 @@ examples:
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tegra_pmc: pmc@7000e400 {
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compatible = "nvidia,tegra210-pmc";
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reg = <0x0 0x7000e400 0x0 0x400>;
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reg = <0x7000e400 0x400>;
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clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
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clock-names = "pclk", "clk32k_in";
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#clock-cells = <1>;
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@ -65,7 +65,7 @@ examples:
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- |
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uart0: serial@58018000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x0 0x58018000 0x0 0x2000>;
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reg = <0x58018000 0x2000>;
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clocks = <&clk 45>, <&clk 46>;
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clock-names = "baudclk", "apb_pclk";
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interrupts = <0 9 4>;
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@ -50,7 +50,7 @@ examples:
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- |
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dpclk: clock-display@f1f0000 {
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compatible = "fsl,ls1028a-plldig";
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reg = <0x0 0xf1f0000 0x0 0xffff>;
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reg = <0xf1f0000 0xffff>;
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#clock-cells = <0>;
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clocks = <&osc_27m>;
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};
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@ -65,7 +65,7 @@ examples:
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@100000 {
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compatible = "qcom,gcc-sc7180";
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reg = <0 0x00100000 0 0x1f0000>;
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reg = <0x00100000 0x1f0000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&rpmhcc RPMH_CXO_CLK_A>,
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<&sleep_clk>;
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@ -63,7 +63,7 @@ examples:
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@100000 {
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compatible = "qcom,gcc-sm8150";
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reg = <0 0x00100000 0 0x1f0000>;
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reg = <0x00100000 0x1f0000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&sleep_clk>;
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clock-names = "bi_tcxo", "sleep_clk";
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@ -61,7 +61,7 @@ examples:
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@100000 {
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compatible = "qcom,gcc-sm8250";
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reg = <0 0x00100000 0 0x1f0000>;
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reg = <0x00100000 0x1f0000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&sleep_clk>;
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clock-names = "bi_tcxo", "sleep_clk";
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@ -66,7 +66,7 @@ examples:
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@af00000 {
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compatible = "qcom,sc7180-dispcc";
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reg = <0 0x0af00000 0 0x200000>;
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reg = <0x0af00000 0x200000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&gcc GCC_DISP_GPLL0_CLK_SRC>,
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<&dsi_phy 0>,
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@ -60,7 +60,7 @@ examples:
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@5090000 {
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compatible = "qcom,sc7180-gpucc";
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reg = <0 0x05090000 0 0x9000>;
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reg = <0x05090000 0x9000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&gcc GCC_GPU_GPLL0_CLK_SRC>,
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<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
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@ -50,7 +50,7 @@ examples:
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#include <dt-bindings/clock/qcom,gcc-sc7180.h>
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clock-controller@41a8000 {
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compatible = "qcom,sc7180-mss";
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reg = <0 0x041a8000 0 0x8000>;
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reg = <0x041a8000 0x8000>;
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clocks = <&gcc GCC_MSS_MFAB_AXIS_CLK>,
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<&gcc GCC_MSS_NAV_AXI_CLK>,
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<&gcc GCC_MSS_CFG_AHB_CLK>;
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@ -55,7 +55,7 @@ examples:
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@ab00000 {
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compatible = "qcom,sc7180-videocc";
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reg = <0 0x0ab00000 0 0x10000>;
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reg = <0x0ab00000 0x10000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "bi_tcxo";
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#clock-cells = <1>;
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@ -75,7 +75,7 @@ examples:
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@af00000 {
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compatible = "qcom,sdm845-dispcc";
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reg = <0 0x0af00000 0 0x10000>;
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reg = <0x0af00000 0x10000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&gcc GCC_DISP_GPLL0_CLK_SRC>,
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<&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
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@ -60,7 +60,7 @@ examples:
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@5090000 {
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compatible = "qcom,sdm845-gpucc";
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reg = <0 0x05090000 0 0x9000>;
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reg = <0x05090000 0x9000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&gcc GCC_GPU_GPLL0_CLK_SRC>,
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<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
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@ -55,7 +55,7 @@ examples:
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@ab00000 {
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compatible = "qcom,sdm845-videocc";
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reg = <0 0x0ab00000 0 0x10000>;
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reg = <0x0ab00000 0x10000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "bi_tcxo";
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#clock-cells = <1>;
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@ -76,29 +76,24 @@ examples:
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- |
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ap_clk: clock-controller@21500000 {
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compatible = "sprd,sc9863a-ap-clk";
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reg = <0 0x21500000 0 0x1000>;
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reg = <0x21500000 0x1000>;
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clocks = <&ext_26m>, <&ext_32k>;
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clock-names = "ext-26m", "ext-32k";
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#clock-cells = <1>;
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};
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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syscon@20e00000 {
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compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd";
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reg = <0x20e00000 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x20e00000 0x4000>;
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ap_ahb_regs: syscon@20e00000 {
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compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd";
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reg = <0 0x20e00000 0 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0x20e00000 0x4000>;
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apahb_gate: apahb-gate@0 {
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compatible = "sprd,sc9863a-apahb-gate";
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reg = <0x0 0x1020>;
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#clock-cells = <1>;
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};
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apahb_gate: apahb-gate@0 {
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compatible = "sprd,sc9863a-apahb-gate";
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reg = <0x0 0x1020>;
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#clock-cells = <1>;
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};
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};
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@ -45,7 +45,7 @@ examples:
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crypto: crypto-engine@c883e000 {
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compatible = "amlogic,gxl-crypto";
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reg = <0x0 0xc883e000 0x0 0x36>;
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reg = <0xc883e000 0x36>;
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interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc CLKID_BLKMV>;
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clock-names = "blkmv";
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@ -60,7 +60,7 @@ examples:
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cmm0: cmm@fea40000 {
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compatible = "renesas,r8a7796-cmm",
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"renesas,rcar-gen3-cmm";
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reg = <0 0xfea40000 0 0x1000>;
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reg = <0xfea40000 0x1000>;
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power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
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clocks = <&cpg CPG_MOD 711>;
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resets = <&cpg 711>;
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@ -122,13 +122,13 @@ examples:
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dss: dss@4a00000 {
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compatible = "ti,am65x-dss";
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reg = <0x0 0x04a00000 0x0 0x1000>, /* common */
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<0x0 0x04a02000 0x0 0x1000>, /* vidl1 */
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<0x0 0x04a06000 0x0 0x1000>, /* vid */
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<0x0 0x04a07000 0x0 0x1000>, /* ovr1 */
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<0x0 0x04a08000 0x0 0x1000>, /* ovr2 */
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<0x0 0x04a0a000 0x0 0x1000>, /* vp1 */
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<0x0 0x04a0b000 0x0 0x1000>; /* vp2 */
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reg = <0x04a00000 0x1000>, /* common */
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<0x04a02000 0x1000>, /* vidl1 */
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<0x04a06000 0x1000>, /* vid */
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<0x04a07000 0x1000>, /* ovr1 */
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<0x04a08000 0x1000>, /* ovr2 */
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<0x04a0a000 0x1000>, /* vp1 */
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<0x04a0b000 0x1000>; /* vp2 */
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reg-names = "common", "vidl1", "vid",
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"ovr1", "ovr2", "vp1", "vp2";
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ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
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@ -156,23 +156,23 @@ examples:
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dss: dss@4a00000 {
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compatible = "ti,j721e-dss";
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reg = <0x00 0x04a00000 0x00 0x10000>, /* common_m */
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<0x00 0x04a10000 0x00 0x10000>, /* common_s0*/
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<0x00 0x04b00000 0x00 0x10000>, /* common_s1*/
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<0x00 0x04b10000 0x00 0x10000>, /* common_s2*/
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<0x00 0x04a20000 0x00 0x10000>, /* vidl1 */
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<0x00 0x04a30000 0x00 0x10000>, /* vidl2 */
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<0x00 0x04a50000 0x00 0x10000>, /* vid1 */
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<0x00 0x04a60000 0x00 0x10000>, /* vid2 */
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<0x00 0x04a70000 0x00 0x10000>, /* ovr1 */
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<0x00 0x04a90000 0x00 0x10000>, /* ovr2 */
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<0x00 0x04ab0000 0x00 0x10000>, /* ovr3 */
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<0x00 0x04ad0000 0x00 0x10000>, /* ovr4 */
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<0x00 0x04a80000 0x00 0x10000>, /* vp1 */
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<0x00 0x04aa0000 0x00 0x10000>, /* vp2 */
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<0x00 0x04ac0000 0x00 0x10000>, /* vp3 */
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<0x00 0x04ae0000 0x00 0x10000>, /* vp4 */
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<0x00 0x04af0000 0x00 0x10000>; /* wb */
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reg = <0x04a00000 0x10000>, /* common_m */
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<0x04a10000 0x10000>, /* common_s0*/
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<0x04b00000 0x10000>, /* common_s1*/
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<0x04b10000 0x10000>, /* common_s2*/
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<0x04a20000 0x10000>, /* vidl1 */
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<0x04a30000 0x10000>, /* vidl2 */
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<0x04a50000 0x10000>, /* vid1 */
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<0x04a60000 0x10000>, /* vid2 */
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<0x04a70000 0x10000>, /* ovr1 */
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<0x04a90000 0x10000>, /* ovr2 */
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<0x04ab0000 0x10000>, /* ovr3 */
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<0x04ad0000 0x10000>, /* ovr4 */
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<0x04a80000 0x10000>, /* vp1 */
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<0x04aa0000 0x10000>, /* vp2 */
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<0x04ac0000 0x10000>, /* vp3 */
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<0x04ae0000 0x10000>, /* vp4 */
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<0x04af0000 0x10000>; /* wb */
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reg-names = "common_m", "common_s0",
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"common_s1", "common_s2",
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"vidl1", "vidl2","vid1","vid2",
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@ -49,7 +49,7 @@ examples:
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- |
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dma@3000000 {
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compatible = "sifive,fu540-c000-pdma";
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reg = <0x0 0x3000000 0x0 0x8000>;
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reg = <0x3000000 0x8000>;
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interrupts = <23 24 25 26 27 28 29 30>;
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#dma-cells = <1>;
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};
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@ -57,7 +57,7 @@ examples:
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compatible = "sifive,fu540-c000-gpio", "sifive,gpio0";
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interrupt-parent = <&plic>;
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interrupts = <7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22>;
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reg = <0x0 0x10060000 0x0 0x1000>;
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reg = <0x10060000 0x1000>;
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clocks = <&tlclk PRCI_CLK_TLCLK>;
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gpio-controller;
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#gpio-cells = <2>;
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@ -65,21 +65,21 @@ examples:
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config_noc: interconnect@1500000 {
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compatible = "qcom,sc7180-config-noc";
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reg = <0 0x01500000 0 0x28000>;
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reg = <0x01500000 0x28000>;
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#interconnect-cells = <1>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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system_noc: interconnect@1620000 {
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compatible = "qcom,sc7180-system-noc";
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reg = <0 0x01620000 0 0x17080>;
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reg = <0x01620000 0x17080>;
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#interconnect-cells = <1>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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mmss_noc: interconnect@1740000 {
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compatible = "qcom,sc7180-mmss-noc";
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reg = <0 0x01740000 0 0x1c100>;
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reg = <0x01740000 0x1c100>;
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#interconnect-cells = <1>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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mem_noc: interconnect@1380000 {
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compatible = "qcom,sdm845-mem-noc";
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reg = <0 0x01380000 0 0x27200>;
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reg = <0x01380000 0x27200>;
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#interconnect-cells = <1>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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mmss_noc: interconnect@1740000 {
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compatible = "qcom,sdm845-mmss-noc";
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reg = <0 0x01740000 0 0x1c1000>;
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reg = <0x01740000 0x1c1000>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "apps", "disp";
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qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
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@ -79,7 +79,7 @@ examples:
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compatible = "renesas,irqc-r8a7790", "renesas,irqc";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0 0xe61c0000 0 0x200>;
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reg = <0xe61c0000 0x200>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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- |
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cec_AO: cec@100 {
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compatible = "amlogic,meson-gx-ao-cec";
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reg = <0x0 0x00100 0x0 0x14>;
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reg = <0x00100 0x14>;
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interrupts = <199>;
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clocks = <&clkc_cec>;
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clock-names = "core";
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venus: video-codec@aa00000 {
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compatible = "qcom,sc7180-venus";
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reg = <0 0x0aa00000 0 0xff000>;
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reg = <0x0aa00000 0xff000>;
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interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&videocc VENUS_GDSC>,
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<&videocc VCODEC0_GDSC>;
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video-codec@aa00000 {
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compatible = "qcom,sdm845-venus-v2";
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reg = <0 0x0aa00000 0 0xff000>;
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reg = <0x0aa00000 0xff000>;
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interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
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<&videocc VIDEO_CC_VENUS_AHB_CLK>,
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video-codec@aa00000 {
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compatible = "qcom,sdm845-venus";
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reg = <0 0x0aa00000 0 0xff000>;
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reg = <0x0aa00000 0xff000>;
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interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
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<&videocc VIDEO_CC_VENUS_AHB_CLK>,
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@ -135,7 +135,7 @@ examples:
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|
||||
csi20: csi2@fea80000 {
|
||||
compatible = "renesas,r8a7796-csi2";
|
||||
reg = <0 0xfea80000 0 0x10000>;
|
||||
reg = <0xfea80000 0x10000>;
|
||||
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 714>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
|
@ -306,7 +306,7 @@ examples:
|
||||
vin1: vin@e6ef1000 {
|
||||
compatible = "renesas,vin-r8a7790",
|
||||
"renesas,rcar-gen2-vin";
|
||||
reg = <0 0xe6ef1000 0 0x1000>;
|
||||
reg = <0xe6ef1000 0x1000>;
|
||||
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 810>;
|
||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||
@ -328,7 +328,7 @@ examples:
|
||||
|
||||
vin0: video@e6ef0000 {
|
||||
compatible = "renesas,vin-r8a7795";
|
||||
reg = <0 0xe6ef0000 0 0x1000>;
|
||||
reg = <0xe6ef0000 0x1000>;
|
||||
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 811>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
@ -365,7 +365,7 @@ examples:
|
||||
|
||||
vin2: video@e6ef2000 {
|
||||
compatible = "renesas,vin-r8a77970";
|
||||
reg = <0 0xe6ef2000 0 0x1000>;
|
||||
reg = <0xe6ef2000 0x1000>;
|
||||
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 809>;
|
||||
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
|
||||
|
@ -337,7 +337,7 @@ examples:
|
||||
|
||||
mc: memory-controller@70019000 {
|
||||
compatible = "nvidia,tegra124-mc";
|
||||
reg = <0x0 0x70019000 0x0 0x1000>;
|
||||
reg = <0x70019000 0x1000>;
|
||||
clocks = <&tegra_car TEGRA124_CLK_MC>;
|
||||
clock-names = "mc";
|
||||
|
||||
@ -349,7 +349,7 @@ examples:
|
||||
|
||||
external-memory-controller@7001b000 {
|
||||
compatible = "nvidia,tegra124-emc";
|
||||
reg = <0x0 0x7001b000 0x0 0x1000>;
|
||||
reg = <0x7001b000 0x1000>;
|
||||
clocks = <&car TEGRA124_CLK_EMC>;
|
||||
clock-names = "emc";
|
||||
|
||||
|
@ -111,7 +111,7 @@ examples:
|
||||
- |
|
||||
memory-controller@70019000 {
|
||||
compatible = "nvidia,tegra124-mc";
|
||||
reg = <0x0 0x70019000 0x0 0x1000>;
|
||||
reg = <0x70019000 0x1000>;
|
||||
clocks = <&tegra_car 32>;
|
||||
clock-names = "mc";
|
||||
|
||||
|
@ -47,7 +47,7 @@ examples:
|
||||
- |
|
||||
mmc0: mmc@e0330000 {
|
||||
compatible = "actions,owl-mmc";
|
||||
reg = <0x0 0xe0330000 0x0 0x4000>;
|
||||
reg = <0xe0330000 0x4000>;
|
||||
interrupts = <0 42 4>;
|
||||
clocks = <&cmu 56>;
|
||||
resets = <&cmu 23>;
|
||||
|
@ -109,7 +109,7 @@ examples:
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
sdmmc: mmc@ff0c0000 {
|
||||
compatible = "rockchip,rk3288-dw-mshc";
|
||||
reg = <0x0 0xff0c0000 0x0 0x4000>;
|
||||
reg = <0xff0c0000 0x4000>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
|
||||
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
|
||||
|
@ -162,9 +162,9 @@ examples:
|
||||
modem-init;
|
||||
modem-remoteproc = <&mss_pil>;
|
||||
|
||||
reg = <0 0x1e40000 0 0x7000>,
|
||||
<0 0x1e47000 0 0x2000>,
|
||||
<0 0x1e04000 0 0x2c000>;
|
||||
reg = <0x1e40000 0x7000>,
|
||||
<0x1e47000 0x2000>,
|
||||
<0x1e04000 0x2c000>;
|
||||
reg-names = "ipa-reg",
|
||||
"ipa-shared",
|
||||
"gsi";
|
||||
|
@ -92,7 +92,7 @@ examples:
|
||||
|
||||
ethernet@ee700000 {
|
||||
compatible = "renesas,ether-r8a7790", "renesas,rcar-gen2-ether";
|
||||
reg = <0 0xee700000 0 0x400>;
|
||||
reg = <0xee700000 0x400>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
|
||||
|
@ -164,37 +164,41 @@ examples:
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
#include <dt-bindings/net/ti-dp83867.h>
|
||||
|
||||
mcu_cpsw: ethernet@46000000 {
|
||||
compatible = "ti,am654-cpsw-nuss";
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
reg = <0x0 0x46000000 0x0 0x200000>;
|
||||
reg-names = "cpsw_nuss";
|
||||
ranges = <0x0 0x0 0x46000000 0x0 0x200000>;
|
||||
dma-coherent;
|
||||
clocks = <&k3_clks 5 10>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
|
||||
|
||||
dmas = <&mcu_udmap 0xf000>,
|
||||
<&mcu_udmap 0xf001>,
|
||||
<&mcu_udmap 0xf002>,
|
||||
<&mcu_udmap 0xf003>,
|
||||
<&mcu_udmap 0xf004>,
|
||||
<&mcu_udmap 0xf005>,
|
||||
<&mcu_udmap 0xf006>,
|
||||
<&mcu_udmap 0xf007>,
|
||||
<&mcu_udmap 0x7000>;
|
||||
dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
|
||||
"rx";
|
||||
mcu_cpsw: ethernet@46000000 {
|
||||
compatible = "ti,am654-cpsw-nuss";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
reg = <0x0 0x46000000 0x0 0x200000>;
|
||||
reg-names = "cpsw_nuss";
|
||||
ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
|
||||
dma-coherent;
|
||||
clocks = <&k3_clks 5 10>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
|
||||
|
||||
ethernet-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&mcu_udmap 0xf000>,
|
||||
<&mcu_udmap 0xf001>,
|
||||
<&mcu_udmap 0xf002>,
|
||||
<&mcu_udmap 0xf003>,
|
||||
<&mcu_udmap 0xf004>,
|
||||
<&mcu_udmap 0xf005>,
|
||||
<&mcu_udmap 0xf006>,
|
||||
<&mcu_udmap 0xf007>,
|
||||
<&mcu_udmap 0x7000>;
|
||||
dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
|
||||
"rx";
|
||||
|
||||
cpsw_port1: port@1 {
|
||||
ethernet-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpsw_port1: port@1 {
|
||||
reg = <1>;
|
||||
ti,mac-only;
|
||||
label = "port1";
|
||||
@ -203,22 +207,23 @@ examples:
|
||||
|
||||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&phy0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
davinci_mdio: mdio@f00 {
|
||||
compatible = "ti,cpsw-mdio","ti,davinci_mdio";
|
||||
reg = <0x0 0xf00 0x0 0x100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&k3_clks 5 10>;
|
||||
clock-names = "fck";
|
||||
bus_freq = <1000000>;
|
||||
davinci_mdio: mdio@f00 {
|
||||
compatible = "ti,cpsw-mdio","ti,davinci_mdio";
|
||||
reg = <0x0 0xf00 0x0 0x100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&k3_clks 5 10>;
|
||||
clock-names = "fck";
|
||||
bus_freq = <1000000>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -30,6 +30,6 @@ examples:
|
||||
- |
|
||||
mpphy: phy@0 {
|
||||
compatible = "amlogic,axg-mipi-pcie-analog-phy";
|
||||
reg = <0x0 0x0 0x0 0xc>;
|
||||
reg = <0x0 0xc>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
@ -44,7 +44,7 @@ examples:
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
pcie_phy: pcie-phy@ff644000 {
|
||||
compatible = "amlogic,axg-pcie-phy";
|
||||
reg = <0x0 0xff644000 0x0 0x1c>;
|
||||
reg = <0xff644000 0x1c>;
|
||||
resets = <&reset RESET_PCIE_PHY>;
|
||||
phys = <&mipi_analog_phy PHY_TYPE_PCIE>;
|
||||
phy-names = "analog";
|
||||
|
@ -117,24 +117,30 @@ additionalProperties: false
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
torrent_phy: torrent-phy@f0fb500000 {
|
||||
compatible = "cdns,torrent-phy";
|
||||
reg = <0xf0 0xfb500000 0x0 0x00100000>,
|
||||
<0xf0 0xfb030a00 0x0 0x00000040>;
|
||||
reg-names = "torrent_phy", "dptx_phy";
|
||||
resets = <&phyrst 0>;
|
||||
clocks = <&ref_clk>;
|
||||
clock-names = "refclk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
torrent_phy_dp: phy@0 {
|
||||
reg = <0>;
|
||||
resets = <&phyrst 1>, <&phyrst 2>,
|
||||
<&phyrst 3>, <&phyrst 4>;
|
||||
#phy-cells = <0>;
|
||||
cdns,phy-type = <PHY_TYPE_DP>;
|
||||
cdns,num-lanes = <4>;
|
||||
cdns,max-bit-rate = <8100>;
|
||||
};
|
||||
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
torrent-phy@f0fb500000 {
|
||||
compatible = "cdns,torrent-phy";
|
||||
reg = <0xf0 0xfb500000 0x0 0x00100000>,
|
||||
<0xf0 0xfb030a00 0x0 0x00000040>;
|
||||
reg-names = "torrent_phy", "dptx_phy";
|
||||
resets = <&phyrst 0>;
|
||||
clocks = <&ref_clk>;
|
||||
clock-names = "refclk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
phy@0 {
|
||||
reg = <0>;
|
||||
resets = <&phyrst 1>, <&phyrst 2>,
|
||||
<&phyrst 3>, <&phyrst 4>;
|
||||
#phy-cells = <0>;
|
||||
cdns,phy-type = <PHY_TYPE_DP>;
|
||||
cdns,num-lanes = <4>;
|
||||
cdns,max-bit-rate = <8100>;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
@ -59,7 +59,7 @@ examples:
|
||||
- |
|
||||
dsi_dphy: phy@ff2e0000 {
|
||||
compatible = "rockchip,px30-dsi-dphy";
|
||||
reg = <0x0 0xff2e0000 0x0 0x10000>;
|
||||
reg = <0xff2e0000 0x10000>;
|
||||
clocks = <&pmucru 13>, <&cru 12>;
|
||||
clock-names = "ref", "pclk";
|
||||
resets = <&cru 12>;
|
||||
|
@ -121,7 +121,7 @@ examples:
|
||||
|
||||
lhc: lhc@20 {
|
||||
compatible = "aspeed,ast2500-lhc";
|
||||
reg = <0x20 0x24 0x48 0x8>;
|
||||
reg = <0x20 0x24>, <0x48 0x8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -68,7 +68,7 @@ examples:
|
||||
|
||||
pwm0: pwm@e6e30000 {
|
||||
compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e30000 0 0x8>;
|
||||
reg = <0xe6e30000 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
|
@ -55,7 +55,7 @@ examples:
|
||||
compatible = "sifive,fu540-c000-uart", "sifive,uart0";
|
||||
interrupt-parent = <&plic0>;
|
||||
interrupts = <80>;
|
||||
reg = <0x0 0x10010000 0x0 0x1000>;
|
||||
reg = <0x10010000 0x1000>;
|
||||
clocks = <&prci PRCI_CLK_TLCLK>;
|
||||
};
|
||||
|
||||
|
@ -86,7 +86,7 @@ examples:
|
||||
aiu: audio-controller@5400 {
|
||||
compatible = "amlogic,aiu-gxl", "amlogic,aiu";
|
||||
#sound-dai-cells = <2>;
|
||||
reg = <0x0 0x5400 0x0 0x2ac>;
|
||||
reg = <0x5400 0x2ac>;
|
||||
interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "i2s", "spdif";
|
||||
@ -110,4 +110,3 @@ examples:
|
||||
"spdif_mclk_sel";
|
||||
resets = <&reset RESET_AIU>;
|
||||
};
|
||||
|
||||
|
@ -45,7 +45,7 @@ examples:
|
||||
|
||||
toacodec: audio-controller@740 {
|
||||
compatible = "amlogic,g12a-toacodec";
|
||||
reg = <0x0 0x740 0x0 0x4>;
|
||||
reg = <0x740 0x4>;
|
||||
#sound-dai-cells = <1>;
|
||||
resets = <&clkc_audio AUD_RESET_TOACODEC>;
|
||||
};
|
||||
|
@ -49,10 +49,9 @@ examples:
|
||||
|
||||
acodec: audio-controller@32000 {
|
||||
compatible = "amlogic,t9015";
|
||||
reg = <0x0 0x32000 0x0 0x14>;
|
||||
reg = <0x32000 0x14>;
|
||||
#sound-dai-cells = <0>;
|
||||
clocks = <&clkc CLKID_AUDIO_CODEC>;
|
||||
clock-names = "pclk";
|
||||
resets = <&reset RESET_AUDIO_CODEC>;
|
||||
};
|
||||
|
||||
|
@ -145,7 +145,7 @@ examples:
|
||||
|
||||
msiof0: spi@e6e20000 {
|
||||
compatible = "renesas,msiof-r8a7791", "renesas,rcar-gen2-msiof";
|
||||
reg = <0 0xe6e20000 0 0x0064>;
|
||||
reg = <0xe6e20000 0x0064>;
|
||||
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
|
||||
dmas = <&dmac0 0x51>, <&dmac0 0x52>;
|
||||
|
@ -70,7 +70,7 @@ examples:
|
||||
- |
|
||||
spi: spi@10040000 {
|
||||
compatible = "sifive,fu540-c000-spi", "sifive,spi0";
|
||||
reg = <0x0 0x10040000 0x0 0x1000 0x0 0x20000000 0x0 0x10000000>;
|
||||
reg = <0x10040000 0x1000>, <0x20000000 0x10000000>;
|
||||
interrupt-parent = <&plic>;
|
||||
interrupts = <51>;
|
||||
clocks = <&tlclk>;
|
||||
|
@ -94,8 +94,8 @@ examples:
|
||||
|
||||
thermal@e61f0000 {
|
||||
compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal";
|
||||
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
|
||||
<0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
|
||||
reg = <0xe61f0000 0x14>, <0xe61f0100 0x38>,
|
||||
<0xe61f0200 0x38>, <0xe61f0300 0x38>;
|
||||
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp5_clks R8A73A4_CLK_THERMAL>;
|
||||
power-domains = <&pd_c5>;
|
||||
@ -111,7 +111,7 @@ examples:
|
||||
compatible = "renesas,thermal-r8a7790",
|
||||
"renesas,rcar-gen2-thermal",
|
||||
"renesas,rcar-thermal";
|
||||
reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
|
||||
reg = <0xe61f0000 0x10>, <0xe61f0100 0x38>;
|
||||
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 522>;
|
||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||
|
@ -83,7 +83,7 @@ examples:
|
||||
- |
|
||||
ap_thm0: thermal@32200000 {
|
||||
compatible = "sprd,ums512-thermal";
|
||||
reg = <0 0x32200000 0 0x10000>;
|
||||
reg = <0x32200000 0x10000>;
|
||||
clock-names = "enable";
|
||||
clocks = <&aonapb_gate 32>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
|
@ -111,7 +111,7 @@ examples:
|
||||
- |
|
||||
usb: usb@ffe09000 {
|
||||
compatible = "amlogic,meson-g12a-usb-ctrl";
|
||||
reg = <0x0 0xffe09000 0x0 0xa0>;
|
||||
reg = <0xffe09000 0xa0>;
|
||||
interrupts = <16>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -147,4 +147,3 @@ examples:
|
||||
snps,quirk-frame-length-adjustment;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -101,7 +101,7 @@ examples:
|
||||
compatible = "ibm,usb-ehci-440epx", "generic-ehci";
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x1a 4>;
|
||||
reg = <0 0xe0000300 90 0 0xe0000390 70>;
|
||||
reg = <0xe0000300 90>, <0xe0000390 70>;
|
||||
big-endian;
|
||||
};
|
||||
|
||||
|
@ -163,9 +163,9 @@ examples:
|
||||
|
||||
usb@700d0000 {
|
||||
compatible = "nvidia,tegra210-xudc";
|
||||
reg = <0x0 0x700d0000 0x0 0x8000>,
|
||||
<0x0 0x700d8000 0x0 0x1000>,
|
||||
<0x0 0x700d9000 0x0 0x1000>;
|
||||
reg = <0x700d0000 0x8000>,
|
||||
<0x700d8000 0x1000>,
|
||||
<0x700d9000 0x1000>;
|
||||
reg-names = "base", "fpci", "ipfs";
|
||||
|
||||
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
@ -72,7 +72,7 @@ examples:
|
||||
|
||||
usb3_peri0: usb@ee020000 {
|
||||
compatible = "renesas,r8a774c0-usb3-peri", "renesas,rcar-gen3-usb3-peri";
|
||||
reg = <0 0xee020000 0 0x400>;
|
||||
reg = <0xee020000 0x400>;
|
||||
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 328>;
|
||||
companion = <&xhci0>;
|
||||
|
@ -120,7 +120,7 @@ examples:
|
||||
|
||||
usbhs: usb@e6590000 {
|
||||
compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
|
||||
reg = <0 0xe6590000 0 0x100>;
|
||||
reg = <0xe6590000 0x100>;
|
||||
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 704>;
|
||||
};
|
||||
|
@ -57,30 +57,36 @@ examples:
|
||||
- |
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
cdns_usb@4104000 {
|
||||
compatible = "ti,j721e-usb";
|
||||
reg = <0x00 0x4104000 0x00 0x100>;
|
||||
power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 288 15>, <&k3_clks 288 3>;
|
||||
clock-names = "ref", "lpm";
|
||||
assigned-clocks = <&k3_clks 288 15>; /* USB2_REFCLK */
|
||||
assigned-clock-parents = <&k3_clks 288 16>; /* HFOSC0 */
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usb@6000000 {
|
||||
compatible = "cdns,usb3";
|
||||
reg = <0x00 0x6000000 0x00 0x10000>,
|
||||
<0x00 0x6010000 0x00 0x10000>,
|
||||
<0x00 0x6020000 0x00 0x10000>;
|
||||
reg-names = "otg", "xhci", "dev";
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
|
||||
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */
|
||||
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
|
||||
interrupt-names = "host",
|
||||
"peripheral",
|
||||
"otg";
|
||||
maximum-speed = "super-speed";
|
||||
dr_mode = "otg";
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
cdns_usb@4104000 {
|
||||
compatible = "ti,j721e-usb";
|
||||
reg = <0x00 0x4104000 0x00 0x100>;
|
||||
power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 288 15>, <&k3_clks 288 3>;
|
||||
clock-names = "ref", "lpm";
|
||||
assigned-clocks = <&k3_clks 288 15>; /* USB2_REFCLK */
|
||||
assigned-clock-parents = <&k3_clks 288 16>; /* HFOSC0 */
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usb@6000000 {
|
||||
compatible = "cdns,usb3";
|
||||
reg = <0x00 0x6000000 0x00 0x10000>,
|
||||
<0x00 0x6010000 0x00 0x10000>,
|
||||
<0x00 0x6020000 0x00 0x10000>;
|
||||
reg-names = "otg", "xhci", "dev";
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
|
||||
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */
|
||||
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
|
||||
interrupt-names = "host",
|
||||
"peripheral",
|
||||
"otg";
|
||||
maximum-speed = "super-speed";
|
||||
dr_mode = "otg";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -57,7 +57,7 @@ examples:
|
||||
|
||||
watchdog0: rti@2200000 {
|
||||
compatible = "ti,rti-wdt";
|
||||
reg = <0x0 0x2200000 0x0 0x100>;
|
||||
reg = <0x2200000 0x100>;
|
||||
clocks = <&k3_clks 252 1>;
|
||||
power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 252 1>;
|
||||
|
Loading…
Reference in New Issue
Block a user