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dt-bindings: drop Sagar Kadam from SiFive binding maintainership
Sagar's email listed in maintainers is bouncing as his division was sold off by the company. I attempted to contact him some days ago on what the bounce email told me was his new contact information, but am yet to receive a response. Paul and Palmer are listed on each of the bindings, both of whom were alive & well as of Wednesday so the bindings remain maintained. CC: Sagar Kadam <sagar.kadam@openfive.com> CC: Sagar Kadam <sagar.kadam@sifive.com> Link: https://lore.kernel.org/all/785425ca-4000-a7e4-16d6-4d68c91b158d@kernel.org/ Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Link: https://lore.kernel.org/r/20230217180035.39658-1-conor@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
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@ -8,7 +8,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI)
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maintainers:
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- Sagar Kadam <sagar.kadam@sifive.com>
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- Paul Walmsley <paul.walmsley@sifive.com>
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description:
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@ -45,7 +45,6 @@ description:
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from S-mode. So add thead,c900-plic to distinguish them.
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maintainers:
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- Sagar Kadam <sagar.kadam@sifive.com>
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- Paul Walmsley <paul.walmsley@sifive.com>
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- Palmer Dabbelt <palmer@dabbelt.com>
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@ -8,7 +8,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SiFive PWM controller
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maintainers:
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- Sagar Kadam <sagar.kadam@sifive.com>
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- Paul Walmsley <paul.walmsley@sifive.com>
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description:
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@ -8,8 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SiFive Composable Cache Controller
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maintainers:
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- Sagar Kadam <sagar.kadam@sifive.com>
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- Paul Walmsley <paul.walmsley@sifive.com>
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- Paul Walmsley <paul.walmsley@sifive.com>
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description:
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The SiFive Composable Cache Controller is used to provide access to fast copies
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