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scsi: ufs-mediatek: Fix imprecise waiting time for ref-clk control
Currently ref-clk control timeout is implemented by jiffies. However jiffies is not accurate enough thus "false timeout" may happen. Use more accurate delay mechanism instead, i.e. ktime. Link: https://lore.kernel.org/r/20200601104646.15436-2-stanley.chu@mediatek.com Reviewed-by: Andy Teng <andy.teng@mediatek.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -120,7 +120,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on)
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{
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struct ufs_mtk_host *host = ufshcd_get_variant(hba);
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struct arm_smccc_res res;
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unsigned long timeout;
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ktime_t timeout, time_checked;
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u32 value;
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if (host->ref_clk_enabled == on)
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@ -135,8 +135,9 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on)
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}
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/* Wait for ack */
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timeout = jiffies + msecs_to_jiffies(REFCLK_REQ_TIMEOUT_MS);
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timeout = ktime_add_us(ktime_get(), REFCLK_REQ_TIMEOUT_US);
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do {
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time_checked = ktime_get();
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value = ufshcd_readl(hba, REG_UFS_REFCLK_CTRL);
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/* Wait until ack bit equals to req bit */
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@ -144,7 +145,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on)
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goto out;
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usleep_range(100, 200);
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} while (time_before(jiffies, timeout));
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} while (ktime_before(time_checked, timeout));
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dev_err(hba->dev, "missing ack of refclk req, reg: 0x%x\n", value);
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@ -28,7 +28,7 @@
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#define REFCLK_REQUEST BIT(0)
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#define REFCLK_ACK BIT(1)
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#define REFCLK_REQ_TIMEOUT_MS 3
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#define REFCLK_REQ_TIMEOUT_US 3000
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/*
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* Vendor specific pre-defined parameters
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