scsi: ufs-mediatek: Fix imprecise waiting time for ref-clk control

Currently ref-clk control timeout is implemented by jiffies. However
jiffies is not accurate enough thus "false timeout" may happen.

Use more accurate delay mechanism instead, i.e. ktime.

Link: https://lore.kernel.org/r/20200601104646.15436-2-stanley.chu@mediatek.com
Reviewed-by: Andy Teng <andy.teng@mediatek.com>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Stanley Chu 2020-06-01 18:46:42 +08:00 committed by Martin K. Petersen
parent 55f4b1f736
commit fb43337cd4
2 changed files with 5 additions and 4 deletions

View File

@ -120,7 +120,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
struct arm_smccc_res res;
unsigned long timeout;
ktime_t timeout, time_checked;
u32 value;
if (host->ref_clk_enabled == on)
@ -135,8 +135,9 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on)
}
/* Wait for ack */
timeout = jiffies + msecs_to_jiffies(REFCLK_REQ_TIMEOUT_MS);
timeout = ktime_add_us(ktime_get(), REFCLK_REQ_TIMEOUT_US);
do {
time_checked = ktime_get();
value = ufshcd_readl(hba, REG_UFS_REFCLK_CTRL);
/* Wait until ack bit equals to req bit */
@ -144,7 +145,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on)
goto out;
usleep_range(100, 200);
} while (time_before(jiffies, timeout));
} while (ktime_before(time_checked, timeout));
dev_err(hba->dev, "missing ack of refclk req, reg: 0x%x\n", value);

View File

@ -28,7 +28,7 @@
#define REFCLK_REQUEST BIT(0)
#define REFCLK_ACK BIT(1)
#define REFCLK_REQ_TIMEOUT_MS 3
#define REFCLK_REQ_TIMEOUT_US 3000
/*
* Vendor specific pre-defined parameters