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staging: hikey9xx: spmi driver: convert to regmap
Instead of doing its own SPMI I/O implementation, use the already-existing regmap one. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/7084885f3007ca5daf0d5bc85d038e26ee82dc0d.1611949675.git.mchehab+huawei@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mauro Carvalho Chehab
Greg Kroah-Hartman
parent
1f92798cbe
commit
fb02e3ebfb
@ -29,6 +29,7 @@ config MFD_HI6421_SPMI
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depends on OF
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depends on SPMI
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select MFD_CORE
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select REGMAP_SPMI
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help
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Add support for HiSilicon Hi6421v600 SPMI PMIC. Hi6421 includes
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multi-functions, such as regulators, RTC, codec, Coulomb counter,
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@ -44,6 +45,7 @@ config REGULATOR_HI6421V600
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tristate "HiSilicon Hi6421v600 PMIC voltage regulator support"
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depends on MFD_HI6421_SPMI && OF
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depends on REGULATOR
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select REGMAP
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help
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This driver provides support for the voltage regulators on
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HiSilicon Hi6421v600 PMU / Codec IC.
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@ -41,81 +41,22 @@ static const struct mfd_cell hi6421v600_devs[] = {
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{ .name = "hi6421v600-regulator", },
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};
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/*
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* The PMIC register is only 8-bit.
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* Hisilicon SoC use hardware to map PMIC register into SoC mapping.
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* At here, we are accessing SoC register with 32-bit.
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*/
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int hi6421_spmi_pmic_read(struct hi6421_spmi_pmic *pmic, int reg)
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static irqreturn_t hi6421_spmi_irq_handler(int irq, void *priv)
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{
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struct spmi_device *pdev;
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u8 read_value = 0;
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u32 ret;
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pdev = to_spmi_device(pmic->dev);
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if (!pdev) {
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pr_err("%s: pdev get failed!\n", __func__);
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return -ENODEV;
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}
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ret = spmi_ext_register_readl(pdev, reg, &read_value, 1);
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if (ret) {
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pr_err("%s: spmi_ext_register_readl failed!\n", __func__);
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return ret;
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}
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return read_value;
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}
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EXPORT_SYMBOL(hi6421_spmi_pmic_read);
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int hi6421_spmi_pmic_write(struct hi6421_spmi_pmic *pmic, int reg, u32 val)
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{
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struct spmi_device *pdev;
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u32 ret;
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pdev = to_spmi_device(pmic->dev);
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if (!pdev) {
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pr_err("%s: pdev get failed!\n", __func__);
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return -ENODEV;
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}
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ret = spmi_ext_register_writel(pdev, reg, (unsigned char *)&val, 1);
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if (ret)
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pr_err("%s: spmi_ext_register_writel failed!\n", __func__);
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return ret;
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}
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EXPORT_SYMBOL(hi6421_spmi_pmic_write);
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int hi6421_spmi_pmic_rmw(struct hi6421_spmi_pmic *pmic, int reg,
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u32 mask, u32 bits)
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{
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unsigned long flags;
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u32 data;
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int ret;
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spin_lock_irqsave(&pmic->lock, flags);
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data = hi6421_spmi_pmic_read(pmic, reg) & ~mask;
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data |= mask & bits;
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ret = hi6421_spmi_pmic_write(pmic, reg, data);
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spin_unlock_irqrestore(&pmic->lock, flags);
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return ret;
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}
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EXPORT_SYMBOL(hi6421_spmi_pmic_rmw);
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static irqreturn_t hi6421_spmi_irq_handler(int irq, void *data)
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{
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struct hi6421_spmi_pmic *pmic = (struct hi6421_spmi_pmic *)data;
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struct hi6421_spmi_pmic *pmic = (struct hi6421_spmi_pmic *)priv;
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unsigned long pending;
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unsigned int data;
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int i, offset;
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for (i = 0; i < HISI_IRQ_ARRAY; i++) {
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pending = hi6421_spmi_pmic_read(pmic, (i + SOC_PMIC_IRQ0_ADDR));
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pending &= HISI_MASK_FIELD;
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if (pending != 0)
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pr_debug("pending[%d]=0x%lx\n\r", i, pending);
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regmap_read(pmic->map, offset, &data);
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data &= HISI_MASK_FIELD;
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if (data != 0)
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pr_debug("data[%d]=0x%d\n\r", i, data);
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regmap_write(pmic->map, i + SOC_PMIC_IRQ0_ADDR, data);
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hi6421_spmi_pmic_write(pmic, (i + SOC_PMIC_IRQ0_ADDR), pending);
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/* for_each_set_bit() macro requires unsigned long */
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pending = data;
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/* solve powerkey order */
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if ((i == HISI_IRQ_KEY_NUM) &&
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@ -137,16 +78,18 @@ static irqreturn_t hi6421_spmi_irq_handler(int irq, void *data)
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static void hi6421_spmi_irq_mask(struct irq_data *d)
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{
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struct hi6421_spmi_pmic *pmic = irq_data_get_irq_chip_data(d);
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u32 data, offset;
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unsigned long flags;
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unsigned int data;
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u32 offset;
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offset = (irqd_to_hwirq(d) >> 3);
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offset += SOC_PMIC_IRQ_MASK_0_ADDR;
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spin_lock_irqsave(&pmic->lock, flags);
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data = hi6421_spmi_pmic_read(pmic, offset);
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regmap_read(pmic->map, offset, &data);
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data |= (1 << (irqd_to_hwirq(d) & 0x07));
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hi6421_spmi_pmic_write(pmic, offset, data);
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regmap_write(pmic->map, offset, data);
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spin_unlock_irqrestore(&pmic->lock, flags);
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}
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@ -160,9 +103,9 @@ static void hi6421_spmi_irq_unmask(struct irq_data *d)
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offset += SOC_PMIC_IRQ_MASK_0_ADDR;
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spin_lock_irqsave(&pmic->lock, flags);
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data = hi6421_spmi_pmic_read(pmic, offset);
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regmap_read(pmic->map, offset, &data);
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data &= ~(1 << (irqd_to_hwirq(d) & 0x07));
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hi6421_spmi_pmic_write(pmic, offset, data);
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regmap_write(pmic->map, offset, data);
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spin_unlock_irqrestore(&pmic->lock, flags);
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}
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@ -194,27 +137,36 @@ static const struct irq_domain_ops hi6421_spmi_domain_ops = {
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static void hi6421_spmi_pmic_irq_prc(struct hi6421_spmi_pmic *pmic)
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{
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int i, pending;
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int i;
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unsigned int pending;
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for (i = 0 ; i < HISI_IRQ_ARRAY; i++)
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hi6421_spmi_pmic_write(pmic, SOC_PMIC_IRQ_MASK_0_ADDR + i,
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regmap_write(pmic->map, SOC_PMIC_IRQ_MASK_0_ADDR + i,
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HISI_MASK_STATE);
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for (i = 0 ; i < HISI_IRQ_ARRAY; i++) {
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pending = hi6421_spmi_pmic_read(pmic, SOC_PMIC_IRQ0_ADDR + i);
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regmap_read(pmic->map, SOC_PMIC_IRQ0_ADDR + i, &pending);
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pr_debug("PMU IRQ address value:irq[0x%x] = 0x%x\n",
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SOC_PMIC_IRQ0_ADDR + i, pending);
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hi6421_spmi_pmic_write(pmic, SOC_PMIC_IRQ0_ADDR + i,
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HISI_MASK_STATE);
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regmap_write(pmic->map, SOC_PMIC_IRQ0_ADDR + i,
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HISI_MASK_STATE);
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}
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}
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static const struct regmap_config spmi_regmap_config = {
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.reg_bits = 16,
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.val_bits = 8,
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.max_register = 0xffff,
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.fast_io = true
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};
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static int hi6421_spmi_pmic_probe(struct spmi_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct hi6421_spmi_pmic *pmic;
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struct regmap *map;
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unsigned int virq;
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int ret, i;
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@ -222,9 +174,14 @@ static int hi6421_spmi_pmic_probe(struct spmi_device *pdev)
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if (!pmic)
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return -ENOMEM;
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map = devm_regmap_init_spmi_ext(pdev, &spmi_regmap_config);
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if (IS_ERR(map))
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return PTR_ERR(map);
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spin_lock_init(&pmic->lock);
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pmic->dev = dev;
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pmic->map = map;
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pmic->gpio = of_get_gpio(np, 0);
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if (pmic->gpio < 0)
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@ -12,6 +12,7 @@
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#include <linux/mfd/hi6421-spmi-pmic.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/regulator/driver.h>
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#include <linux/spmi.h>
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@ -100,7 +101,7 @@ static int hi6421_spmi_regulator_is_enabled(struct regulator_dev *rdev)
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struct hi6421_spmi_pmic *pmic = sreg->pmic;
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u32 reg_val;
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reg_val = hi6421_spmi_pmic_read(pmic, rdev->desc->enable_reg);
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regmap_read(pmic->map, rdev->desc->enable_reg, ®_val);
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return ((reg_val & rdev->desc->enable_mask) != 0);
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}
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@ -114,9 +115,9 @@ static int hi6421_spmi_regulator_enable(struct regulator_dev *rdev)
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/* cannot enable more than one regulator at one time */
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mutex_lock(&sreg->enable_mutex);
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ret = hi6421_spmi_pmic_rmw(pmic, rdev->desc->enable_reg,
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rdev->desc->enable_mask,
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rdev->desc->enable_mask);
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ret = regmap_update_bits(pmic->map, rdev->desc->enable_reg,
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rdev->desc->enable_mask,
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rdev->desc->enable_mask);
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/* Avoid powering up multiple devices at the same time */
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usleep_range(rdev->desc->off_on_delay, rdev->desc->off_on_delay + 60);
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@ -131,8 +132,8 @@ static int hi6421_spmi_regulator_disable(struct regulator_dev *rdev)
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struct hi6421_spmi_reg_info *sreg = rdev_get_drvdata(rdev);
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struct hi6421_spmi_pmic *pmic = sreg->pmic;
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return hi6421_spmi_pmic_rmw(pmic, rdev->desc->enable_reg,
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rdev->desc->enable_mask, 0);
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return regmap_update_bits(pmic->map, rdev->desc->enable_reg,
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rdev->desc->enable_mask, 0);
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}
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static int hi6421_spmi_regulator_get_voltage_sel(struct regulator_dev *rdev)
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@ -141,7 +142,7 @@ static int hi6421_spmi_regulator_get_voltage_sel(struct regulator_dev *rdev)
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struct hi6421_spmi_pmic *pmic = sreg->pmic;
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u32 reg_val;
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reg_val = hi6421_spmi_pmic_read(pmic, rdev->desc->vsel_reg);
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regmap_read(pmic->map, rdev->desc->vsel_reg, ®_val);
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return (reg_val & rdev->desc->vsel_mask) >> (ffs(rdev->desc->vsel_mask) - 1);
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}
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@ -159,8 +160,8 @@ static int hi6421_spmi_regulator_set_voltage_sel(struct regulator_dev *rdev,
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reg_val = selector << (ffs(rdev->desc->vsel_mask) - 1);
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/* set voltage selector */
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return hi6421_spmi_pmic_rmw(pmic, rdev->desc->vsel_reg,
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rdev->desc->vsel_mask, reg_val);
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return regmap_update_bits(pmic->map, rdev->desc->vsel_reg,
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rdev->desc->vsel_mask, reg_val);
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}
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static unsigned int hi6421_spmi_regulator_get_mode(struct regulator_dev *rdev)
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@ -169,7 +170,7 @@ static unsigned int hi6421_spmi_regulator_get_mode(struct regulator_dev *rdev)
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struct hi6421_spmi_pmic *pmic = sreg->pmic;
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u32 reg_val;
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reg_val = hi6421_spmi_pmic_read(pmic, rdev->desc->enable_reg);
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regmap_read(pmic->map, rdev->desc->enable_reg, ®_val);
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if (reg_val & sreg->eco_mode_mask)
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return REGULATOR_MODE_IDLE;
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@ -195,8 +196,8 @@ static int hi6421_spmi_regulator_set_mode(struct regulator_dev *rdev,
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return -EINVAL;
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}
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return hi6421_spmi_pmic_rmw(pmic, rdev->desc->enable_reg,
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sreg->eco_mode_mask, val);
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return regmap_update_bits(pmic->map, rdev->desc->enable_reg,
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sreg->eco_mode_mask, val);
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}
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static unsigned int
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@ -304,6 +305,7 @@ static int hi6421_spmi_regulator_probe(struct platform_device *pdev)
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config.dev = pdev->dev.parent;
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config.driver_data = sreg;
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config.regmap = pmic->map;
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rdev = devm_regulator_register(dev, &info->desc, &config);
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if (IS_ERR(rdev)) {
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@ -12,6 +12,7 @@
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#define __HISI_PMIC_H
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#include <linux/irqdomain.h>
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#include <linux/regmap.h>
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#define HISI_ECO_MODE_ENABLE (1)
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#define HISI_ECO_MODE_DISABLE (0)
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@ -25,13 +26,9 @@ struct hi6421_spmi_pmic {
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int irq;
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int gpio;
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unsigned int *irqs;
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struct regmap *map;
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};
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int hi6421_spmi_pmic_read(struct hi6421_spmi_pmic *pmic, int reg);
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int hi6421_spmi_pmic_write(struct hi6421_spmi_pmic *pmic, int reg, u32 val);
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int hi6421_spmi_pmic_rmw(struct hi6421_spmi_pmic *pmic, int reg,
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u32 mask, u32 bits);
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enum hi6421_spmi_pmic_irq_list {
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OTMP = 0,
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VBUS_CONNECT,
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