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Merge branch 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 RAS changes from Ingo Molnar: - SCI reporting for other error types not only correctable ones - GHES cleanups - Add the functionality to override error reporting agents as some machines are sporting a new extended error logging capability which, if done properly in the BIOS, makes a corresponding EDAC module redundant - PCIe AER tracepoint severity levels fix - Error path correction for the mce device init - MCE timer fix - Add more flexibility to the error injection (EINJ) debugfs interface * 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, mce: Fix mce_start_timer semantics ACPI, APEI, GHES: Cleanup ghes memory error handling ACPI, APEI: Cleanup alignment-aware accesses ACPI, APEI, GHES: Do not report only correctable errors with SCI ACPI, APEI, EINJ: Changes to the ACPI/APEI/EINJ debugfs interface ACPI, eMCA: Combine eMCA/EDAC event reporting priority EDAC, sb_edac: Modify H/W event reporting policy EDAC: Add an edac_report parameter to EDAC PCI, AER: Fix severity usage in aer trace event x86, mce: Call put_device on device_register failure
This commit is contained in:
commit
fab5669d55
@ -45,11 +45,22 @@ directory apei/einj. The following files are provided.
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injection. Before this, please specify all necessary error
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parameters.
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- flags
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Present for kernel version 3.13 and above. Used to specify which
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of param{1..4} are valid and should be used by BIOS during injection.
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Value is a bitmask as specified in ACPI5.0 spec for the
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SET_ERROR_TYPE_WITH_ADDRESS data structure:
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Bit 0 - Processor APIC field valid (see param3 below)
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Bit 1 - Memory address and mask valid (param1 and param2)
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Bit 2 - PCIe (seg,bus,dev,fn) valid (param4 below)
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If set to zero, legacy behaviour is used where the type of injection
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specifies just one bit set, and param1 is multiplexed.
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- param1
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This file is used to set the first error parameter value. Effect of
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parameter depends on error_type specified. For example, if error
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type is memory related type, the param1 should be a valid physical
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memory address.
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memory address. [Unless "flag" is set - see above]
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- param2
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This file is used to set the second error parameter value. Effect of
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@ -58,6 +69,12 @@ directory apei/einj. The following files are provided.
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address mask. Linux requires page or narrower granularity, say,
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0xfffffffffffff000.
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- param3
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Used when the 0x1 bit is set in "flag" to specify the APIC id
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- param4
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Used when the 0x4 bit is set in "flag" to specify target PCIe device
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- notrigger
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The EINJ mechanism is a two step process. First inject the error, then
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perform some actions to trigger it. Setting "notrigger" to 1 skips the
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@ -890,6 +890,14 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
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The xen output can only be used by Xen PV guests.
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edac_report= [HW,EDAC] Control how to report EDAC event
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Format: {"on" | "off" | "force"}
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on: enable EDAC to report H/W event. May be overridden
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by other higher priority error reporting module.
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off: disable H/W event reporting through EDAC.
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force: enforce the use of EDAC to report H/W event.
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default: on.
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ekgdboc= [X86,KGDB] Allow early kernel console debugging
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ekgdboc=kbd
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@ -33,22 +33,28 @@
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#include <linux/acpi.h>
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#include <linux/cper.h>
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#include <acpi/apei.h>
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#include <acpi/ghes.h>
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#include <asm/mce.h>
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#include "mce-internal.h"
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void apei_mce_report_mem_error(int corrected, struct cper_sec_mem_err *mem_err)
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void apei_mce_report_mem_error(int severity, struct cper_sec_mem_err *mem_err)
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{
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struct mce m;
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/* Only corrected MC is reported */
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if (!corrected || !(mem_err->validation_bits & CPER_MEM_VALID_PA))
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if (!(mem_err->validation_bits & CPER_MEM_VALID_PA))
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return;
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mce_setup(&m);
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m.bank = 1;
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/* Fake a memory read corrected error with unknown channel */
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/* Fake a memory read error with unknown channel */
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m.status = MCI_STATUS_VAL | MCI_STATUS_EN | MCI_STATUS_ADDRV | 0x9f;
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if (severity >= GHES_SEV_RECOVERABLE)
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m.status |= MCI_STATUS_UC;
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if (severity >= GHES_SEV_PANIC)
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m.status |= MCI_STATUS_PCC;
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m.addr = mem_err->physical_addr;
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mce_log(&m);
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mce_notify_irq();
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|
@ -1638,15 +1638,15 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
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static void mce_start_timer(unsigned int cpu, struct timer_list *t)
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{
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unsigned long iv = mce_adjust_timer(check_interval * HZ);
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__this_cpu_write(mce_next_interval, iv);
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unsigned long iv = check_interval * HZ;
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if (mca_cfg.ignore_ce || !iv)
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return;
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per_cpu(mce_next_interval, cpu) = iv;
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t->expires = round_jiffies(jiffies + iv);
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add_timer_on(t, smp_processor_id());
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add_timer_on(t, cpu);
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}
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static void __mcheck_cpu_init_timer(void)
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@ -2272,8 +2272,10 @@ static int mce_device_create(unsigned int cpu)
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dev->release = &mce_device_release;
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err = device_register(dev);
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if (err)
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if (err) {
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put_device(dev);
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return err;
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}
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for (i = 0; mce_device_attrs[i]; i++) {
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err = device_create_file(dev, mce_device_attrs[i]);
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@ -12,6 +12,7 @@
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#include <acpi/acpi_bus.h>
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#include <linux/cper.h>
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#include <linux/ratelimit.h>
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#include <linux/edac.h>
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#include <asm/cpu.h>
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#include <asm/mce.h>
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@ -43,6 +44,8 @@ struct extlog_l1_head {
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u8 rev1[12];
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};
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static int old_edac_report_status;
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static u8 extlog_dsm_uuid[] = "663E35AF-CC10-41A4-88EA-5470AF055295";
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/* L1 table related physical address */
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@ -150,7 +153,7 @@ static int extlog_print(struct notifier_block *nb, unsigned long val,
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rc = print_extlog_rcd(NULL, (struct acpi_generic_status *)elog_buf, cpu);
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return NOTIFY_DONE;
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return NOTIFY_STOP;
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}
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static int extlog_get_dsm(acpi_handle handle, int rev, int func, u64 *ret)
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@ -231,8 +234,12 @@ static int __init extlog_init(void)
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u64 cap;
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int rc;
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rc = -ENODEV;
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if (get_edac_report_status() == EDAC_REPORTING_FORCE) {
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pr_warn("Not loading eMCA, error reporting force-enabled through EDAC.\n");
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return -EPERM;
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}
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rc = -ENODEV;
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rdmsrl(MSR_IA32_MCG_CAP, cap);
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if (!(cap & MCG_ELOG_P))
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return rc;
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@ -287,6 +294,12 @@ static int __init extlog_init(void)
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if (elog_buf == NULL)
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goto err_release_elog;
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/*
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* eMCA event report method has higher priority than EDAC method,
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* unless EDAC event report method is mandatory.
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*/
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old_edac_report_status = get_edac_report_status();
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set_edac_report_status(EDAC_REPORTING_DISABLED);
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mce_register_decode_chain(&extlog_mce_dec);
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/* enable OS to be involved to take over management from BIOS */
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((struct extlog_l1_head *)extlog_l1_addr)->flags |= FLAG_OS_OPTIN;
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@ -308,6 +321,7 @@ err:
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static void __exit extlog_exit(void)
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{
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set_edac_report_status(old_edac_report_status);
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mce_unregister_decode_chain(&extlog_mce_dec);
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((struct extlog_l1_head *)extlog_l1_addr)->flags &= ~FLAG_OS_OPTIN;
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if (extlog_l1_addr)
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@ -41,6 +41,7 @@
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#include <linux/rculist.h>
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#include <linux/interrupt.h>
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#include <linux/debugfs.h>
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#include <asm/unaligned.h>
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#include "apei-internal.h"
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@ -567,8 +568,7 @@ static int apei_check_gar(struct acpi_generic_address *reg, u64 *paddr,
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bit_offset = reg->bit_offset;
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access_size_code = reg->access_width;
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space_id = reg->space_id;
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/* Handle possible alignment issues */
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memcpy(paddr, ®->address, sizeof(*paddr));
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*paddr = get_unaligned(®->address);
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if (!*paddr) {
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pr_warning(FW_BUG APEI_PFX
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"Invalid physical address in GAR [0x%llx/%u/%u/%u/%u]\n",
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@ -34,6 +34,7 @@
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#include <linux/delay.h>
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#include <linux/mm.h>
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#include <acpi/acpi.h>
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#include <asm/unaligned.h>
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#include "apei-internal.h"
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@ -216,7 +217,7 @@ static void check_vendor_extension(u64 paddr,
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static void *einj_get_parameter_address(void)
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{
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int i;
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u64 paddrv4 = 0, paddrv5 = 0;
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u64 pa_v4 = 0, pa_v5 = 0;
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struct acpi_whea_header *entry;
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entry = EINJ_TAB_ENTRY(einj_tab);
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@ -225,30 +226,28 @@ static void *einj_get_parameter_address(void)
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entry->instruction == ACPI_EINJ_WRITE_REGISTER &&
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entry->register_region.space_id ==
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ACPI_ADR_SPACE_SYSTEM_MEMORY)
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memcpy(&paddrv4, &entry->register_region.address,
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sizeof(paddrv4));
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pa_v4 = get_unaligned(&entry->register_region.address);
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if (entry->action == ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS &&
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entry->instruction == ACPI_EINJ_WRITE_REGISTER &&
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entry->register_region.space_id ==
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ACPI_ADR_SPACE_SYSTEM_MEMORY)
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memcpy(&paddrv5, &entry->register_region.address,
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sizeof(paddrv5));
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pa_v5 = get_unaligned(&entry->register_region.address);
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entry++;
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}
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if (paddrv5) {
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if (pa_v5) {
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struct set_error_type_with_address *v5param;
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v5param = acpi_os_map_memory(paddrv5, sizeof(*v5param));
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v5param = acpi_os_map_memory(pa_v5, sizeof(*v5param));
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if (v5param) {
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acpi5 = 1;
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check_vendor_extension(paddrv5, v5param);
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check_vendor_extension(pa_v5, v5param);
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return v5param;
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}
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}
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if (param_extension && paddrv4) {
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if (param_extension && pa_v4) {
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struct einj_parameter *v4param;
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v4param = acpi_os_map_memory(paddrv4, sizeof(*v4param));
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v4param = acpi_os_map_memory(pa_v4, sizeof(*v4param));
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if (!v4param)
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return NULL;
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if (v4param->reserved1 || v4param->reserved2) {
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@ -416,7 +415,8 @@ out:
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return rc;
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}
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static int __einj_error_inject(u32 type, u64 param1, u64 param2)
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static int __einj_error_inject(u32 type, u32 flags, u64 param1, u64 param2,
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u64 param3, u64 param4)
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{
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struct apei_exec_context ctx;
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u64 val, trigger_paddr, timeout = FIRMWARE_TIMEOUT;
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@ -446,6 +446,12 @@ static int __einj_error_inject(u32 type, u64 param1, u64 param2)
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break;
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}
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v5param->flags = vendor_flags;
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||||
} else if (flags) {
|
||||
v5param->flags = flags;
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v5param->memory_address = param1;
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v5param->memory_address_range = param2;
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||||
v5param->apicid = param3;
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||||
v5param->pcie_sbdf = param4;
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} else {
|
||||
switch (type) {
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case ACPI_EINJ_PROCESSOR_CORRECTABLE:
|
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@ -514,11 +520,17 @@ static int __einj_error_inject(u32 type, u64 param1, u64 param2)
|
||||
}
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||||
|
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/* Inject the specified hardware error */
|
||||
static int einj_error_inject(u32 type, u64 param1, u64 param2)
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static int einj_error_inject(u32 type, u32 flags, u64 param1, u64 param2,
|
||||
u64 param3, u64 param4)
|
||||
{
|
||||
int rc;
|
||||
unsigned long pfn;
|
||||
|
||||
/* If user manually set "flags", make sure it is legal */
|
||||
if (flags && (flags &
|
||||
~(SETWA_FLAGS_APICID|SETWA_FLAGS_MEM|SETWA_FLAGS_PCIE_SBDF)))
|
||||
return -EINVAL;
|
||||
|
||||
/*
|
||||
* We need extra sanity checks for memory errors.
|
||||
* Other types leap directly to injection.
|
||||
@ -532,7 +544,7 @@ static int einj_error_inject(u32 type, u64 param1, u64 param2)
|
||||
if (type & ACPI5_VENDOR_BIT) {
|
||||
if (vendor_flags != SETWA_FLAGS_MEM)
|
||||
goto inject;
|
||||
} else if (!(type & MEM_ERROR_MASK))
|
||||
} else if (!(type & MEM_ERROR_MASK) && !(flags & SETWA_FLAGS_MEM))
|
||||
goto inject;
|
||||
|
||||
/*
|
||||
@ -546,15 +558,18 @@ static int einj_error_inject(u32 type, u64 param1, u64 param2)
|
||||
|
||||
inject:
|
||||
mutex_lock(&einj_mutex);
|
||||
rc = __einj_error_inject(type, param1, param2);
|
||||
rc = __einj_error_inject(type, flags, param1, param2, param3, param4);
|
||||
mutex_unlock(&einj_mutex);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static u32 error_type;
|
||||
static u32 error_flags;
|
||||
static u64 error_param1;
|
||||
static u64 error_param2;
|
||||
static u64 error_param3;
|
||||
static u64 error_param4;
|
||||
static struct dentry *einj_debug_dir;
|
||||
|
||||
static int available_error_type_show(struct seq_file *m, void *v)
|
||||
@ -648,7 +663,8 @@ static int error_inject_set(void *data, u64 val)
|
||||
if (!error_type)
|
||||
return -EINVAL;
|
||||
|
||||
return einj_error_inject(error_type, error_param1, error_param2);
|
||||
return einj_error_inject(error_type, error_flags, error_param1, error_param2,
|
||||
error_param3, error_param4);
|
||||
}
|
||||
|
||||
DEFINE_SIMPLE_ATTRIBUTE(error_inject_fops, NULL,
|
||||
@ -729,6 +745,10 @@ static int __init einj_init(void)
|
||||
rc = -ENOMEM;
|
||||
einj_param = einj_get_parameter_address();
|
||||
if ((param_extension || acpi5) && einj_param) {
|
||||
fentry = debugfs_create_x32("flags", S_IRUSR | S_IWUSR,
|
||||
einj_debug_dir, &error_flags);
|
||||
if (!fentry)
|
||||
goto err_unmap;
|
||||
fentry = debugfs_create_x64("param1", S_IRUSR | S_IWUSR,
|
||||
einj_debug_dir, &error_param1);
|
||||
if (!fentry)
|
||||
@ -737,6 +757,14 @@ static int __init einj_init(void)
|
||||
einj_debug_dir, &error_param2);
|
||||
if (!fentry)
|
||||
goto err_unmap;
|
||||
fentry = debugfs_create_x64("param3", S_IRUSR | S_IWUSR,
|
||||
einj_debug_dir, &error_param3);
|
||||
if (!fentry)
|
||||
goto err_unmap;
|
||||
fentry = debugfs_create_x64("param4", S_IRUSR | S_IWUSR,
|
||||
einj_debug_dir, &error_param4);
|
||||
if (!fentry)
|
||||
goto err_unmap;
|
||||
|
||||
fentry = debugfs_create_x32("notrigger", S_IRUSR | S_IWUSR,
|
||||
einj_debug_dir, ¬rigger);
|
||||
|
@ -611,7 +611,7 @@ static void __erst_record_id_cache_compact(void)
|
||||
if (entries[i] == APEI_ERST_INVALID_RECORD_ID)
|
||||
continue;
|
||||
if (wpos != i)
|
||||
memcpy(&entries[wpos], &entries[i], sizeof(entries[i]));
|
||||
entries[wpos] = entries[i];
|
||||
wpos++;
|
||||
}
|
||||
erst_record_id_cache.len = wpos;
|
||||
|
@ -413,27 +413,31 @@ static void ghes_handle_memory_failure(struct acpi_generic_data *gdata, int sev)
|
||||
{
|
||||
#ifdef CONFIG_ACPI_APEI_MEMORY_FAILURE
|
||||
unsigned long pfn;
|
||||
int flags = -1;
|
||||
int sec_sev = ghes_severity(gdata->error_severity);
|
||||
struct cper_sec_mem_err *mem_err;
|
||||
mem_err = (struct cper_sec_mem_err *)(gdata + 1);
|
||||
|
||||
if (!(mem_err->validation_bits & CPER_MEM_VALID_PA))
|
||||
return;
|
||||
|
||||
pfn = mem_err->physical_addr >> PAGE_SHIFT;
|
||||
if (!pfn_valid(pfn)) {
|
||||
pr_warn_ratelimited(FW_WARN GHES_PFX
|
||||
"Invalid address in generic error data: %#llx\n",
|
||||
mem_err->physical_addr);
|
||||
return;
|
||||
}
|
||||
|
||||
/* iff following two events can be handled properly by now */
|
||||
if (sec_sev == GHES_SEV_CORRECTED &&
|
||||
(gdata->flags & CPER_SEC_ERROR_THRESHOLD_EXCEEDED) &&
|
||||
(mem_err->validation_bits & CPER_MEM_VALID_PA)) {
|
||||
pfn = mem_err->physical_addr >> PAGE_SHIFT;
|
||||
if (pfn_valid(pfn))
|
||||
memory_failure_queue(pfn, 0, MF_SOFT_OFFLINE);
|
||||
else if (printk_ratelimit())
|
||||
pr_warn(FW_WARN GHES_PFX
|
||||
"Invalid address in generic error data: %#llx\n",
|
||||
mem_err->physical_addr);
|
||||
}
|
||||
if (sev == GHES_SEV_RECOVERABLE &&
|
||||
sec_sev == GHES_SEV_RECOVERABLE &&
|
||||
mem_err->validation_bits & CPER_MEM_VALID_PA) {
|
||||
pfn = mem_err->physical_addr >> PAGE_SHIFT;
|
||||
memory_failure_queue(pfn, 0, 0);
|
||||
}
|
||||
(gdata->flags & CPER_SEC_ERROR_THRESHOLD_EXCEEDED))
|
||||
flags = MF_SOFT_OFFLINE;
|
||||
if (sev == GHES_SEV_RECOVERABLE && sec_sev == GHES_SEV_RECOVERABLE)
|
||||
flags = 0;
|
||||
|
||||
if (flags != -1)
|
||||
memory_failure_queue(pfn, 0, flags);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -453,8 +457,7 @@ static void ghes_do_proc(struct ghes *ghes,
|
||||
ghes_edac_report_mem_error(ghes, sev, mem_err);
|
||||
|
||||
#ifdef CONFIG_X86_MCE
|
||||
apei_mce_report_mem_error(sev == GHES_SEV_CORRECTED,
|
||||
mem_err);
|
||||
apei_mce_report_mem_error(sev, mem_err);
|
||||
#endif
|
||||
ghes_handle_memory_failure(gdata, sev);
|
||||
}
|
||||
|
@ -29,6 +29,25 @@ EXPORT_SYMBOL_GPL(edac_err_assert);
|
||||
|
||||
static atomic_t edac_subsys_valid = ATOMIC_INIT(0);
|
||||
|
||||
int edac_report_status = EDAC_REPORTING_ENABLED;
|
||||
EXPORT_SYMBOL_GPL(edac_report_status);
|
||||
|
||||
static int __init edac_report_setup(char *str)
|
||||
{
|
||||
if (!str)
|
||||
return -EINVAL;
|
||||
|
||||
if (!strncmp(str, "on", 2))
|
||||
set_edac_report_status(EDAC_REPORTING_ENABLED);
|
||||
else if (!strncmp(str, "off", 3))
|
||||
set_edac_report_status(EDAC_REPORTING_DISABLED);
|
||||
else if (!strncmp(str, "force", 5))
|
||||
set_edac_report_status(EDAC_REPORTING_FORCE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
__setup("edac_report=", edac_report_setup);
|
||||
|
||||
/*
|
||||
* called to determine if there is an EDAC driver interested in
|
||||
* knowing an event (such as NMI) occurred
|
||||
|
@ -1829,6 +1829,9 @@ static int sbridge_mce_check_error(struct notifier_block *nb, unsigned long val,
|
||||
struct mem_ctl_info *mci;
|
||||
struct sbridge_pvt *pvt;
|
||||
|
||||
if (get_edac_report_status() == EDAC_REPORTING_DISABLED)
|
||||
return NOTIFY_DONE;
|
||||
|
||||
mci = get_mci_for_node_id(mce->socketid);
|
||||
if (!mci)
|
||||
return NOTIFY_BAD;
|
||||
@ -2142,9 +2145,10 @@ static int __init sbridge_init(void)
|
||||
opstate_init();
|
||||
|
||||
pci_rc = pci_register_driver(&sbridge_driver);
|
||||
|
||||
if (pci_rc >= 0) {
|
||||
mce_register_decode_chain(&sbridge_mce_dec);
|
||||
if (get_edac_report_status() == EDAC_REPORTING_DISABLED)
|
||||
sbridge_printk(KERN_WARNING, "Loading driver, error reporting disabled.\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -35,6 +35,34 @@ extern void edac_atomic_assert_error(void);
|
||||
extern struct bus_type *edac_get_sysfs_subsys(void);
|
||||
extern void edac_put_sysfs_subsys(void);
|
||||
|
||||
enum {
|
||||
EDAC_REPORTING_ENABLED,
|
||||
EDAC_REPORTING_DISABLED,
|
||||
EDAC_REPORTING_FORCE
|
||||
};
|
||||
|
||||
extern int edac_report_status;
|
||||
#ifdef CONFIG_EDAC
|
||||
static inline int get_edac_report_status(void)
|
||||
{
|
||||
return edac_report_status;
|
||||
}
|
||||
|
||||
static inline void set_edac_report_status(int new)
|
||||
{
|
||||
edac_report_status = new;
|
||||
}
|
||||
#else
|
||||
static inline int get_edac_report_status(void)
|
||||
{
|
||||
return EDAC_REPORTING_DISABLED;
|
||||
}
|
||||
|
||||
static inline void set_edac_report_status(int new)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline void opstate_init(void)
|
||||
{
|
||||
switch (edac_op_state) {
|
||||
|
@ -5,7 +5,7 @@
|
||||
#define _TRACE_AER_H
|
||||
|
||||
#include <linux/tracepoint.h>
|
||||
#include <linux/edac.h>
|
||||
#include <linux/aer.h>
|
||||
|
||||
|
||||
/*
|
||||
@ -63,10 +63,10 @@ TRACE_EVENT(aer_event,
|
||||
|
||||
TP_printk("%s PCIe Bus Error: severity=%s, %s\n",
|
||||
__get_str(dev_name),
|
||||
__entry->severity == HW_EVENT_ERR_CORRECTED ? "Corrected" :
|
||||
__entry->severity == HW_EVENT_ERR_FATAL ?
|
||||
"Fatal" : "Uncorrected",
|
||||
__entry->severity == HW_EVENT_ERR_CORRECTED ?
|
||||
__entry->severity == AER_CORRECTABLE ? "Corrected" :
|
||||
__entry->severity == AER_FATAL ?
|
||||
"Fatal" : "Uncorrected, non-fatal",
|
||||
__entry->severity == AER_CORRECTABLE ?
|
||||
__print_flags(__entry->status, "|", aer_correctable_errors) :
|
||||
__print_flags(__entry->status, "|", aer_uncorrectable_errors))
|
||||
);
|
||||
|
Loading…
Reference in New Issue
Block a user