drm pull for 5.8-rc1

core:
 - uapi: error out EBUSY when existing master
 - uapi: rework SET/DROP MASTER permission handling
 - remove drm_pci.h
 - drm_pci* are now legacy
 - introduced managed DRM resources
 - subclassing support for drm_framebuffer
 - simple encoder helper
 - edid improvements
 - vblank + writeback documentation improved
 - drm/mm - optimise tree searches
 - port drivers to use devm_drm_dev_alloc
 
 dma-buf:
 - add flag for p2p buffer support
 
 mst:
 - ACT timeout improvements
 - remove drm_dp_mst_has_audio
 - don't use 2nd TX slot - spec recommends against it
 
 bridge:
 - dw-hdmi various improvements
 - chrontel ch7033 support
 - fix stack issues with old gcc
 
 hdmi:
 - add unpack function for drm infoframe
 
 fbdev:
 - misc fbdev driver fixes
 
 i915:
 - uapi: global sseu pinning
 - uapi: OA buffer polling
 - uapi: remove generated perf code
 - uapi: per-engine default property values in sysfs
 - Tigerlake GEN12 enabled.
 - Lots of gem refactoring
 - Tigerlake enablement patches
 - move to drm_device logging
 - Icelake gamma HW readout
 - push MST link retrain to hotplug work
 - bandwidth atomic helpers
 - ICL fixes
 - RPS/GT refactoring
 - Cherryview full-ppgtt support
 - i915 locking guidelines documented
 - require linear fb stride to be 512 multiple on gen9
 - Tigerlake SAGV support
 
 amdgpu:
 - uapi: encrypted GPU memory handling
 - uapi: add MEM_SYNC IB flag
 - p2p dma-buf support
 - export VRAM dma-bufs
 - FRU chip access support
 - RAS/SR-IOV updates
 - Powerplay locking fixes
 - VCN DPG (powergating) enablement
 - GFX10 clockgating fixes
 - DC fixes
 - GPU reset fixes
 - navi SDMA fix
 - expose FP16 for modesetting
 - DP 1.4 compliance fixes
 - gfx10 soft recovery
 - Improved Critical Thermal Faults handling
 - resizable BAR on gmc10
 
 amdkfd:
 - uapi: GWS resource management
 - track GPU memory per process
 - report PCI domain in topology
 
 radeon:
 - safe reg list generator fixes
 
 nouveau:
 - HD audio fixes on recent systems
 - vGPU detection (fail probe if we're on one, for now)
 - Interlaced mode fixes (mostly avoidance on Turing, which doesn't support it)
 - SVM improvements/fixes
 - NVIDIA format modifier support
 - Misc other fixes.
 
 adv7511:
 - HDMI SPDIF support
 
 ast:
 - allocate crtc state size
 - fix double assignment
 - fix suspend
 
 bochs:
 - drop connector register
 
 cirrus:
 - move to tiny drivers.
 
 exynos:
 - fix imported dma-buf mapping
 - enable runtime PM
 - fixes and cleanups
 
 mediatek:
 - DPI pin mode swap
 - config mipi_tx current/impedance
 
 lima:
 - devfreq + cooling device support
 - task handling improvements
 - runtime PM support
 
 pl111:
 - vexpress init improvements
 - fix module auto-load
 
 rcar-du:
 - DT bindings conversion to YAML
 - Planes zpos sanity check and fix
 - MAINTAINERS entry for LVDS panel driver
 
 mcde:
 - fix return value
 
 mgag200:
 - use managed config init
 
 stm:
 - read endpoints from DT
 
 vboxvideo:
 - use PCI managed functions
 - drop WC mtrr
 
 vkms:
 - enable cursor by default
 
 rockchip:
 - afbc support
 
 virtio:
 - various cleanups
 
 qxl:
 - fix cursor notify port
 
 hisilicon:
 - 128-byte stride alignment fix
 
 sun4i:
 - improved format handling
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Merge tag 'drm-next-2020-06-02' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Dave Airlie:
 "Highlights:

   - Core DRM had a lot of refactoring around managed drm resources to
     make drivers simpler.

   - Intel Tigerlake support is on by default

   - amdgpu now support p2p PCI buffer sharing and encrypted GPU memory

  Details:

  core:
   - uapi: error out EBUSY when existing master
   - uapi: rework SET/DROP MASTER permission handling
   - remove drm_pci.h
   - drm_pci* are now legacy
   - introduced managed DRM resources
   - subclassing support for drm_framebuffer
   - simple encoder helper
   - edid improvements
   - vblank + writeback documentation improved
   - drm/mm - optimise tree searches
   - port drivers to use devm_drm_dev_alloc

  dma-buf:
   - add flag for p2p buffer support

  mst:
   - ACT timeout improvements
   - remove drm_dp_mst_has_audio
   - don't use 2nd TX slot - spec recommends against it

  bridge:
   - dw-hdmi various improvements
   - chrontel ch7033 support
   - fix stack issues with old gcc

  hdmi:
   - add unpack function for drm infoframe

  fbdev:
   - misc fbdev driver fixes

  i915:
   - uapi: global sseu pinning
   - uapi: OA buffer polling
   - uapi: remove generated perf code
   - uapi: per-engine default property values in sysfs
   - Tigerlake GEN12 enabled.
   - Lots of gem refactoring
   - Tigerlake enablement patches
   - move to drm_device logging
   - Icelake gamma HW readout
   - push MST link retrain to hotplug work
   - bandwidth atomic helpers
   - ICL fixes
   - RPS/GT refactoring
   - Cherryview full-ppgtt support
   - i915 locking guidelines documented
   - require linear fb stride to be 512 multiple on gen9
   - Tigerlake SAGV support

  amdgpu:
   - uapi: encrypted GPU memory handling
   - uapi: add MEM_SYNC IB flag
   - p2p dma-buf support
   - export VRAM dma-bufs
   - FRU chip access support
   - RAS/SR-IOV updates
   - Powerplay locking fixes
   - VCN DPG (powergating) enablement
   - GFX10 clockgating fixes
   - DC fixes
   - GPU reset fixes
   - navi SDMA fix
   - expose FP16 for modesetting
   - DP 1.4 compliance fixes
   - gfx10 soft recovery
   - Improved Critical Thermal Faults handling
   - resizable BAR on gmc10

  amdkfd:
   - uapi: GWS resource management
   - track GPU memory per process
   - report PCI domain in topology

  radeon:
   - safe reg list generator fixes

  nouveau:
   - HD audio fixes on recent systems
   - vGPU detection (fail probe if we're on one, for now)
   - Interlaced mode fixes (mostly avoidance on Turing, which doesn't support it)
   - SVM improvements/fixes
   - NVIDIA format modifier support
   - Misc other fixes.

  adv7511:
   - HDMI SPDIF support

  ast:
   - allocate crtc state size
   - fix double assignment
   - fix suspend

  bochs:
   - drop connector register

  cirrus:
   - move to tiny drivers.

  exynos:
   - fix imported dma-buf mapping
   - enable runtime PM
   - fixes and cleanups

  mediatek:
   - DPI pin mode swap
   - config mipi_tx current/impedance

  lima:
   - devfreq + cooling device support
   - task handling improvements
   - runtime PM support

  pl111:
   - vexpress init improvements
   - fix module auto-load

  rcar-du:
   - DT bindings conversion to YAML
   - Planes zpos sanity check and fix
   - MAINTAINERS entry for LVDS panel driver

  mcde:
   - fix return value

  mgag200:
   - use managed config init

  stm:
   - read endpoints from DT

  vboxvideo:
   - use PCI managed functions
   - drop WC mtrr

  vkms:
   - enable cursor by default

  rockchip:
   - afbc support

  virtio:
   - various cleanups

  qxl:
   - fix cursor notify port

  hisilicon:
   - 128-byte stride alignment fix

  sun4i:
   - improved format handling"

* tag 'drm-next-2020-06-02' of git://anongit.freedesktop.org/drm/drm: (1401 commits)
  drm/amd/display: Fix potential integer wraparound resulting in a hang
  drm/amd/display: drop cursor position check in atomic test
  drm/amdgpu: fix device attribute node create failed with multi gpu
  drm/nouveau: use correct conflicting framebuffer API
  drm/vblank: Fix -Wformat compile warnings on some arches
  drm/amdgpu: Sync with VM root BO when switching VM to CPU update mode
  drm/amd/display: Handle GPU reset for DC block
  drm/amdgpu: add apu flags (v2)
  drm/amd/powerpay: Disable gfxoff when setting manual mode on picasso and raven
  drm/amdgpu: fix pm sysfs node handling (v2)
  drm/amdgpu: move gpu_info parsing after common early init
  drm/amdgpu: move discovery gfx config fetching
  drm/nouveau/dispnv50: fix runtime pm imbalance on error
  drm/nouveau: fix runtime pm imbalance on error
  drm/nouveau: fix runtime pm imbalance on error
  drm/nouveau/debugfs: fix runtime pm imbalance on error
  drm/nouveau/nouveau/hmm: fix migrate zero page to GPU
  drm/nouveau/nouveau/hmm: fix nouveau_dmem_chunk allocations
  drm/nouveau/kms/nv50-: Share DP SST mode_valid() handling with MST
  drm/nouveau/kms/nv50-: Move 8BPC limit for MST into nv50_mstc_get_modes()
  ...
This commit is contained in:
Linus Torvalds 2020-06-02 15:04:15 -07:00
commit faa392181a
1191 changed files with 41152 additions and 20582 deletions

View File

@ -119,7 +119,7 @@ examples:
panel@0 {
compatible = "bananapi,lhr050h41", "ilitek,ili9881c";
reg = <0>;
power-gpios = <&pio 1 7 0>; /* PB07 */
power-supply = <&reg_display>;
reset-gpios = <&r_pio 0 5 1>; /* PL05 */
backlight = <&pwm_bl>;
};

View File

@ -1,50 +0,0 @@
Analog Devices ADV7123 Video DAC
--------------------------------
The ADV7123 is a digital-to-analog converter that outputs VGA signals from a
parallel video input.
Required properties:
- compatible: Should be "adi,adv7123"
Optional properties:
- psave-gpios: Power save control GPIO
Required nodes:
The ADV7123 has two video ports. Their connections are modeled using the OF
graph bindings specified in Documentation/devicetree/bindings/graph.txt.
- Video port 0 for DPI input
- Video port 1 for VGA output
Example
-------
adv7123: encoder@0 {
compatible = "adi,adv7123";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7123_in: endpoint@0 {
remote-endpoint = <&dpi_out>;
};
};
port@1 {
reg = <1>;
adv7123_out: endpoint@0 {
remote-endpoint = <&vga_connector_in>;
};
};
};
};

View File

@ -37,6 +37,12 @@ properties:
type: object
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
port@0:
type: object
description: |
@ -51,6 +57,8 @@ properties:
required:
- port@0
additionalProperties: false
required:
- compatible
- reg

View File

@ -0,0 +1,77 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2019,2020 Lubomir Rintel <lkundrak@v3.sk>
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/chrontel,ch7033.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Chrontel CH7033 Video Encoder Device Tree Bindings
maintainers:
- Lubomir Rintel <lkundrak@v3.sk>
properties:
compatible:
const: chrontel,ch7033
reg:
maxItems: 1
description: I2C address of the device
ports:
type: object
properties:
port@0:
type: object
description: |
Video port for RGB input.
port@1:
type: object
description: |
DVI port, should be connected to a node compatible with the
dvi-connector binding.
required:
- port@0
- port@1
required:
- compatible
- reg
- ports
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
vga-dvi-encoder@76 {
compatible = "chrontel,ch7033";
reg = <0x76>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
endpoint {
remote-endpoint = <&lcd0_rgb_out>;
};
};
port@1 {
reg = <1>;
endpoint {
remote-endpoint = <&dvi_in>;
};
};
};
};
};

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@ -1,50 +0,0 @@
Dumb RGB to VGA DAC bridge
---------------------------
This binding is aimed for dumb RGB to VGA DAC based bridges that do not require
any configuration.
Required properties:
- compatible: Must be "dumb-vga-dac"
Required nodes:
This device has two video ports. Their connections are modelled using the OF
graph bindings specified in Documentation/devicetree/bindings/graph.txt.
- Video port 0 for RGB input
- Video port 1 for VGA output
Optional properties:
- vdd-supply: Power supply for DAC
Example
-------
bridge {
compatible = "dumb-vga-dac";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&tcon0_out_vga>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};

View File

@ -1,32 +0,0 @@
Synopsys DesignWare MIPI DSI host controller
============================================
This document defines device tree properties for the Synopsys DesignWare MIPI
DSI host controller. It doesn't constitue a device tree binding specification
by itself but is meant to be referenced by platform-specific device tree
bindings.
When referenced from platform device tree bindings the properties defined in
this document are defined as follows. The platform device tree bindings are
responsible for defining whether each optional property is used or not.
- reg: Memory mapped base address and length of the DesignWare MIPI DSI
host controller registers. (mandatory)
- clocks: References to all the clocks specified in the clock-names property
as specified in [1]. (mandatory)
- clock-names:
- "pclk" is the peripheral clock for either AHB and APB. (mandatory)
- "px_clk" is the pixel clock for the DPI/RGB input. (optional)
- resets: References to all the resets specified in the reset-names property
as specified in [2]. (optional)
- reset-names: string reset name, must be "apb" if used. (optional)
- panel or bridge node: see [3]. (mandatory)
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
[2] Documentation/devicetree/bindings/reset/reset.txt
[3] Documentation/devicetree/bindings/display/mipi-dsi-bus.txt

View File

@ -0,0 +1,91 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/ite,it6505.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ITE it6505 Device Tree Bindings
maintainers:
- Allen Chen <allen.chen@ite.com.tw>
description: |
The IT6505 is a high-performance DisplayPort 1.1a transmitter,
fully compliant with DisplayPort 1.1a, HDCP 1.3 specifications.
The IT6505 supports color depth of up to 36 bits (12 bits/color)
and ensures robust transmission of high-quality uncompressed video
content, along with uncompressed and compressed digital audio content.
Aside from the various video output formats supported, the IT6505
also encodes and transmits up to 8 channels of I2S digital audio,
with sampling rate up to 192kHz and sample size up to 24 bits.
In addition, an S/PDIF input port takes in compressed audio of up to
192kHz frame rate.
Each IT6505 chip comes preprogrammed with an unique HDCP key,
in compliance with the HDCP 1.3 standard so as to provide secure
transmission of high-definition content. Users of the IT6505 need not
purchase any HDCP keys or ROMs.
properties:
compatible:
const: ite,it6505
ovdd-supply:
maxItems: 1
description: I/O voltage
pwr18-supply:
maxItems: 1
description: core voltage
interrupts:
maxItems: 1
description: interrupt specifier of INT pin
reset-gpios:
maxItems: 1
description: gpio specifier of RESET pin
extcon:
maxItems: 1
description: extcon specifier for the Power Delivery
port:
type: object
description: A port node pointing to DPI host port node
required:
- compatible
- ovdd-supply
- pwr18-supply
- interrupts
- reset-gpios
- extcon
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
dp-bridge@5c {
compatible = "ite,it6505";
interrupts = <152 IRQ_TYPE_EDGE_FALLING 152 0>;
reg = <0x5c>;
pinctrl-names = "default";
pinctrl-0 = <&it6505_pins>;
ovdd-supply = <&mt6358_vsim1_reg>;
pwr18-supply = <&it6505_pp18_reg>;
reset-gpios = <&pio 179 1>;
extcon = <&usbc_extcon>;
port {
it6505_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};
};

View File

@ -50,6 +50,12 @@ properties:
This device has two video ports. Their connections are modeled using the
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
port@0:
type: object
description: |
@ -66,6 +72,8 @@ properties:
- port@0
- port@1
additionalProperties: false
powerdown-gpios:
description:
The GPIO used to control the power down line of this device.

View File

@ -0,0 +1,226 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Northwest Logic MIPI-DSI controller on i.MX SoCs
maintainers:
- Guido Gúnther <agx@sigxcpu.org>
- Robert Chiras <robert.chiras@nxp.com>
description: |
NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
the SOCs NWL MIPI-DSI host controller.
properties:
compatible:
const: fsl,imx8mq-nwl-dsi
reg:
maxItems: 1
interrupts:
maxItems: 1
'#address-cells':
const: 1
'#size-cells':
const: 0
clocks:
items:
- description: DSI core clock
- description: RX_ESC clock (used in escape mode)
- description: TX_ESC clock (used in escape mode)
- description: PHY_REF clock
- description: LCDIF clock
clock-names:
items:
- const: core
- const: rx_esc
- const: tx_esc
- const: phy_ref
- const: lcdif
mux-controls:
description:
mux controller node to use for operating the input mux
phys:
maxItems: 1
description:
A phandle to the phy module representing the DPHY
phy-names:
items:
- const: dphy
power-domains:
maxItems: 1
resets:
items:
- description: dsi byte reset line
- description: dsi dpi reset line
- description: dsi esc reset line
- description: dsi pclk reset line
reset-names:
items:
- const: byte
- const: dpi
- const: esc
- const: pclk
ports:
type: object
description:
A node containing DSI input & output port nodes with endpoint
definitions as documented in
Documentation/devicetree/bindings/graph.txt.
properties:
port@0:
type: object
description:
Input port node to receive pixel data from the
display controller. Exactly one endpoint must be
specified.
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
endpoint@0:
description: sub-node describing the input from LCDIF
type: object
endpoint@1:
description: sub-node describing the input from DCSS
type: object
reg:
const: 0
required:
- '#address-cells'
- '#size-cells'
- reg
oneOf:
- required:
- endpoint@0
- required:
- endpoint@1
additionalProperties: false
port@1:
type: object
description:
DSI output port node to the panel or the next bridge
in the chain
'#address-cells':
const: 1
'#size-cells':
const: 0
required:
- '#address-cells'
- '#size-cells'
- port@0
- port@1
additionalProperties: false
patternProperties:
"^panel@[0-9]+$":
type: object
required:
- '#address-cells'
- '#size-cells'
- clock-names
- clocks
- compatible
- interrupts
- mux-controls
- phy-names
- phys
- ports
- reg
- reset-names
- resets
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx8mq-clock.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/imx8mq-reset.h>
mipi_dsi: mipi_dsi@30a00000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx8mq-nwl-dsi";
reg = <0x30A00000 0x300>;
clocks = <&clk IMX8MQ_CLK_DSI_CORE>,
<&clk IMX8MQ_CLK_DSI_AHB>,
<&clk IMX8MQ_CLK_DSI_IPG_DIV>,
<&clk IMX8MQ_CLK_DSI_PHY_REF>,
<&clk IMX8MQ_CLK_LCDIF_PIXEL>;
clock-names = "core", "rx_esc", "tx_esc", "phy_ref", "lcdif";
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
mux-controls = <&mux 0>;
power-domains = <&pgc_mipi>;
resets = <&src IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N>,
<&src IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N>,
<&src IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N>,
<&src IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N>;
reset-names = "byte", "dpi", "esc", "pclk";
phys = <&dphy>;
phy-names = "dphy";
panel@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "rocktech,jh057n00900";
reg = <0>;
port@0 {
reg = <0>;
panel_in: endpoint {
remote-endpoint = <&mipi_dsi_out>;
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#size-cells = <0>;
#address-cells = <1>;
reg = <0>;
mipi_dsi_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&lcdif_mipi_dsi>;
};
};
port@1 {
reg = <1>;
mipi_dsi_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};

View File

@ -50,6 +50,12 @@ properties:
Documentation/devicetree/bindings/media/video-interfaces.txt
Documentation/devicetree/bindings/graph.txt
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
port@0:
type: object
description: |
@ -63,6 +69,8 @@ properties:
required:
- port@0
additionalProperties: false
required:
- compatible
- reg

View File

@ -0,0 +1,99 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/simple-bridge.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Transparent non-programmable DRM bridges
maintainers:
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
- Maxime Ripard <mripard@kernel.org>
description: |
This binding supports transparent non-programmable bridges that don't require
any configuration, with a single input and a single output.
properties:
compatible:
oneOf:
- items:
- enum:
- ti,ths8134a
- ti,ths8134b
- const: ti,ths8134
- enum:
- adi,adv7123
- dumb-vga-dac
- ti,opa362
- ti,ths8134
- ti,ths8135
ports:
type: object
description: |
This device has two video ports. Their connections are modeled using the
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
port@0:
type: object
description: The bridge input
port@1:
type: object
description: The bridge output
required:
- port@0
- port@1
additionalProperties: false
enable-gpios:
maxItems: 1
description: GPIO controlling bridge enable
vdd-supply:
maxItems: 1
description: Power supply for the bridge
required:
- compatible
- ports
additionalProperties: false
examples:
- |
bridge {
compatible = "ti,ths8134a", "ti,ths8134";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&tcon0_out_vga>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};
...

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@ -0,0 +1,68 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/snps,dw-mipi-dsi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Synopsys DesignWare MIPI DSI host controller
maintainers:
- Philippe CORNU <philippe.cornu@st.com>
description: |
This document defines device tree properties for the Synopsys DesignWare MIPI
DSI host controller. It doesn't constitue a device tree binding specification
by itself but is meant to be referenced by platform-specific device tree
bindings.
When referenced from platform device tree bindings the properties defined in
this document are defined as follows. The platform device tree bindings are
responsible for defining whether each property is required or optional.
allOf:
- $ref: ../dsi-controller.yaml#
properties:
reg:
maxItems: 1
clocks:
items:
- description: Module clock
- description: DSI bus clock for either AHB and APB
- description: Pixel clock for the DPI/RGB input
minItems: 2
clock-names:
items:
- const: ref
- const: pclk
- const: px_clk
minItems: 2
resets:
maxItems: 1
reset-names:
const: apb
ports:
type: object
properties:
port@0:
type: object
description: Input node to receive pixel data.
port@1:
type: object
description: DSI output node to panel.
required:
- port@0
- port@1
required:
- clock-names
- clocks
- ports
- reg

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@ -1,66 +0,0 @@
Thine Electronics THC63LVD1024 LVDS decoder
-------------------------------------------
The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS streams
to parallel data outputs. The chip supports single/dual input/output modes,
handling up to two LVDS input streams and up to two digital CMOS/TTL outputs.
Single or dual operation mode, output data mapping and DDR output modes are
configured through input signals and the chip does not expose any control bus.
Required properties:
- compatible: Shall be "thine,thc63lvd1024"
- vcc-supply: Power supply for TTL output, TTL CLOCKOUT signal, LVDS input,
PPL and digital circuitry
Optional properties:
- powerdown-gpios: Power down GPIO signal, pin name "/PDWN". Active low
- oe-gpios: Output enable GPIO signal, pin name "OE". Active high
The THC63LVD1024 video port connections are modeled according
to OF graph bindings specified by Documentation/devicetree/bindings/graph.txt
Required video port nodes:
- port@0: First LVDS input port
- port@2: First digital CMOS/TTL parallel output
Optional video port nodes:
- port@1: Second LVDS input port
- port@3: Second digital CMOS/TTL parallel output
The device can operate in single-link mode or dual-link mode. In single-link
mode, all pixels are received on port@0, and port@1 shall not contain any
endpoint. In dual-link mode, even-numbered pixels are received on port@0 and
odd-numbered pixels on port@1, and both port@0 and port@1 shall contain
endpoints.
Example:
--------
thc63lvd1024: lvds-decoder {
compatible = "thine,thc63lvd1024";
vcc-supply = <&reg_lvds_vcc>;
powerdown-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
lvds_dec_in_0: endpoint {
remote-endpoint = <&lvds_out>;
};
};
port@2{
reg = <2>;
lvds_dec_out_2: endpoint {
remote-endpoint = <&adv7511_in>;
};
};
};
};

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@ -0,0 +1,121 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/thine,thc63lvd1024.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Thine Electronics THC63LVD1024 LVDS Decoder
maintainers:
- Jacopo Mondi <jacopo+renesas@jmondi.org>
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
description: |
The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS
streams to parallel data outputs. The chip supports single/dual input/output
modes, handling up to two LVDS input streams and up to two digital CMOS/TTL
outputs.
Single or dual operation mode, output data mapping and DDR output modes are
configured through input signals and the chip does not expose any control
bus.
properties:
compatible:
const: thine,thc63lvd1024
ports:
type: object
description: |
This device has four video ports. Their connections are modeled using the
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
The device can operate in single-link mode or dual-link mode. In
single-link mode, all pixels are received on port@0, and port@1 shall not
contain any endpoint. In dual-link mode, even-numbered pixels are
received on port@0 and odd-numbered pixels on port@1, and both port@0 and
port@1 shall contain endpoints.
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
port@0:
type: object
description: First LVDS input port
port@1:
type: object
description: Second LVDS input port
port@2:
type: object
description: First digital CMOS/TTL parallel output
port@3:
type: object
description: Second digital CMOS/TTL parallel output
required:
- port@0
- port@2
additionalProperties: false
oe-gpios:
maxItems: 1
description: Output enable GPIO signal, pin name "OE", active high.
powerdown-gpios:
maxItems: 1
description: Power down GPIO signal, pin name "/PDWN", active low.
vcc-supply:
maxItems: 1
description:
Power supply for the TTL output, TTL CLOCKOUT signal, LVDS input, PLL and
digital circuitry.
required:
- compatible
- ports
- vcc-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
lvds-decoder {
compatible = "thine,thc63lvd1024";
vcc-supply = <&reg_lvds_vcc>;
powerdown-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
lvds_dec_in_0: endpoint {
remote-endpoint = <&lvds_out>;
};
};
port@2 {
reg = <2>;
lvds_dec_out_2: endpoint {
remote-endpoint = <&adv7511_in>;
};
};
};
};
...

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@ -1,51 +0,0 @@
THS8134 and THS8135 Video DAC
-----------------------------
This is the binding for Texas Instruments THS8134, THS8134A, THS8134B and
THS8135 Video DAC bridges.
Required properties:
- compatible: Must be one of
"ti,ths8134"
"ti,ths8134a," "ti,ths8134"
"ti,ths8134b", "ti,ths8134"
"ti,ths8135"
Required nodes:
This device has two video ports. Their connections are modelled using the OF
graph bindings specified in Documentation/devicetree/bindings/graph.txt.
- Video port 0 for RGB input
- Video port 1 for VGA output
Example
-------
vga-bridge {
compatible = "ti,ths8135";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&lcdc_out_vga>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};

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@ -28,7 +28,7 @@ description: |
properties:
$nodename:
pattern: "^dsi-controller(@.*)?$"
pattern: "^dsi(@.*)?$"
"#address-cells":
const: 1
@ -76,7 +76,7 @@ patternProperties:
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi-controller@a0351000 {
dsi@a0351000 {
reg = <0xa0351000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;

View File

@ -17,6 +17,9 @@ Required properties:
Documentation/devicetree/bindings/graph.txt. This port should be connected
to the input port of an attached HDMI or LVDS encoder chip.
Optional properties:
- pinctrl-names: Contain "default" and "sleep".
Example:
dpi0: dpi@1401d000 {
@ -27,6 +30,9 @@ dpi0: dpi@1401d000 {
<&mmsys CLK_MM_DPI_ENGINE>,
<&apmixedsys CLK_APMIXED_TVDPLL>;
clock-names = "pixel", "engine", "pll";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&dpi_pin_func>;
pinctrl-1 = <&dpi_pin_idle>;
port {
dpi0_out: endpoint {

View File

@ -33,6 +33,13 @@ Required properties:
- #clock-cells: must be <0>;
- #phy-cells: must be <0>.
Optional properties:
- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And
the step is 200.
- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
unspecified default values shall be used.
- nvmem-cell-names: Should be "calibration-data"
Example:
mipi_tx0: mipi-dphy@10215000 {
@ -42,6 +49,9 @@ mipi_tx0: mipi-dphy@10215000 {
clock-output-names = "mipi_tx0_pll";
#clock-cells = <0>;
#phy-cells = <0>;
drive-strength-microamp = <4600>;
nvmem-cells= <&mipi_tx_calibration>;
nvmem-cell-names = "calibration-data";
};
dsi0: dsi@1401b000 {

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@ -1,31 +0,0 @@
ARM Versatile TFT Panels
These panels are connected to the daughterboards found on the
ARM Versatile reference designs.
This device node must appear as a child to a "syscon"-compatible
node.
Required properties:
- compatible: should be "arm,versatile-tft-panel"
Required subnodes:
- port: see display/panel/panel-common.yaml, graph.txt
Example:
sysreg@0 {
compatible = "arm,versatile-sysreg", "syscon", "simple-mfd";
reg = <0x00000 0x1000>;
panel: display@0 {
compatible = "arm,versatile-tft-panel";
port {
panel_in: endpoint {
remote-endpoint = <&foo>;
};
};
};
};

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@ -0,0 +1,54 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/arm,versatile-tft-panel.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Versatile TFT Panels
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
description: |
These panels are connected to the daughterboards found on the
ARM Versatile reference designs.
This device node must appear as a child to a "syscon"-compatible
node.
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: arm,versatile-tft-panel
port: true
required:
- compatible
- port
additionalProperties: false
examples:
- |
sysreg {
compatible = "arm,versatile-sysreg", "syscon", "simple-mfd";
reg = <0x00000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
panel {
compatible = "arm,versatile-tft-panel";
port {
panel_in: endpoint {
remote-endpoint = <&foo>;
};
};
};
};
...

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@ -0,0 +1,56 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/asus,z00t-tm5p5-nt35596.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ASUS Z00T TM5P5 NT35596 5.5" 1080×1920 LCD Panel
maintainers:
- Konrad Dybcio <konradybcio@gmail.com>
description: |+
This panel seems to only be found in the Asus Z00T
smartphone and we have no straightforward way of
actually getting the correct model number,
as no schematics are released publicly.
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: asus,z00t-tm5p5-n35596
reg: true
reset-gpios: true
vdd-supply:
description: core voltage supply
vddio-supply:
description: vddio supply
required:
- compatible
- reg
- vdd-supply
- vddio-supply
- reset-gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
reg = <0>;
compatible = "asus,z00t-tm5p5-n35596";
vdd-supply = <&pm8916_l8>;
vddio-supply = <&pm8916_l6>;
reset-gpios = <&msmgpio 25 GPIO_ACTIVE_HIGH>;
};
};

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@ -1,24 +0,0 @@
Boe Himax8279d 1200x1920 TFT LCD panel
Required properties:
- compatible: should be "boe,himax8279d8p" and one of: "boe,himax8279d10p"
- reg: DSI virtual channel of the peripheral
- enable-gpios: panel enable gpio
- pp33-gpios: a GPIO phandle for the 3.3v pin that provides the supply voltage
- pp18-gpios: a GPIO phandle for the 1.8v pin that provides the supply voltage
Optional properties:
- backlight: phandle of the backlight device attached to the panel
Example:
&mipi_dsi {
panel {
compatible = "boe,himax8279d8p", "boe,himax8279d10p";
reg = <0>;
backlight = <&backlight>;
enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
pp33-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
pp18-gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
};
};

View File

@ -0,0 +1,59 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/boe,himax8279d.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Boe Himax8279d 1200x1920 TFT LCD panel
maintainers:
- Jerry Han <jerry.han.hq@gmail.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
items:
- const: boe,himax8279d8p
- const: boe,himax8279d10p
backlight: true
enable-gpios: true
reg: true
pp33-gpios:
maxItems: 1
description: GPIO for the 3.3v pin that provides the supply voltage
pp18-gpios:
maxItems: 1
description: GPIO for the 1.8v pin that provides the supply voltage
required:
- compatible
- reg
- enable-gpios
- pp33-gpios
- pp18-gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "boe,himax8279d8p", "boe,himax8279d10p";
reg = <0>;
backlight = <&backlight>;
enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
pp33-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
pp18-gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
};
};
...

View File

@ -24,6 +24,8 @@ properties:
- boe,tv101wum-n53
# AUO B101UAN08.3 10.1" WUXGA TFT LCD panel
- auo,b101uan08.3
# BOE TV105WUM-NW0 10.5" WUXGA TFT LCD panel
- boe,tv105wum-nw0
reg:
description: the virtual channel number of a DSI peripheral

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/display/panel/display-timings.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: display timing bindings
title: display timings bindings
maintainers:
- Thierry Reding <thierry.reding@gmail.com>
@ -14,7 +14,7 @@ maintainers:
description: |
A display panel may be able to handle several display timings,
with different resolutions.
The display-timings node makes it possible to specify the timing
The display-timings node makes it possible to specify the timings
and to specify the timing that is native for the display.
properties:
@ -25,8 +25,8 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle
description: |
The default display timing is the one specified as native-mode.
If no native-mode is specified then the first node is assumed the
native mode.
If no native-mode is specified then the first node is assumed
to be the native mode.
patternProperties:
"^timing":

View File

@ -1,20 +0,0 @@
Feiyang FY07024DI26A30-D 7" MIPI-DSI LCD Panel
Required properties:
- compatible: must be "feiyang,fy07024di26a30d"
- reg: DSI virtual channel used by that screen
- avdd-supply: analog regulator dc1 switch
- dvdd-supply: 3v3 digital regulator
- reset-gpios: a GPIO phandle for the reset pin
Optional properties:
- backlight: phandle for the backlight control.
panel@0 {
compatible = "feiyang,fy07024di26a30d";
reg = <0>;
avdd-supply = <&reg_dc1sw>;
dvdd-supply = <&reg_dldo2>;
reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
backlight = <&backlight>;
};

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@ -0,0 +1,58 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/feiyang,fy07024di26a30d.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Feiyang FY07024DI26A30-D 7" MIPI-DSI LCD Panel
maintainers:
- Jagan Teki <jagan@amarulasolutions.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: feiyang,fy07024di26a30d
reg:
description: DSI virtual channel used by that screen
maxItems: 1
avdd-supply:
description: analog regulator dc1 switch
dvdd-supply:
description: 3v3 digital regulator
reset-gpios: true
backlight: true
required:
- compatible
- reg
- avdd-supply
- dvdd-supply
- reset-gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "feiyang,fy07024di26a30d";
reg = <0>;
avdd-supply = <&reg_dc1sw>;
dvdd-supply = <&reg_dldo2>;
reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
backlight = <&backlight>;
};
};

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@ -1,49 +0,0 @@
Ilitek ILI9322 TFT panel driver with SPI control bus
This is a driver for 320x240 TFT panels, accepting a variety of input
streams that get adapted and scaled to the panel. The panel output has
960 TFT source driver pins and 240 TFT gate driver pins, VCOM, VCOML and
VCOMH outputs.
Required properties:
- compatible: "dlink,dir-685-panel", "ilitek,ili9322"
(full system-specific compatible is always required to look up configuration)
- reg: address of the panel on the SPI bus
Optional properties:
- vcc-supply: core voltage supply, see regulator/regulator.txt
- iovcc-supply: voltage supply for the interface input/output signals,
see regulator/regulator.txt
- vci-supply: voltage supply for analog parts, see regulator/regulator.txt
- reset-gpios: a GPIO spec for the reset pin, see gpio/gpio.txt
The following optional properties only apply to RGB and YUV input modes and
can be omitted for BT.656 input modes:
- pixelclk-active: see display/panel/display-timing.txt
- de-active: see display/panel/display-timing.txt
- hsync-active: see display/panel/display-timing.txt
- vsync-active: see display/panel/display-timing.txt
The panel must obey the rules for a SPI slave device as specified in
spi/spi-bus.txt
The device node can contain one 'port' child node with one child
'endpoint' node, according to the bindings defined in
media/video-interfaces.txt. This node should describe panel's video bus.
Example:
panel: display@0 {
compatible = "dlink,dir-685-panel", "ilitek,ili9322";
reg = <0>;
vcc-supply = <&vdisp>;
iovcc-supply = <&vdisp>;
vci-supply = <&vdisp>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};

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@ -0,0 +1,71 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/ilitek,ili9322.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ilitek ILI9322 TFT panel driver with SPI control bus
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
description: |
This is a driver for 320x240 TFT panels, accepting a variety of input
streams that get adapted and scaled to the panel. The panel output has
960 TFT source driver pins and 240 TFT gate driver pins, VCOM, VCOML and
VCOMH outputs.
The panel must obey the rules for a SPI slave device as specified in
spi/spi-controller.yaml
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
items:
- enum:
- dlink,dir-685-panel
- const: ilitek,ili9322
reset-gpios: true
port: true
vcc-supply:
description: Core voltage supply
iovcc-supply:
description: Voltage supply for the interface input/output signals
vci-supply:
description: Voltage supply for analog parts
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
panel: display@0 {
compatible = "dlink,dir-685-panel", "ilitek,ili9322";
reg = <0>;
vcc-supply = <&vdisp>;
iovcc-supply = <&vdisp>;
vci-supply = <&vdisp>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
};
...

View File

@ -1,20 +0,0 @@
Ilitek ILI9881c based MIPI-DSI panels
Required properties:
- compatible: must be "ilitek,ili9881c" and one of:
* "bananapi,lhr050h41"
- reg: DSI virtual channel used by that screen
- power-supply: phandle to the power regulator
- reset-gpios: a GPIO phandle for the reset pin
Optional properties:
- backlight: phandle to the backlight used
Example:
panel@0 {
compatible = "bananapi,lhr050h41", "ilitek,ili9881c";
reg = <0>;
power-supply = <&reg_display>;
reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
backlight = <&pwm_bl>;
};

View File

@ -0,0 +1,50 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/ilitek,ili9881c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ilitek ILI9881c based MIPI-DSI panels
maintainers:
- Maxime Ripard <mripard@kernel.org>
properties:
compatible:
items:
- enum:
- bananapi,lhr050h41
- const: ilitek,ili9881c
backlight: true
power-supply: true
reg: true
reset-gpios: true
required:
- compatible
- power-supply
- reg
- reset-gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "bananapi,lhr050h41", "ilitek,ili9881c";
reg = <0>;
power-supply = <&reg_display>;
reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
backlight = <&pwm_bl>;
};
};
...

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@ -1,24 +0,0 @@
Innolux P097PFG 9.7" 1536x2048 TFT LCD panel
Required properties:
- compatible: should be "innolux,p097pfg"
- reg: DSI virtual channel of the peripheral
- avdd-supply: phandle of the regulator that provides positive voltage
- avee-supply: phandle of the regulator that provides negative voltage
- enable-gpios: panel enable gpio
Optional properties:
- backlight: phandle of the backlight device attached to the panel
Example:
&mipi_dsi {
panel@0 {
compatible = "innolux,p079zca";
reg = <0>;
avdd-supply = <...>;
avee-supply = <...>;
backlight = <&backlight>;
enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
};

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@ -0,0 +1,56 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/innolux,p097pfg.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Innolux P097PFG 9.7" 1536x2048 TFT LCD panel
maintainers:
- Lin Huang <hl@rock-chips.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: innolux,p097pfg
backlight: true
enable-gpios: true
reg: true
avdd-supply:
description: The regulator that provides positive voltage
avee-supply:
description: The regulator that provides negative voltage
required:
- compatible
- reg
- avdd-supply
- avee-supply
- enable-gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "innolux,p097pfg";
reg = <0>;
avdd-supply = <&avdd>;
avee-supply = <&avee>;
backlight = <&backlight>;
enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
};
...

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@ -1,22 +0,0 @@
Innolux P120ZDG-BF1 12.02 inch eDP 2K display panel
This binding is compatible with the simple-panel binding, which is specified
in simple-panel.txt in this directory.
Required properties:
- compatible: should be "innolux,p120zdg-bf1"
- power-supply: regulator to provide the supply voltage
Optional properties:
- enable-gpios: GPIO pin to enable or disable the panel
- backlight: phandle of the backlight device attached to the panel
- no-hpd: If HPD isn't hooked up; add this property.
Example:
panel_edp: panel-edp {
compatible = "innolux,p120zdg-bf1";
enable-gpios = <&msmgpio 31 GPIO_ACTIVE_LOW>;
power-supply = <&pm8916_l2>;
backlight = <&backlight>;
no-hpd;
};

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@ -0,0 +1,43 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/innolux,p120zdg-bf1.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Innolux P120ZDG-BF1 12.02 inch eDP 2K display panel
maintainers:
- Sandeep Panda <spanda@codeaurora.org>
- Douglas Anderson <dianders@chromium.org>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: innolux,p120zdg-bf1
enable-gpios: true
power-supply: true
backlight: true
no-hpd: true
required:
- compatible
- power-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
panel_edp: panel-edp {
compatible = "innolux,p120zdg-bf1";
enable-gpios = <&msmgpio 31 GPIO_ACTIVE_LOW>;
power-supply = <&pm8916_l2>;
backlight = <&backlight>;
no-hpd;
};
...

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@ -1,31 +0,0 @@
JDI model LT070ME05000 1200x1920 7" DSI Panel
Required properties:
- compatible: should be "jdi,lt070me05000"
- vddp-supply: phandle of the regulator that provides the supply voltage
Power IC supply (3-5V)
- iovcc-supply: phandle of the regulator that provides the supply voltage
IOVCC , power supply for LCM (1.8V)
- enable-gpios: phandle of gpio for enable line
LED_EN, LED backlight enable, High active
- reset-gpios: phandle of gpio for reset line
This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names
XRES, Reset, Low active
- dcdc-en-gpios: phandle of the gpio for power ic line
Power IC supply enable, High active
Example:
dsi0: qcom,mdss_dsi@4700000 {
panel@0 {
compatible = "jdi,lt070me05000";
reg = <0>;
vddp-supply = <&pm8921_l17>;
iovcc-supply = <&pm8921_lvs7>;
enable-gpios = <&pm8921_gpio 36 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm_pinmux 54 GPIO_ACTIVE_LOW>;
dcdc-en-gpios = <&pm8921_gpio 23 GPIO_ACTIVE_HIGH>;
};
};

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@ -0,0 +1,69 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/jdi,lt070me05000.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: JDI model LT070ME05000 1200x1920 7" DSI Panel
maintainers:
- Vinay Simha BN <simhavcs@gmail.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: jdi,lt070me05000
enable-gpios: true
reg: true
reset-gpios: true
vddp-supply:
description: |
The regulator that provides the supply voltage Power IC supply (3-5V)
iovcc-supply:
description: |
The regulator that provides the supply voltage IOVCC,
power supply for LCM (1.8V)
dcdc-en-gpios:
description: |
phandle of the gpio for power ic line
Power IC supply enable, High active
required:
- compatible
- reg
- vddp-supply
- iovcc-supply
- enable-gpios
- reset-gpios
- dcdc-en-gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "jdi,lt070me05000";
reg = <0>;
vddp-supply = <&pm8921_l17>;
iovcc-supply = <&pm8921_lvs7>;
enable-gpios = <&pm8921_gpio 36 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm_pinmux 54 GPIO_ACTIVE_LOW>;
dcdc-en-gpios = <&pm8921_gpio 23 GPIO_ACTIVE_HIGH>;
};
};
...

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@ -1,42 +0,0 @@
King Display KD035G6-54NT 3.5" (320x240 pixels) 24-bit TFT LCD panel
Required properties:
- compatible: should be "kingdisplay,kd035g6-54nt"
- power-supply: See panel-common.txt
- reset-gpios: See panel-common.txt
Optional properties:
- backlight: see panel-common.txt
The generic bindings for the SPI slaves documented in [1] also apply.
The device node can contain one 'port' child node with one child
'endpoint' node, according to the bindings defined in [2]. This
node should describe panel's video bus.
[1]: Documentation/devicetree/bindings/spi/spi-bus.txt
[2]: Documentation/devicetree/bindings/graph.txt
Example:
&spi {
panel@0 {
compatible = "kingdisplay,kd035g6-54nt";
reg = <0>;
spi-max-frequency = <3125000>;
spi-3wire;
spi-cs-high;
reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>;
backlight = <&backlight>;
power-supply = <&ldo6>;
port {
panel_input: endpoint {
remote-endpoint = <&panel_output>;
};
};
};
};

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@ -0,0 +1,65 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/kingdisplay,kd035g6-54nt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: King Display KD035G6-54NT 3.5" (320x240 pixels) 24-bit TFT LCD panel
description: |
The panel must obey the rules for a SPI slave device as specified in
spi/spi-controller.yaml
maintainers:
- Paul Cercueil <paul@crapouillou.net>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: kingdisplay,kd035g6-54nt
backlight: true
port: true
power-supply: true
reg: true
reset-gpios: true
required:
- compatible
- power-supply
- reset-gpios
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "kingdisplay,kd035g6-54nt";
reg = <0>;
spi-max-frequency = <3125000>;
spi-3wire;
spi-cs-high;
reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>;
backlight = <&backlight>;
power-supply = <&ldo6>;
port {
panel_input: endpoint {
remote-endpoint = <&panel_output>;
};
};
};
};
...

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@ -1,22 +0,0 @@
Kingdisplay KD097D04 9.7" 1536x2048 TFT LCD panel
Required properties:
- compatible: should be "kingdisplay,kd097d04"
- reg: DSI virtual channel of the peripheral
- power-supply: phandle of the regulator that provides the supply voltage
- enable-gpios: panel enable gpio
Optional properties:
- backlight: phandle of the backlight device attached to the panel
Example:
&mipi_dsi {
panel@0 {
compatible = "kingdisplay,kd097d04";
reg = <0>;
power-supply = <...>;
backlight = <&backlight>;
enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
};

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@ -0,0 +1,51 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/leadtek,ltk050h3146w.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Leadtek LTK050H3146W 5.0in 720x1280 DSI panel
maintainers:
- Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
enum:
- leadtek,ltk050h3146w
- leadtek,ltk050h3146w-a2
reg: true
backlight: true
reset-gpios: true
iovcc-supply:
description: regulator that supplies the iovcc voltage
vci-supply:
description: regulator that supplies the vci voltage
required:
- compatible
- reg
- backlight
- iovcc-supply
- vci-supply
additionalProperties: false
examples:
- |
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "leadtek,ltk050h3146w";
reg = <0>;
backlight = <&backlight>;
iovcc-supply = <&vcc_1v8>;
vci-supply = <&vcc3v3_lcd>;
};
};
...

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@ -1,7 +0,0 @@
LG ACX467AKM-7 4.95" 1080×1920 LCD Panel
Required properties:
- compatible: must be "lg,acx467akm-7"
This binding is compatible with the simple-panel binding, which is specified
in simple-panel.txt in this directory.

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@ -1,7 +0,0 @@
LG Corporation 7" WXGA TFT LCD panel
Required properties:
- compatible: should be "lg,ld070wx3-sl01"
This binding is compatible with the simple-panel binding, which is specified
in simple-panel.txt in this directory.

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@ -1,19 +0,0 @@
LG LG4573 TFT Liquid Crystal Display with SPI control bus
Required properties:
- compatible: "lg,lg4573"
- reg: address of the panel on the SPI bus
The panel must obey rules for SPI slave device specified in document [1].
[1]: Documentation/devicetree/bindings/spi/spi-bus.txt
Example:
lcd_panel: display@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lg,lg4573";
spi-max-frequency = <10000000>;
reg = <0>;
};

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@ -0,0 +1,45 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/lg,lg4573.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: LG LG4573 TFT Liquid Crystal Display with SPI control bus
description: |
The panel must obey the rules for a SPI slave device as specified in
spi/spi-controller.yaml
maintainers:
- Heiko Schocher <hs@denx.de>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: lg,lg4573
reg: true
spi-max-frequency: true
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
lcd_panel: display@0 {
compatible = "lg,lg4573";
spi-max-frequency = <10000000>;
reg = <0>;
};
};
...

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@ -1,7 +0,0 @@
LG Corporation 5" HD TFT LCD panel
Required properties:
- compatible: should be "lg,lh500wx1-sd03"
This binding is compatible with the simple-panel binding, which is specified
in simple-panel.txt in this directory.

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@ -1,33 +0,0 @@
LG.Philips LB035Q02 Panel
=========================
Required properties:
- compatible: "lgphilips,lb035q02"
- enable-gpios: panel enable gpio
Optional properties:
- label: a symbolic name for the panel
Required nodes:
- Video port for DPI input
Example
-------
lcd-panel: panel@0 {
compatible = "lgphilips,lb035q02";
reg = <0>;
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
label = "lcd";
enable-gpios = <&gpio7 7 0>;
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};

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@ -0,0 +1,59 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/lgphilips,lb035q02.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: LG.Philips LB035Q02 Panel
description: |
The panel must obey the rules for a SPI slave device as specified in
spi/spi-controller.yaml
maintainers:
- Tomi Valkeinen <tomi.valkeinen@ti.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: lgphilips,lb035q02
label: true
enable-gpios: true
port: true
required:
- compatible
- enable-gpios
- port
unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
panel: panel@0 {
compatible = "lgphilips,lb035q02";
reg = <0>;
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
label = "lcd";
enable-gpios = <&gpio7 7 0>;
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};
};
...

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@ -1,42 +0,0 @@
Binding for Olimex Ltd. LCD-OLinuXino bridge panel.
This device can be used as bridge between a host controller and LCD panels.
Currently supported LCDs are:
- LCD-OLinuXino-4.3TS
- LCD-OLinuXino-5
- LCD-OLinuXino-7
- LCD-OLinuXino-10
The panel itself contains:
- AT24C16C EEPROM holding panel identification and timing requirements
- AR1021 resistive touch screen controller (optional)
- FT5x6 capacitive touch screnn controller (optional)
- GT911/GT928 capacitive touch screen controller (optional)
The above chips share same I2C bus. The EEPROM is factory preprogrammed with
device information (id, serial, etc.) and timing requirements.
Touchscreen bingings can be found in these files:
- input/touchscreen/goodix.txt
- input/touchscreen/edt-ft5x06.txt
- input/touchscreen/ar1021.txt
Required properties:
- compatible: should be "olimex,lcd-olinuxino"
- reg: address of the configuration EEPROM, should be <0x50>
- power-supply: phandle of the regulator that provides the supply voltage
Optional properties:
- enable-gpios: GPIO pin to enable or disable the panel
- backlight: phandle of the backlight device attacked to the panel
Example:
&i2c2 {
panel@50 {
compatible = "olimex,lcd-olinuxino";
reg = <0x50>;
power-supply = <&reg_vcc5v0>;
enable-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>;
backlight = <&backlight>;
};
};

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@ -0,0 +1,70 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/olimex,lcd-olinuxino.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Binding for Olimex Ltd. LCD-OLinuXino bridge panel.
maintainers:
- Stefan Mavrodiev <stefan@olimex.com>
description: |
This device can be used as bridge between a host controller and LCD panels.
Currently supported LCDs are:
- LCD-OLinuXino-4.3TS
- LCD-OLinuXino-5
- LCD-OLinuXino-7
- LCD-OLinuXino-10
The panel itself contains:
- AT24C16C EEPROM holding panel identification and timing requirements
- AR1021 resistive touch screen controller (optional)
- FT5x6 capacitive touch screnn controller (optional)
- GT911/GT928 capacitive touch screen controller (optional)
The above chips share same I2C bus. The EEPROM is factory preprogrammed with
device information (id, serial, etc.) and timing requirements.
Touchscreen bingings can be found in these files:
- input/touchscreen/goodix.yaml
- input/touchscreen/edt-ft5x06.txt
- input/touchscreen/ar1021.txt
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: olimex,lcd-olinuxino
backlight: true
enable-gpios: true
power-supply: true
reg: true
required:
- compatible
- reg
- power-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
panel@50 {
compatible = "olimex,lcd-olinuxino";
reg = <0x50>;
power-supply = <&reg_vcc5v0>;
enable-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>;
backlight = <&backlight>;
};
};
...

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@ -1,14 +0,0 @@
One Stop Displays OSD101T2587-53TS 10.1" 1920x1200 panel
The panel is similar to OSD101T2045-53TS, but it needs additional
MIPI_DSI_TURN_ON_PERIPHERAL message from the host.
Required properties:
- compatible: should be "osddisplays,osd101t2587-53ts"
- power-supply: as specified in the base binding
Optional properties:
- backlight: as specified in the base binding
This binding is compatible with the simple-panel binding, which is specified
in simple-panel.txt in this directory.

View File

@ -63,9 +63,9 @@ properties:
display-timings:
description:
Some display panels supports several resolutions with different timing.
Some display panels support several resolutions with different timings.
The display-timings bindings supports specifying several timings and
optional specify which is the native mode.
optionally specifying which is the native mode.
allOf:
- $ref: display-timings.yaml#
@ -96,6 +96,12 @@ properties:
(hot plug detect) signal, but the signal isn't hooked up so we should
hardcode the max delay from the panel spec when powering up the panel.
hpd-gpios:
maxItems: 1
description:
If Hot Plug Detect (HPD) is connected to a GPIO in the system rather
than a dedicated HPD pin the pin can be specified here.
# Control I/Os
# Many display panels can be controlled through pins driven by GPIOs. The nature
@ -124,6 +130,13 @@ properties:
while active. Active high reset signals can be supported by inverting the
GPIO specifier polarity flag.
te-gpios:
maxItems: 1
description:
GPIO spec for the tearing effect synchronization signal.
The tearing effect signal is active high. Active low signals can be
supported by inverting the GPIO specifier polarity flag.
# Power
power-supply:
description:

View File

@ -29,6 +29,20 @@ properties:
# compatible must be listed in alphabetical order, ordered by compatible.
# The description in the comment is mandatory for each compatible.
# AU Optronics Corporation 8.0" WUXGA TFT LCD panel
- auo,b080uan01
# Boe Corporation 8.0" WUXGA TFT LCD panel
- boe,tv080wum-nl0
# Kingdisplay KD097D04 9.7" 1536x2048 TFT LCD panel
- kingdisplay,kd097d04
# LG ACX467AKM-7 4.95" 1080×1920 LCD Panel
- lg,acx467akm-7
# LG Corporation 7" WXGA TFT LCD panel
- lg,ld070wx3-sl01
# One Stop Displays OSD101T2587-53TS 10.1" 1920x1200 panel
- osddisplays,osd101t2587-53ts
# Panasonic 10" WUXGA TFT LCD panel
- panasonic,vvx10f004b00
# Panasonic 10" WUXGA TFT LCD panel
- panasonic,vvx10f034n00

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@ -33,8 +33,6 @@ properties:
- ampire,am-480272h3tmqw-t01h
# Ampire AM-800480R3TMQW-A1H 7.0" WVGA TFT LCD panel
- ampire,am800480r3tmqwa1h
# AU Optronics Corporation 8.0" WUXGA TFT LCD panel
- auo,b080uan01
# AU Optronics Corporation 10.1" WSVGA TFT LCD panel
- auo,b101aw03
# AU Optronics Corporation 10.1" WSVGA TFT LCD panel
@ -55,10 +53,16 @@ properties:
- auo,g101evn010
# AU Optronics Corporation 10.4" (800x600) color TFT LCD panel
- auo,g104sn02
# AU Optronics Corporation 12.1" (1280x800) TFT LCD panel
- auo,g121ean01
# AU Optronics Corporation 13.3" FHD (1920x1080) TFT LCD panel
- auo,g133han01
# AU Optronics Corporation 15.6" (1366x768) TFT LCD panel
- auo,g156xtn01
# AU Optronics Corporation 18.5" FHD (1920x1080) TFT LCD panel
- auo,g185han01
# AU Optronics Corporation 19.0" (1280x1024) TFT LCD panel
- auo,g190ean01
# AU Optronics Corporation 31.5" FHD (1920x1080) TFT LCD panel
- auo,p320hvn03
# AU Optronics Corporation 21.5" FHD (1920x1080) color TFT LCD panel
@ -69,10 +73,12 @@ properties:
- boe,hv070wsa-100
# BOE OPTOELECTRONICS TECHNOLOGY 10.1" WXGA TFT LCD panel
- boe,nv101wxmn51
# BOE NV133FHM-N61 13.3" FHD (1920x1080) TFT LCD Panel
- boe,nv133fhm-n61
# BOE NV133FHM-N62 13.3" FHD (1920x1080) TFT LCD Panel
- boe,nv133fhm-n62
# BOE NV140FHM-N49 14.0" FHD a-Si FT panel
- boe,nv140fhmn49
# Boe Corporation 8.0" WUXGA TFT LCD panel
- boe,tv080wum-nl0
# CDTech(H.K.) Electronics Limited 4.3" 480x272 color TFT-LCD panel
- cdtech,s043wq26h-ct7
# CDTech(H.K.) Electronics Limited 7" 800x480 color TFT-LCD panel
@ -82,6 +88,8 @@ properties:
# Chunghwa Picture Tubes Ltd. 10.1" WXGA TFT LCD panel
- chunghwa,claa101wa01a
# Chunghwa Picture Tubes Ltd. 10.1" WXGA TFT LCD panel
- chunghwa,claa101wb01
# Chunghwa Picture Tubes Ltd. 10.1" WXGA TFT LCD panel
- chunghwa,claa101wb03
# DataImage, Inc. 7" WVGA (800x480) TFT LCD panel with 24-bit parallel interface.
- dataimage,scf0700c48ggu18
@ -127,6 +135,8 @@ properties:
- hannstar,hsd100pxn1
# Hitachi Ltd. Corporation 9" WVGA (800x480) TFT LCD panel
- hit,tx23d38vm0caa
# InfoVision Optoelectronics M133NWF4 R0 13.3" FHD (1920x1080) TFT LCD panel
- ivo,m133nwf4-r0
# Innolux AT043TN24 4.3" WQVGA TFT LCD panel
- innolux,at043tn24
# Innolux AT070TN92 7.0" WQVGA TFT LCD panel
@ -155,6 +165,8 @@ properties:
- lemaker,bl035-rgb-002
# LG 7" (800x480 pixels) TFT LCD panel
- lg,lb070wv8
# LG Corporation 5" HD TFT LCD panel
- lg,lh500wx1-sd03
# LG LP079QX1-SP0V 7.9" (1536x2048 pixels) TFT LCD panel
- lg,lp079qx1-sp0v
# LG 9.7" (2048x1536 pixels) TFT LCD panel
@ -227,6 +239,8 @@ properties:
- sharp,ls020b1dd01d
# Shelly SCA07010-BFN-LNN 7.0" WVGA TFT LCD panel
- shelly,sca07010-bfn-lnn
# Starry KR070PE2T 7" WVGA TFT LCD panel
- starry,kr070pe2t
# Starry 12.2" (1920x1200 pixels) TFT LCD panel
- starry,kr122ea0sra
# Tianma Micro-electronics TM070JDHG30 7.0" WXGA TFT LCD panel

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@ -1,41 +0,0 @@
Raydium RM67171 OLED LCD panel with MIPI-DSI protocol
Required properties:
- compatible: "raydium,rm67191"
- reg: virtual channel for MIPI-DSI protocol
must be <0>
- dsi-lanes: number of DSI lanes to be used
must be <3> or <4>
- port: input port node with endpoint definition as
defined in Documentation/devicetree/bindings/graph.txt;
the input port should be connected to a MIPI-DSI device
driver
Optional properties:
- reset-gpios: a GPIO spec for the RST_B GPIO pin
- v3p3-supply: phandle to 3.3V regulator that powers the VDD_3V3 pin
- v1p8-supply: phandle to 1.8V regulator that powers the VDD_1V8 pin
- width-mm: see panel-common.txt
- height-mm: see panel-common.txt
- video-mode: 0 - burst-mode
1 - non-burst with sync event
2 - non-burst with sync pulse
Example:
panel@0 {
compatible = "raydium,rm67191";
reg = <0>;
pinctrl-0 = <&pinctrl_mipi_dsi_0_1_en>;
pinctrl-names = "default";
reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
dsi-lanes = <4>;
width-mm = <68>;
height-mm = <121>;
port {
panel_in: endpoint {
remote-endpoint = <&mipi_out>;
};
};
};

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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/raydium,rm67191.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Raydium RM67171 OLED LCD panel with MIPI-DSI protocol
maintainers:
- Robert Chiras <robert.chiras@nxp.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: raydium,rm67191
reg: true
port: true
reset-gpios: true
width-mm: true
height-mm: true
dsi-lanes:
description: Number of DSI lanes to be used must be <3> or <4>
enum: [3, 4]
v3p3-supply:
description: phandle to 3.3V regulator that powers the VDD_3V3 pin
v1p8-supply:
description: phandle to 1.8V regulator that powers the VDD_1V8 pin
video-mode:
description: |
0 - burst-mode
1 - non-burst with sync event
2 - non-burst with sync pulse
enum: [0, 1, 2]
required:
- compatible
- reg
- dsi-lanes
- port
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "raydium,rm67191";
reg = <0>;
reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
dsi-lanes = <4>;
width-mm = <68>;
height-mm = <121>;
video-mode = <1>;
port {
panel_in: endpoint {
remote-endpoint = <&mipi_out>;
};
};
};
};
...

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@ -0,0 +1,65 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/samsung,amoled-mipi-dsi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung AMOLED MIPI-DSI panels
maintainers:
- Hoegeun Kwon <hoegeun.kwon@samsung.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
enum:
# Samsung S6E63J0X03 1.63" 320x320 AMOLED panel
- samsung,s6e63j0x03
# Samsung S6E3HA2 5.7" 1440x2560 AMOLED panel
- samsung,s6e3ha2
# Samsung S6E3HF2 5.65" 1600x2560 AMOLED panel
- samsung,s6e3hf2
reg: true
reset-gpios: true
enable-gpios: true
te-gpios: true
vdd3-supply:
description: I/O voltage supply
vci-supply:
description: voltage supply for analog circuits
required:
- compatible
- reg
- vdd3-supply
- vci-supply
- reset-gpios
- enable-gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "samsung,s6e3ha2";
reg = <0>;
vdd3-supply = <&ldo27_reg>;
vci-supply = <&ldo28_reg>;
reset-gpios = <&gpg0 0 GPIO_ACTIVE_LOW>;
enable-gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>;
te-gpios = <&gpf1 3 GPIO_ACTIVE_HIGH>;
};
};
...

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@ -1,66 +0,0 @@
Samsung LD9040 AMOLED LCD parallel RGB panel with SPI control bus
Required properties:
- compatible: "samsung,ld9040"
- reg: address of the panel on SPI bus
- vdd3-supply: core voltage supply
- vci-supply: voltage supply for analog circuits
- reset-gpios: a GPIO spec for the reset pin
- display-timings: timings for the connected panel according to [1]
The panel must obey rules for SPI slave device specified in document [2].
Optional properties:
- power-on-delay: delay after turning regulators on [ms]
- reset-delay: delay after reset sequence [ms]
- panel-width-mm: physical panel width [mm]
- panel-height-mm: physical panel height [mm]
The device node can contain one 'port' child node with one child
'endpoint' node, according to the bindings defined in [3]. This
node should describe panel's video bus.
[1]: Documentation/devicetree/bindings/display/panel/display-timing.txt
[2]: Documentation/devicetree/bindings/spi/spi-bus.txt
[3]: Documentation/devicetree/bindings/media/video-interfaces.txt
Example:
lcd@0 {
compatible = "samsung,ld9040";
reg = <0>;
vdd3-supply = <&ldo7_reg>;
vci-supply = <&ldo17_reg>;
reset-gpios = <&gpy4 5 0>;
spi-max-frequency = <1200000>;
spi-cpol;
spi-cpha;
power-on-delay = <10>;
reset-delay = <10>;
panel-width-mm = <90>;
panel-height-mm = <154>;
display-timings {
timing {
clock-frequency = <23492370>;
hactive = <480>;
vactive = <800>;
hback-porch = <16>;
hfront-porch = <16>;
vback-porch = <2>;
vfront-porch = <28>;
hsync-len = <2>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
port {
lcd_ep: endpoint {
remote-endpoint = <&fimd_dpi_ep>;
};
};
};

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@ -0,0 +1,107 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/samsung,ld9040.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung LD9040 AMOLED LCD parallel RGB panel with SPI control bus
description: |
The panel must obey the rules for a SPI slave device as specified in
spi/spi-controller.yaml
maintainers:
- Andrzej Hajda <a.hajda@samsung.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: samsung,ld9040
display-timings: true
port: true
reg: true
reset-gpios: true
vdd3-supply:
description: core voltage supply
vci-supply:
description: voltage supply for analog circuits
power-on-delay:
$ref: /schemas/types.yaml#/definitions/uint32
description: delay after turning regulators on [ms]
reset-delay:
$ref: /schemas/types.yaml#/definitions/uint32
description: delay after reset sequence [ms]
panel-width-mm:
description: physical panel width [mm]
panel-height-mm:
description: physical panel height [mm]
required:
- compatible
- reg
- vdd3-supply
- vci-supply
- reset-gpios
- display-timings
unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
lcd@0 {
compatible = "samsung,ld9040";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
vdd3-supply = <&ldo7_reg>;
vci-supply = <&ldo17_reg>;
reset-gpios = <&gpy4 5 0>;
spi-max-frequency = <1200000>;
spi-cpol;
spi-cpha;
power-on-delay = <10>;
reset-delay = <10>;
panel-width-mm = <90>;
panel-height-mm = <154>;
display-timings {
timing {
clock-frequency = <23492370>;
hactive = <480>;
vactive = <800>;
hback-porch = <16>;
hfront-porch = <16>;
vback-porch = <2>;
vfront-porch = <28>;
hsync-len = <2>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
port {
lcd_ep: endpoint {
remote-endpoint = <&fimd_dpi_ep>;
};
};
};
};
...

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@ -1,30 +0,0 @@
Samsung S6D16D0 4" 864x480 AMOLED panel
Required properties:
- compatible: should be:
"samsung,s6d16d0",
- reg: the virtual channel number of a DSI peripheral
- vdd1-supply: I/O voltage supply
- reset-gpios: a GPIO spec for the reset pin (active low)
The device node can contain one 'port' child node with one child
'endpoint' node, according to the bindings defined in
media/video-interfaces.txt. This node should describe panel's video bus.
Example:
&dsi {
...
panel@0 {
compatible = "samsung,s6d16d0";
reg = <0>;
vdd1-supply = <&foo>;
reset-gpios = <&foo_gpio 0 GPIO_ACTIVE_LOW>;
port {
panel_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
};
};

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@ -0,0 +1,56 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/samsung,s6d16d0.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung S6D16D0 4" 864x480 AMOLED panel
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: samsung,s6d16d0
port: true
reg: true
reset-gpios: true
vdd1-supply:
description: I/O voltage supply
required:
- compatible
- reg
- vdd1-supply
- reset-gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "samsung,s6d16d0";
reg = <0>;
vdd1-supply = <&foo>;
reset-gpios = <&foo_gpio 0 GPIO_ACTIVE_LOW>;
port {
panel_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
};
};
...

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@ -1,31 +0,0 @@
Samsung S6E3HA2 5.7" 1440x2560 AMOLED panel
Samsung S6E3HF2 5.65" 1600x2560 AMOLED panel
Required properties:
- compatible: should be one of:
"samsung,s6e3ha2",
"samsung,s6e3hf2".
- reg: the virtual channel number of a DSI peripheral
- vdd3-supply: I/O voltage supply
- vci-supply: voltage supply for analog circuits
- reset-gpios: a GPIO spec for the reset pin (active low)
- enable-gpios: a GPIO spec for the panel enable pin (active high)
Optional properties:
- te-gpios: a GPIO spec for the tearing effect synchronization signal
gpio pin (active high)
Example:
&dsi {
...
panel@0 {
compatible = "samsung,s6e3ha2";
reg = <0>;
vdd3-supply = <&ldo27_reg>;
vci-supply = <&ldo28_reg>;
reset-gpios = <&gpg0 0 GPIO_ACTIVE_LOW>;
enable-gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>;
te-gpios = <&gpf1 3 GPIO_ACTIVE_HIGH>;
};
};

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@ -1,24 +0,0 @@
Samsung S6E63J0X03 1.63" 320x320 AMOLED panel (interface: MIPI-DSI command mode)
Required properties:
- compatible: "samsung,s6e63j0x03"
- reg: the virtual channel number of a DSI peripheral
- vdd3-supply: I/O voltage supply
- vci-supply: voltage supply for analog circuits
- reset-gpios: a GPIO spec for the reset pin (active low)
- te-gpios: a GPIO spec for the tearing effect synchronization signal
gpio pin (active high)
Example:
&dsi {
...
panel@0 {
compatible = "samsung,s6e63j0x03";
reg = <0>;
vdd3-supply = <&ldo16_reg>;
vci-supply = <&ldo20_reg>;
reset-gpios = <&gpe0 1 GPIO_ACTIVE_LOW>;
te-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
};
};

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@ -1,33 +0,0 @@
Samsung s6e63m0 AMOLED LCD panel
Required properties:
- compatible: "samsung,s6e63m0"
- reset-gpios: GPIO spec for reset pin
- vdd3-supply: VDD regulator
- vci-supply: VCI regulator
The panel must obey rules for SPI slave device specified in document [1].
The device node can contain one 'port' child node with one child
'endpoint' node, according to the bindings defined in [2]. This
node should describe panel's video bus.
[1]: Documentation/devicetree/bindings/spi/spi-bus.txt
[2]: Documentation/devicetree/bindings/media/video-interfaces.txt
Example:
s6e63m0: display@0 {
compatible = "samsung,s6e63m0";
reg = <0>;
reset-gpio = <&mp05 5 1>;
vdd3-supply = <&ldo12_reg>;
vci-supply = <&ldo11_reg>;
spi-max-frequency = <1200000>;
port {
lcd_ep: endpoint {
remote-endpoint = <&fimd_ep>;
};
};
};

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@ -0,0 +1,60 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/samsung,s6e63m0.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung s6e63m0 AMOLED LCD panel
maintainers:
- Jonathan Bakker <xc-racer2@live.ca>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: samsung,s6e63m0
reg: true
reset-gpios: true
port: true
vdd3-supply:
description: VDD regulator
vci-supply:
description: VCI regulator
required:
- compatible
- reset-gpios
- vdd3-supply
- vci-supply
- port
unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
display@0 {
compatible = "samsung,s6e63m0";
reg = <0>;
reset-gpios = <&mp05 5 1>;
vdd3-supply = <&ldo12_reg>;
vci-supply = <&ldo11_reg>;
spi-max-frequency = <1200000>;
port {
lcd_ep: endpoint {
remote-endpoint = <&fimd_ep>;
};
};
};
};
...

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@ -1,23 +0,0 @@
Seiko Instruments Inc. 4.3" WVGA (800 x RGB x 480) TFT with Touch-Panel
Required properties:
- compatible: should be "sii,43wvf1g".
- "dvdd-supply": 3v3 digital regulator.
- "avdd-supply": 5v analog regulator.
Optional properties:
- backlight: phandle for the backlight control.
Example:
panel {
compatible = "sii,43wvf1g";
backlight = <&backlight_display>;
dvdd-supply = <&reg_lcd_3v3>;
avdd-supply = <&reg_lcd_5v>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};

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@ -0,0 +1,50 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/seiko,43wvf1g.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Seiko Instruments Inc. 4.3" WVGA (800 x RGB x 480) TFT with Touch-Panel
maintainers:
- Marco Franchi <marco.franchi@nxp.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: sii,43wvf1g
backlight: true
port: true
dvdd-supply:
description: 3v3 digital regulator
avdd-supply:
description: 5v analog regulator
required:
- compatible
- dvdd-supply
- avdd-supply
additionalProperties: false
examples:
- |
panel {
compatible = "sii,43wvf1g";
backlight = <&backlight_display>;
dvdd-supply = <&reg_lcd_3v3>;
avdd-supply = <&reg_lcd_5v>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
...

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@ -1,36 +0,0 @@
Sharp 15" LQ150X1LG11 XGA TFT LCD panel
Required properties:
- compatible: should be "sharp,lq150x1lg11"
- power-supply: regulator to provide the VCC supply voltage (3.3 volts)
Optional properties:
- backlight: phandle of the backlight device
- rlud-gpios: a single GPIO for the RL/UD (rotate 180 degrees) pin.
- sellvds-gpios: a single GPIO for the SELLVDS pin.
If rlud-gpios and/or sellvds-gpios are not specified, the RL/UD and/or SELLVDS
pins are assumed to be handled appropriately by the hardware.
Example:
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm 0 100000>; /* VBR */
brightness-levels = <0 20 40 60 80 100>;
default-brightness-level = <2>;
power-supply = <&vdd_12v_reg>; /* VDD */
enable-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; /* XSTABY */
};
panel {
compatible = "sharp,lq150x1lg11";
power-supply = <&vcc_3v3_reg>; /* VCC */
backlight = <&backlight>;
rlud-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; /* RL/UD */
sellvds-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; /* SELLVDS */
};

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@ -0,0 +1,58 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sharp,lq150x1lg11.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Sharp 15" LQ150X1LG11 XGA TFT LCD panel
maintainers:
- Peter Rosin <peda@axentia.se>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: sharp,lq150x1lg11
power-supply: true
backlight: true
rlud-gpios:
maxItems: 1
description: |
GPIO for the RL/UD (rotate 180 degrees) pin.
If rlud-gpios and/or sellvds-gpios are not specified,
the RL/UD and/or SELLVDS pins are assumed to be handled
appropriately by the hardware.
sellvds-gpios:
maxItems: 1
description: |
GPIO for the SELLVDS pin.
If rlud-gpios and/or sellvds-gpios are not specified,
the RL/UD and/or SELLVDS pins are assumed to be handled
appropriately by the hardware.
required:
- compatible
- power-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
panel {
compatible = "sharp,lq150x1lg11";
power-supply = <&vcc_3v3_reg>; /* VCC */
backlight = <&backlight>;
rlud-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; /* RL/UD */
sellvds-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; /* SELLVDS */
};
...

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@ -1,43 +0,0 @@
SHARP LS037V7DW01 TFT-LCD panel
===================================
Required properties:
- compatible: "sharp,ls037v7dw01"
Optional properties:
- label: a symbolic name for the panel
- enable-gpios: a GPIO spec for the optional enable pin.
This pin is the INI pin as specified in the LS037V7DW01.pdf file.
- reset-gpios: a GPIO spec for the optional reset pin.
This pin is the RESB pin as specified in the LS037V7DW01.pdf file.
- mode-gpios: a GPIO
ordered MO, LR, and UD as specified in the LS037V7DW01.pdf file.
Required nodes:
- Video port for DPI input
This panel can have zero to five GPIOs to configure to change configuration
between QVGA and VGA mode and the scan direction. As these pins can be also
configured with external pulls, all the GPIOs are considered optional with holes
in the array.
Example
-------
Example when connected to a omap2+ based device:
lcd0: display {
compatible = "sharp,ls037v7dw01";
power-supply = <&lcd_3v3>;
enable-gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>; /* gpio152, lcd INI */
reset-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd RESB */
mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH /* gpio154, lcd MO */
&gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
&gpio1 3 GPIO_ACTIVE_HIGH>; /* gpio3, lcd UD */
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};

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@ -0,0 +1,68 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sharp,ls037v7dw01.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: SHARP LS037V7DW01 TFT-LCD panel
description: |
This panel can have zero to five GPIOs to configure to change configuration
between QVGA and VGA mode and the scan direction. As these pins can be also
configured with external pulls, all the GPIOs are considered optional with holes
in the array.
maintainers:
- Tony Lindgren <tony@atomide.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: sharp,ls037v7dw01
label: true
enable-gpios: true
reset-gpios: true
port: true
power-supply: true
mode-gpios:
minItems: 1
maxItems: 3
description: |
GPIO ordered MO, LR, and UD as specified in LS037V7DW01.pdf
This panel can have zero to three GPIOs to configure to
change configuration between QVGA and VGA mode and the
scan direction. As these pins can be also configured
with external pulls, all the GPIOs are considered
optional with holes in the array.
required:
- compatible
- port
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
lcd0: display {
compatible = "sharp,ls037v7dw01";
power-supply = <&lcd_3v3>;
enable-gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>; /* gpio152, lcd INI */
reset-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd RESB */
mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH /* gpio154, lcd MO */
&gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
&gpio1 3 GPIO_ACTIVE_HIGH>; /* gpio3, lcd UD */
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};
...

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@ -1,22 +0,0 @@
Sharp Microelectronics 4.3" qHD TFT LCD panel
Required properties:
- compatible: should be "sharp,ls043t1le01-qhd"
- reg: DSI virtual channel of the peripheral
- power-supply: phandle of the regulator that provides the supply voltage
Optional properties:
- backlight: phandle of the backlight device attached to the panel
- reset-gpios: a GPIO spec for the reset pin
Example:
mdss_dsi@fd922800 {
panel@0 {
compatible = "sharp,ls043t1le01-qhd";
reg = <0>;
avdd-supply = <&pm8941_l22>;
backlight = <&pm8941_wled>;
reset-gpios = <&pm8941_gpios 19 GPIO_ACTIVE_HIGH>;
};
};

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@ -0,0 +1,51 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sharp,ls043t1le01.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Sharp Microelectronics 4.3" qHD TFT LCD panel
maintainers:
- Werner Johansson <werner.johansson@sonymobile.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: sharp,ls043t1le01-qhd
reg: true
backlight: true
reset-gpios: true
port: true
avdd-supply:
description: handle of the regulator that provides the supply voltage
required:
- compatible
- reg
- avdd-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "sharp,ls043t1le01-qhd";
reg = <0>;
avdd-supply = <&pm8941_l22>;
backlight = <&pm8941_wled>;
reset-gpios = <&pm8941_gpios 19 GPIO_ACTIVE_HIGH>;
};
};
...

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@ -1 +0,0 @@
See panel-common.yaml in this directory.

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@ -1,30 +0,0 @@
Sitronix ST7701 based LCD panels
ST7701 designed for small and medium sizes of TFT LCD display, is
capable of supporting up to 480RGBX864 in resolution. It provides
several system interfaces like MIPI/RGB/SPI.
Techstar TS8550B is 480x854, 2-lane MIPI DSI LCD panel which has
inbuilt ST7701 chip.
Required properties:
- compatible: must be "sitronix,st7701" and one of
* "techstar,ts8550b"
- reset-gpios: a GPIO phandle for the reset pin
Required properties for techstar,ts8550b:
- reg: DSI virtual channel used by that screen
- VCC-supply: analog regulator for MIPI circuit
- IOVCC-supply: I/O system regulator
Optional properties:
- backlight: phandle for the backlight control.
panel@0 {
compatible = "techstar,ts8550b", "sitronix,st7701";
reg = <0>;
VCC-supply = <&reg_dldo2>;
IOVCC-supply = <&reg_dldo2>;
reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
backlight = <&backlight>;
};

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@ -0,0 +1,69 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sitronix,st7701.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Sitronix ST7701 based LCD panels
maintainers:
- Jagan Teki <jagan@amarulasolutions.com>
description: |
ST7701 designed for small and medium sizes of TFT LCD display, is
capable of supporting up to 480RGBX864 in resolution. It provides
several system interfaces like MIPI/RGB/SPI.
Techstar TS8550B is 480x854, 2-lane MIPI DSI LCD panel which has
inbuilt ST7701 chip.
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
items:
- enum:
- techstar,ts8550b
- const: sitronix,st7701
reg:
description: DSI virtual channel used by that screen
maxItems: 1
VCC-supply:
description: analog regulator for MIPI circuit
IOVCC-supply:
description: I/O system regulator
reset-gpios: true
backlight: true
required:
- compatible
- reg
- VCC-supply
- IOVCC-supply
- reset-gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "techstar,ts8550b", "sitronix,st7701";
reg = <0>;
VCC-supply = <&reg_dldo2>;
IOVCC-supply = <&reg_dldo2>;
reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
backlight = <&backlight>;
};
};

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@ -1,37 +0,0 @@
Sitronix ST7789V RGB panel with SPI control bus
Required properties:
- compatible: "sitronix,st7789v"
- reg: Chip select of the panel on the SPI bus
- reset-gpios: a GPIO phandle for the reset pin
- power-supply: phandle of the regulator that provides the supply voltage
Optional properties:
- backlight: phandle to the backlight used
The generic bindings for the SPI slaves documented in [1] also applies
The device node can contain one 'port' child node with one child
'endpoint' node, according to the bindings defined in [2]. This
node should describe panel's video bus.
[1]: Documentation/devicetree/bindings/spi/spi-bus.txt
[2]: Documentation/devicetree/bindings/graph.txt
Example:
panel@0 {
compatible = "sitronix,st7789v";
reg = <0>;
reset-gpios = <&pio 6 11 GPIO_ACTIVE_LOW>;
backlight = <&pwm_bl>;
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
port {
panel_input: endpoint {
remote-endpoint = <&tcon0_out_panel>;
};
};
};

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@ -0,0 +1,63 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sitronix,st7789v.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Sitronix ST7789V RGB panel with SPI control bus
description: |
The panel must obey the rules for a SPI slave device as specified in
spi/spi-controller.yaml
maintainers:
- Maxime Ripard <mripard@kernel.org>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: sitronix,st7789v
reg: true
reset-gpios: true
power-supply: true
backlight: true
port: true
required:
- compatible
- reg
- reset-gpios
- power-supply
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "sitronix,st7789v";
reg = <0>;
reset-gpios = <&pio 6 11 GPIO_ACTIVE_LOW>;
backlight = <&pwm_bl>;
power-supply = <&power>;
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
port {
panel_input: endpoint {
remote-endpoint = <&tcon0_out_panel>;
};
};
};
};
...

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@ -1,30 +0,0 @@
Sony ACX565AKM SDI Panel
========================
Required properties:
- compatible: "sony,acx565akm"
Optional properties:
- label: a symbolic name for the panel
- reset-gpios: panel reset gpio
Required nodes:
- Video port for SDI input
Example
-------
acx565akm@2 {
compatible = "sony,acx565akm";
spi-max-frequency = <6000000>;
reg = <2>;
label = "lcd";
reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
port {
lcd_in: endpoint {
remote-endpoint = <&sdi_out>;
};
};
};

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@ -0,0 +1,57 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sony,acx565akm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Sony ACX565AKM SDI Panel
description: |
The panel must obey the rules for a SPI slave device as specified in
spi/spi-controller.yaml
maintainers:
- Tomi Valkeinen <tomi.valkeinen@ti.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: sony,acx565akm
label: true
reset-gpios: true
port: true
required:
- compatible
- port
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
panel@2 {
compatible = "sony,acx565akm";
spi-max-frequency = <6000000>;
reg = <2>;
label = "lcd";
reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
port {
lcd_in: endpoint {
remote-endpoint = <&sdi_out>;
};
};
};
};
...

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@ -1,4 +0,0 @@
Startek Electronic Technology Co. KD050C 5.0" WVGA TFT LCD panel
Required properties:
- compatible: should be "startek,startek-kd050c"

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@ -0,0 +1,33 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/startek,startek-kd050c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Startek Electronic Technology Co. KD050C 5.0" WVGA TFT LCD panel
maintainers:
- Nikita Kiryanov <nikita@compulab.co.il>
allOf:
- $ref: panel-dpi.yaml#
properties:
compatible:
items:
- const: startek,startek-kd050c
- {} # panel-dpi, but not listed here to avoid false select
backlight: true
enable-gpios: true
height-mm: true
label: true
panel-timing: true
port: true
power-supply: true
reset-gpios: true
width-mm: true
additionalProperties: false
...

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@ -0,0 +1,65 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/tpo,td.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Toppoly TD Panels
description: |
The panel must obey the rules for a SPI slave device as specified in
spi/spi-controller.yaml
maintainers:
- Marek Belisko <marek@goldelico.com>
- H. Nikolaus Schaller <hns@goldelico.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
enum:
# Toppoly TD028TTEC1 Panel
- tpo,td028ttec1
# Toppoly TD043MTEA1 Panel
- tpo,td043mtea1
reg: true
label: true
reset-gpios: true
backlight: true
port: true
required:
- compatible
- port
unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
panel: panel@0 {
compatible = "tpo,td043mtea1";
reg = <0>;
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
label = "lcd";
reset-gpios = <&gpio7 7 0>;
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};
};
...

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@ -1,32 +0,0 @@
Toppoly TD028TTEC1 Panel
========================
Required properties:
- compatible: "tpo,td028ttec1"
Optional properties:
- label: a symbolic name for the panel
- backlight: phandle of the backlight device
Required nodes:
- Video port for DPI input
Example
-------
lcd-panel: td028ttec1@0 {
compatible = "tpo,td028ttec1";
reg = <0>;
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
label = "lcd";
backlight = <&backlight>;
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};

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@ -1,33 +0,0 @@
TPO TD043MTEA1 Panel
====================
Required properties:
- compatible: "tpo,td043mtea1"
- reset-gpios: panel reset gpio
Optional properties:
- label: a symbolic name for the panel
Required nodes:
- Video port for DPI input
Example
-------
lcd-panel: panel@0 {
compatible = "tpo,td043mtea1";
reg = <0>;
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
label = "lcd";
reset-gpios = <&gpio7 7 0>;
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};

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@ -0,0 +1,57 @@
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/visionox,rm69299.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Visionox model RM69299 Panels Device Tree Bindings.
maintainers:
- Harigovindan P <harigovi@codeaurora.org>
description: |
This binding is for display panels using a Visionox RM692999 panel.
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: visionox,rm69299-1080p-display
vdda-supply:
description: |
Phandle of the regulator that provides the vdda supply voltage.
vdd3p3-supply:
description: |
Phandle of the regulator that provides the vdd3p3 supply voltage.
port: true
reset-gpios: true
additionalProperties: false
required:
- compatible
- vdda-supply
- vdd3p3-supply
- reset-gpios
- port
examples:
- |
panel {
compatible = "visionox,rm69299-1080p-display";
vdda-supply = <&src_pp1800_l8c>;
vdd3p3-supply = <&src_pp2800_l18a>;
reset-gpios = <&pm6150l_gpio 3 0>;
port {
panel0_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
...

View File

@ -50,6 +50,14 @@ Required Properties:
VSP instance that serves the DU channel, and the channel index identifies
the LIF instance in that VSP.
Optional properties:
- resets: A list of phandle + reset-specifier pairs, one for each entry in
the reset-names property.
- reset-names: Names of the resets. This property is model-dependent.
- All but R8A7779 use one reset for a group of one or more successive
channels. The resets must be named "du.x" with "x" being the numerical
index of the lowest channel in the group.
Required nodes:
The connections to the DU output video ports are modeled using the OF graph
@ -96,6 +104,8 @@ Example: R8A7795 (R-Car H3) ES2.0 DU
<&cpg CPG_MOD 722>,
<&cpg CPG_MOD 721>;
clock-names = "du.0", "du.1", "du.2", "du.3";
resets = <&cpg 724>, <&cpg 722>;
reset-names = "du.0", "du.2";
renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;

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@ -1,72 +0,0 @@
Rockchip specific extensions for rk3066 HDMI
============================================
Required properties:
- compatible:
"rockchip,rk3066-hdmi";
- reg:
Physical base address and length of the controller's registers.
- clocks, clock-names:
Phandle to HDMI controller clock, name should be "hclk".
- interrupts:
HDMI interrupt number.
- power-domains:
Phandle to the RK3066_PD_VIO power domain.
- rockchip,grf:
This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.
- ports:
Contains one port node with two endpoints, numbered 0 and 1,
connected respectively to vop0 and vop1.
Contains one port node with one endpoint
connected to a hdmi-connector node.
- pinctrl-0, pinctrl-name:
Switch the iomux for the HPD/I2C pins to HDMI function.
Example:
hdmi: hdmi@10116000 {
compatible = "rockchip,rk3066-hdmi";
reg = <0x10116000 0x2000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HDMI>;
clock-names = "hclk";
power-domains = <&power RK3066_PD_VIO>;
rockchip,grf = <&grf>;
pinctrl-names = "default";
pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>;
ports {
#address-cells = <1>;
#size-cells = <0>;
hdmi_in: port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
hdmi_in_vop0: endpoint@0 {
reg = <0>;
remote-endpoint = <&vop0_out_hdmi>;
};
hdmi_in_vop1: endpoint@1 {
reg = <1>;
remote-endpoint = <&vop1_out_hdmi>;
};
};
hdmi_out: port@1 {
reg = <1>;
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
};
};
&pinctrl {
hdmi {
hdmi_hpd: hdmi-hpd {
rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>;
};
hdmii2c_xfer: hdmii2c-xfer {
rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>,
<0 RK_PA2 1 &pcfg_pull_none>;
};
};
};

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@ -0,0 +1,140 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip rk3066 HDMI controller
maintainers:
- Sandy Huang <hjc@rock-chips.com>
- Heiko Stuebner <heiko@sntech.de>
properties:
compatible:
const: rockchip,rk3066-hdmi
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-names:
const: hclk
pinctrl-0:
maxItems: 2
pinctrl-names:
const: default
description:
Switch the iomux for the HPD/I2C pins to HDMI function.
power-domains:
maxItems: 1
rockchip,grf:
$ref: /schemas/types.yaml#/definitions/phandle
description:
This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.
ports:
type: object
properties:
"#address-cells":
const: 1
"#size-cells":
const: 0
port@0:
type: object
description:
Port node with two endpoints, numbered 0 and 1,
connected respectively to vop0 and vop1.
port@1:
type: object
description:
Port node with one endpoint connected to a hdmi-connector node.
required:
- "#address-cells"
- "#size-cells"
- port@0
- port@1
additionalProperties: false
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- pinctrl-0
- pinctrl-names
- power-domains
- rockchip,grf
- ports
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/rk3066a-cru.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/power/rk3066-power.h>
hdmi: hdmi@10116000 {
compatible = "rockchip,rk3066-hdmi";
reg = <0x10116000 0x2000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HDMI>;
clock-names = "hclk";
pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>;
pinctrl-names = "default";
power-domains = <&power RK3066_PD_VIO>;
rockchip,grf = <&grf>;
ports {
#address-cells = <1>;
#size-cells = <0>;
hdmi_in: port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
hdmi_in_vop0: endpoint@0 {
reg = <0>;
remote-endpoint = <&vop0_out_hdmi>;
};
hdmi_in_vop1: endpoint@1 {
reg = <1>;
remote-endpoint = <&vop1_out_hdmi>;
};
};
hdmi_out: port@1 {
reg = <1>;
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
};
};
pinctrl {
hdmi {
hdmi_hpd: hdmi-hpd {
rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>;
};
hdmii2c_xfer: hdmii2c-xfer {
rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>,
<0 RK_PA2 1 &pcfg_pull_none>;
};
};
};

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@ -1,74 +0,0 @@
device-tree bindings for rockchip soc display controller (vop)
VOP (Visual Output Processor) is the Display Controller for the Rockchip
series of SoCs which transfers the image data from a video memory
buffer to an external LCD interface.
Required properties:
- compatible: value should be one of the following
"rockchip,rk3036-vop";
"rockchip,rk3126-vop";
"rockchip,px30-vop-lit";
"rockchip,px30-vop-big";
"rockchip,rk3066-vop";
"rockchip,rk3188-vop";
"rockchip,rk3288-vop";
"rockchip,rk3368-vop";
"rockchip,rk3366-vop";
"rockchip,rk3399-vop-big";
"rockchip,rk3399-vop-lit";
"rockchip,rk3228-vop";
"rockchip,rk3328-vop";
- reg: Must contain one entry corresponding to the base address and length
of the register space. Can optionally contain a second entry
corresponding to the CRTC gamma LUT address.
- interrupts: should contain a list of all VOP IP block interrupts in the
order: VSYNC, LCD_SYSTEM. The interrupt specifier
format depends on the interrupt controller used.
- clocks: must include clock specifiers corresponding to entries in the
clock-names property.
- clock-names: Must contain
aclk_vop: for ddr buffer transfer.
hclk_vop: for ahb bus to R/W the phy regs.
dclk_vop: pixel clock.
- resets: Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names: Must include the following entries:
- axi
- ahb
- dclk
- iommus: required a iommu node
- port: A port node with endpoint definitions as defined in
Documentation/devicetree/bindings/media/video-interfaces.txt.
Example:
SoC specific DT entry:
vopb: vopb@ff930000 {
compatible = "rockchip,rk3288-vop";
reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
reset-names = "axi", "ahb", "dclk";
iommus = <&vopb_mmu>;
vopb_out: port {
#address-cells = <1>;
#size-cells = <0>;
vopb_out_edp: endpoint@0 {
reg = <0>;
remote-endpoint=<&edp_in_vopb>;
};
vopb_out_hdmi: endpoint@1 {
reg = <1>;
remote-endpoint=<&hdmi_in_vopb>;
};
};
};

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@ -0,0 +1,134 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip SoC display controller (VOP)
description:
VOP (Video Output Processor) is the display controller for the Rockchip
series of SoCs which transfers the image data from a video memory
buffer to an external LCD interface.
maintainers:
- Sandy Huang <hjc@rock-chips.com>
- Heiko Stuebner <heiko@sntech.de>
properties:
compatible:
enum:
- rockchip,px30-vop-big
- rockchip,px30-vop-lit
- rockchip,rk3036-vop
- rockchip,rk3066-vop
- rockchip,rk3126-vop
- rockchip,rk3188-vop
- rockchip,rk3228-vop
- rockchip,rk3288-vop
- rockchip,rk3328-vop
- rockchip,rk3366-vop
- rockchip,rk3368-vop
- rockchip,rk3399-vop-big
- rockchip,rk3399-vop-lit
reg:
minItems: 1
items:
- description:
Must contain one entry corresponding to the base address and length
of the register space.
- description:
Can optionally contain a second entry corresponding to
the CRTC gamma LUT address.
interrupts:
maxItems: 1
description:
The VOP interrupt is shared by several interrupt sources, such as
frame start (VSYNC), line flag and other status interrupts.
clocks:
items:
- description: Clock for ddr buffer transfer.
- description: Pixel clock.
- description: Clock for the ahb bus to R/W the phy regs.
clock-names:
items:
- const: aclk_vop
- const: dclk_vop
- const: hclk_vop
resets:
maxItems: 3
reset-names:
items:
- const: axi
- const: ahb
- const: dclk
port:
type: object
description:
A port node with endpoint definitions as defined in
Documentation/devicetree/bindings/media/video-interfaces.txt.
assigned-clocks:
maxItems: 2
assigned-clock-rates:
maxItems: 2
iommus:
maxItems: 1
power-domains:
maxItems: 1
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- resets
- reset-names
- port
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/rk3288-cru.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/rk3288-power.h>
vopb: vopb@ff930000 {
compatible = "rockchip,rk3288-vop";
reg = <0x0 0xff930000 0x0 0x19c>,
<0x0 0xff931000 0x0 0x1000>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP0>,
<&cru DCLK_VOP0>,
<&cru HCLK_VOP0>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
power-domains = <&power RK3288_PD_VIO>;
resets = <&cru SRST_LCDC1_AXI>,
<&cru SRST_LCDC1_AHB>,
<&cru SRST_LCDC1_DCLK>;
reset-names = "axi", "ahb", "dclk";
iommus = <&vopb_mmu>;
vopb_out: port {
#address-cells = <1>;
#size-cells = <0>;
vopb_out_edp: endpoint@0 {
reg = <0>;
remote-endpoint=<&edp_in_vopb>;
};
vopb_out_hdmi: endpoint@1 {
reg = <1>;
remote-endpoint=<&hdmi_in_vopb>;
};
};
};

View File

@ -187,6 +187,8 @@ patternProperties:
description: ChipOne
"^chipspark,.*":
description: ChipSPARK
"^chrontel,.*":
description: Chrontel, Inc.
"^chrp,.*":
description: Common Hardware Reference Platform
"^chunghwa,.*":
@ -463,6 +465,8 @@ patternProperties:
description: Infineon Technologies
"^inforce,.*":
description: Inforce Computing
"^ivo,.*":
description: InfoVision Optoelectronics Kunshan Co. Ltd.
"^ingenic,.*":
description: Ingenic Semiconductor
"^innolux,.*":
@ -488,7 +492,7 @@ patternProperties:
"^issi,.*":
description: Integrated Silicon Solutions Inc.
"^ite,.*":
description: ITE Tech, Inc.
description: ITE Tech. Inc.
"^itead,.*":
description: ITEAD Intelligent Systems Co.Ltd
"^iwave,.*":
@ -1041,6 +1045,8 @@ patternProperties:
description: Tronsmart
"^truly,.*":
description: Truly Semiconductors Limited
"^visionox,.*":
description: Visionox
"^tsd,.*":
description: Theobroma Systems Design und Consulting GmbH
"^tyan,.*":

View File

@ -202,3 +202,91 @@ busy_percent
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
:doc: busy_percent
GPU Product Information
=======================
Information about the GPU can be obtained on certain cards
via sysfs
product_name
------------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
:doc: product_name
product_number
--------------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
:doc: product_name
serial_number
-------------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
:doc: serial_number
unique_id
---------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
:doc: unique_id
GPU Memory Usage Information
============================
Various memory accounting can be accessed via sysfs
mem_info_vram_total
-------------------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
:doc: mem_info_vram_total
mem_info_vram_used
------------------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
:doc: mem_info_vram_used
mem_info_vis_vram_total
-----------------------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
:doc: mem_info_vis_vram_total
mem_info_vis_vram_used
----------------------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
:doc: mem_info_vis_vram_used
mem_info_gtt_total
------------------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
:doc: mem_info_gtt_total
mem_info_gtt_used
-----------------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
:doc: mem_info_gtt_used
PCIe Accounting Information
===========================
pcie_bw
-------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
:doc: pcie_bw
pcie_replay_count
-----------------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
:doc: pcie_replay_count

View File

@ -132,6 +132,18 @@ be unmapped; on many devices, the ROM address decoder is shared with
other BARs, so leaving it mapped could cause undesired behaviour like
hangs or memory corruption.
Managed Resources
-----------------
.. kernel-doc:: drivers/gpu/drm/drm_managed.c
:doc: managed resources
.. kernel-doc:: drivers/gpu/drm/drm_managed.c
:export:
.. kernel-doc:: include/drm/drm_managed.h
:internal:
Bus-specific Device Registration and PCI Support
------------------------------------------------

View File

@ -3,7 +3,7 @@ Kernel Mode Setting (KMS)
=========================
Drivers must initialize the mode setting core by calling
drm_mode_config_init() on the DRM device. The function
drmm_mode_config_init() on the DRM device. The function
initializes the :c:type:`struct drm_device <drm_device>`
mode_config field and never fails. Once done, mode configuration must
be setup by initializing the following fields.
@ -397,6 +397,9 @@ Connector Functions Reference
Writeback Connectors
--------------------
.. kernel-doc:: include/drm/drm_writeback.h
:internal:
.. kernel-doc:: drivers/gpu/drm/drm_writeback.c
:doc: overview

View File

@ -373,15 +373,6 @@ GEM CMA Helper Functions Reference
.. kernel-doc:: drivers/gpu/drm/drm_gem_cma_helper.c
:export:
VRAM Helper Function Reference
==============================
.. kernel-doc:: drivers/gpu/drm/drm_vram_helper_common.c
:doc: overview
.. kernel-doc:: include/drm/drm_gem_vram_helper.h
:internal:
GEM VRAM Helper Functions Reference
-----------------------------------

View File

@ -329,6 +329,52 @@ for execution also include a list of all locations within buffers that
refer to GPU-addresses so that the kernel can edit the buffer correctly.
This process is dubbed relocation.
Locking Guidelines
------------------
.. note::
This is a description of how the locking should be after
refactoring is done. Does not necessarily reflect what the locking
looks like while WIP.
#. All locking rules and interface contracts with cross-driver interfaces
(dma-buf, dma_fence) need to be followed.
#. No struct_mutex anywhere in the code
#. dma_resv will be the outermost lock (when needed) and ww_acquire_ctx
is to be hoisted at highest level and passed down within i915_gem_ctx
in the call chain
#. While holding lru/memory manager (buddy, drm_mm, whatever) locks
system memory allocations are not allowed
* Enforce this by priming lockdep (with fs_reclaim). If we
allocate memory while holding these looks we get a rehash
of the shrinker vs. struct_mutex saga, and that would be
real bad.
#. Do not nest different lru/memory manager locks within each other.
Take them in turn to update memory allocations, relying on the objects
dma_resv ww_mutex to serialize against other operations.
#. The suggestion for lru/memory managers locks is that they are small
enough to be spinlocks.
#. All features need to come with exhaustive kernel selftests and/or
IGT tests when appropriate
#. All LMEM uAPI paths need to be fully restartable (_interruptible()
for all locks/waits/sleeps)
* Error handling validation through signal injection.
Still the best strategy we have for validating GEM uAPI
corner cases.
Must be excessively used in the IGT, and we need to check
that we really have full path coverage of all error cases.
* -EDEADLK handling with ww_mutex
GEM BO Management Implementation Details
----------------------------------------
@ -391,19 +437,19 @@ Global GTT views
GTT Fences and Swizzling
------------------------
.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_fence_reg.c
.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
:internal:
Global GTT Fence Handling
~~~~~~~~~~~~~~~~~~~~~~~~~
.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_fence_reg.c
.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
:doc: fence register handling
Hardware Tiling and Swizzling Details
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_fence_reg.c
.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
:doc: tiling swizzling details
Object Tiling IOCTLs

View File

@ -347,18 +347,6 @@ Contact: Sean Paul
Level: Starter
Remove drm_display_mode.hsync
-----------------------------
We have drm_mode_hsync() to calculate this from hsync_start/end, since drivers
shouldn't/don't use this, remove this member to avoid any temptations to use it
in the future. If there is any debug code using drm_display_mode.hsync, convert
it to use drm_mode_hsync() instead.
Contact: Sean Paul
Level: Starter
connector register/unregister fixes
-----------------------------------

View File

@ -5062,7 +5062,7 @@ F: drivers/dma-buf/
F: include/linux/*fence.h
F: include/linux/dma-buf*
F: include/linux/dma-resv.h
K: dma_(buf|fence|resv)
K: \bdma_(?:buf|fence|resv)\b
DMA GENERIC OFFLOAD ENGINE SUBSYSTEM
M: Vinod Koul <vkoul@kernel.org>
@ -5274,7 +5274,7 @@ DRM DRIVER FOR ARM VERSATILE TFT PANELS
M: Linus Walleij <linus.walleij@linaro.org>
S: Maintained
T: git git://anongit.freedesktop.org/drm/drm-misc
F: Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.txt
F: Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml
F: drivers/gpu/drm/panel/panel-arm-versatile.c
DRM DRIVER FOR ASPEED BMC GFX
@ -5300,7 +5300,7 @@ F: drivers/gpu/drm/bochs/
DRM DRIVER FOR BOE HIMAX8279D PANELS
M: Jerry Han <hanxu5@huaqin.corp-partner.google.com>
S: Maintained
F: Documentation/devicetree/bindings/display/panel/boe,himax8279d.txt
F: Documentation/devicetree/bindings/display/panel/boe,himax8279d.yaml
F: drivers/gpu/drm/panel/panel-boe-himax8279d.c
DRM DRIVER FOR FARADAY TVE200 TV ENCODER
@ -5318,7 +5318,7 @@ F: drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c
DRM DRIVER FOR FEIYANG FY07024DI26A30-D MIPI-DSI LCD PANELS
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
F: Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt
F: Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml
F: drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c
DRM DRIVER FOR GRAIN MEDIA GM12U320 PROJECTORS
@ -5353,6 +5353,14 @@ S: Orphan / Obsolete
F: drivers/gpu/drm/i810/
F: include/uapi/drm/i810_drm.h
DRM DRIVER FOR LVDS PANELS
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
L: dri-devel@lists.freedesktop.org
T: git git://anongit.freedesktop.org/drm/drm-misc
S: Maintained
F: drivers/gpu/drm/panel/panel-lvds.c
F: Documentation/devicetree/bindings/display/panel/lvds.yaml
DRM DRIVER FOR MATROX G200/G400 GRAPHICS CARDS
S: Orphan / Obsolete
F: drivers/gpu/drm/mga/
@ -5401,7 +5409,7 @@ F: include/uapi/drm/nouveau_drm.h
DRM DRIVER FOR OLIMEX LCD-OLINUXINO PANELS
M: Stefan Mavrodiev <stefan@olimex.com>
S: Maintained
F: Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.txt
F: Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml
F: drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c
DRM DRIVER FOR PERVASIVE DISPLAYS REPAPER PANELS
@ -5418,7 +5426,7 @@ L: virtualization@lists.linux-foundation.org
S: Obsolete
W: https://www.kraxel.org/blog/2014/10/qemu-using-cirrus-considered-harmful/
T: git git://anongit.freedesktop.org/drm/drm-misc
F: drivers/gpu/drm/cirrus/
F: drivers/gpu/drm/tiny/cirrus.c
DRM DRIVER FOR QXL VIRTUAL GPU
M: Dave Airlie <airlied@redhat.com>
@ -5468,7 +5476,7 @@ F: drivers/gpu/drm/tiny/st7586.c
DRM DRIVER FOR SITRONIX ST7701 PANELS
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
F: Documentation/devicetree/bindings/display/panel/sitronix,st7701.txt
F: Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml
F: drivers/gpu/drm/panel/panel-sitronix-st7701.c
DRM DRIVER FOR SITRONIX ST7735R PANELS
@ -14141,7 +14149,6 @@ F: drivers/net/wireless/quantenna
RADEON and AMDGPU DRM DRIVERS
M: Alex Deucher <alexander.deucher@amd.com>
M: Christian König <christian.koenig@amd.com>
M: David (ChunMing) Zhou <David1.Zhou@amd.com>
L: amd-gfx@lists.freedesktop.org
S: Supported
T: git git://people.freedesktop.org/~agd5f/linux

View File

@ -104,6 +104,14 @@ static struct fixed_voltage_config shannon_cf_vcc_pdata __initdata = {
.enabled_at_boot = 1,
};
static struct gpiod_lookup_table shannon_display_gpio_table = {
.dev_id = "sa11x0-fb",
.table = {
GPIO_LOOKUP("gpio", 22, "shannon-lcden", GPIO_ACTIVE_HIGH),
{ },
},
};
static void __init shannon_init(void)
{
sa11x0_register_fixed_regulator(0, &shannon_cf_vcc_pdata,
@ -113,6 +121,7 @@ static void __init shannon_init(void)
sa11x0_register_pcmcia(0, &shannon_pcmcia0_gpio_table);
sa11x0_register_pcmcia(1, &shannon_pcmcia1_gpio_table);
sa11x0_ppc_configure_mcp();
gpiod_add_lookup_table(&shannon_display_gpio_table);
sa11x0_register_lcd(&shannon_lcd_info);
sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1);
sa11x0_register_mcp(&shannon_mcp_data);

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