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arm64: dts: qcom: sc7180: Add bandwidth votes for eMMC and SDcard
Add the bandwidth domain supporting performance state and the corresponding OPP tables for the sdhc device on sc7180. Signed-off-by: Pradeep P V K <ppvk@codeaurora.org> Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org> Link: https://lore.kernel.org/r/1597646464-1863-1-git-send-email-sbhanu@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -691,6 +691,9 @@
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clocks = <&gcc GCC_SDCC1_APPS_CLK>,
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<&gcc GCC_SDCC1_AHB_CLK>;
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clock-names = "core", "iface";
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interconnects = <&aggre1_noc MASTER_EMMC 0 &mc_virt SLAVE_EBI1 0>,
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<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_EMMC_CFG 0>;
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interconnect-names = "sdhc-ddr","cpu-sdhc";
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power-domains = <&rpmhpd SC7180_CX>;
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operating-points-v2 = <&sdhc1_opp_table>;
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@ -711,11 +714,15 @@
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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required-opps = <&rpmhpd_opp_low_svs>;
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opp-peak-kBps = <100000 100000>;
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opp-avg-kBps = <100000 50000>;
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};
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opp-384000000 {
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opp-hz = /bits/ 64 <384000000>;
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required-opps = <&rpmhpd_opp_svs_l1>;
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opp-peak-kBps = <600000 900000>;
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opp-avg-kBps = <261438 300000>;
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};
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};
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};
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@ -2516,6 +2523,10 @@
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clocks = <&gcc GCC_SDCC2_APPS_CLK>,
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<&gcc GCC_SDCC2_AHB_CLK>;
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clock-names = "core", "iface";
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interconnects = <&aggre1_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
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<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
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interconnect-names = "sdhc-ddr","cpu-sdhc";
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power-domains = <&rpmhpd SC7180_CX>;
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operating-points-v2 = <&sdhc2_opp_table>;
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@ -2529,11 +2540,15 @@
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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required-opps = <&rpmhpd_opp_low_svs>;
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opp-peak-kBps = <160000 100000>;
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opp-avg-kBps = <80000 50000>;
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};
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opp-202000000 {
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opp-hz = /bits/ 64 <202000000>;
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required-opps = <&rpmhpd_opp_svs_l1>;
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opp-peak-kBps = <200000 120000>;
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opp-avg-kBps = <100000 60000>;
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};
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};
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};
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