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arm64: arch_timer: Workaround for Cortex-A73 erratum 858921
Cortex-A73 (all versions) counter read can return a wrong value when the counter crosses a 32bit boundary. The workaround involves performing the read twice, and to return one or the other depending on whether a transition has taken place. Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -366,6 +366,17 @@ config HISILICON_ERRATUM_161010101
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161010101. The workaround will be active if the hisilicon,erratum-161010101
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property is found in the timer node.
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config ARM64_ERRATUM_858921
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bool "Workaround for Cortex-A73 erratum 858921"
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default y
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select ARM_ARCH_TIMER_OOL_WORKAROUND
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depends on ARM_ARCH_TIMER && ARM64
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help
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This option enables a workaround applicable to Cortex-A73
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(all versions), whose counter may return incorrect values.
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The workaround will be dynamically enabled when an affected
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core is detected.
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config ARM_GLOBAL_TIMER
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bool "Support for the ARM global timer" if COMPILE_TEST
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select CLKSRC_OF if OF
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@ -266,6 +266,17 @@ static u64 notrace hisi_161010101_read_cntvct_el0(void)
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}
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_858921
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static u64 notrace arm64_858921_read_cntvct_el0(void)
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{
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u64 old, new;
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old = read_sysreg(cntvct_el0);
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new = read_sysreg(cntvct_el0);
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return (((old ^ new) >> 32) & 1) ? old : new;
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}
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#endif
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#ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND
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DEFINE_PER_CPU(const struct arch_timer_erratum_workaround *,
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timer_unstable_counter_workaround);
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@ -331,6 +342,14 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
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.set_next_event_virt = erratum_set_next_event_tval_virt,
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},
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_858921
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{
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.match_type = ate_match_local_cap_id,
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.id = (void *)ARM64_WORKAROUND_858921,
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.desc = "ARM erratum 858921",
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.read_cntvct_el0 = arm64_858921_read_cntvct_el0,
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},
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#endif
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};
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typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *,
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