clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks

Use newly defined clk_regmap_mux_safe_ops for PCIe pipe clocks to let
the clock framework automatically park the clock when the clock is
switched off and restore the parent when the clock is switched on.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220323085010.1753493-3-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov 2022-03-23 11:50:07 +03:00 committed by Bjorn Andersson
parent e9a4c7f667
commit fa5ad5c517

View File

@ -243,13 +243,14 @@ static struct clk_regmap_mux gcc_pcie_0_pipe_clk_src = {
.reg = 0x7b060, .reg = 0x7b060,
.shift = 0, .shift = 0,
.width = 2, .width = 2,
.safe_src_parent = P_BI_TCXO,
.parent_map = gcc_parent_map_4, .parent_map = gcc_parent_map_4,
.clkr = { .clkr = {
.hw.init = &(struct clk_init_data){ .hw.init = &(struct clk_init_data){
.name = "gcc_pcie_0_pipe_clk_src", .name = "gcc_pcie_0_pipe_clk_src",
.parent_data = gcc_parent_data_4, .parent_data = gcc_parent_data_4,
.num_parents = ARRAY_SIZE(gcc_parent_data_4), .num_parents = ARRAY_SIZE(gcc_parent_data_4),
.ops = &clk_regmap_mux_closest_ops, .ops = &clk_regmap_mux_safe_ops,
}, },
}, },
}; };
@ -273,13 +274,14 @@ static struct clk_regmap_mux gcc_pcie_1_pipe_clk_src = {
.reg = 0x9d064, .reg = 0x9d064,
.shift = 0, .shift = 0,
.width = 2, .width = 2,
.safe_src_parent = P_BI_TCXO,
.parent_map = gcc_parent_map_6, .parent_map = gcc_parent_map_6,
.clkr = { .clkr = {
.hw.init = &(struct clk_init_data){ .hw.init = &(struct clk_init_data){
.name = "gcc_pcie_1_pipe_clk_src", .name = "gcc_pcie_1_pipe_clk_src",
.parent_data = gcc_parent_data_6, .parent_data = gcc_parent_data_6,
.num_parents = ARRAY_SIZE(gcc_parent_data_6), .num_parents = ARRAY_SIZE(gcc_parent_data_6),
.ops = &clk_regmap_mux_closest_ops, .ops = &clk_regmap_mux_safe_ops,
}, },
}, },
}; };