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MIPS: Octeon: Enable Read Inhibit / eXecute Inhibit on Octeon II.
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1666/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -59,7 +59,7 @@
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#define cpu_has_veic 0
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#define cpu_hwrena_impl_bits 0xc0000000
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#define kernel_uses_smartmips_rixi (cpu_data[0].cputype == CPU_CAVIUM_OCTEON_PLUS)
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#define kernel_uses_smartmips_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON)
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#define ARCH_HAS_IRQ_PER_CPU 1
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#define ARCH_HAS_SPINLOCK_PREFETCH 1
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