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clk: qcom: dispcc-sc7180: use parent_hws where possible

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Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-18-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2021-04-06 01:47:27 +03:00 committed by Stephen Boyd
parent 789ab2c2c3
commit f8fae78c81
1 changed files with 34 additions and 34 deletions
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68
drivers/clk/qcom/dispcc-sc7180.c
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@ -63,8 +63,8 @@ static struct clk_alpha_pll_postdiv disp_cc_pll0_out_even = {
.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA],
.clkr.hw.init = &(struct clk_init_data){
.name = "disp_cc_pll0_out_even",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_pll0.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_pll0.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -317,8 +317,8 @@ static struct clk_branch disp_cc_mdss_ahb_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_ahb_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_ahb_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_ahb_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -335,8 +335,8 @@ static struct clk_branch disp_cc_mdss_byte0_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_byte0_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_byte0_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_byte0_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -381,8 +381,8 @@ static struct clk_branch disp_cc_mdss_byte0_intf_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_byte0_intf_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_byte0_div_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_byte0_div_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -399,8 +399,8 @@ static struct clk_branch disp_cc_mdss_dp_aux_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_dp_aux_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_dp_aux_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_dp_aux_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -417,8 +417,8 @@ static struct clk_branch disp_cc_mdss_dp_crypto_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_dp_crypto_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_dp_crypto_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_dp_crypto_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -435,8 +435,8 @@ static struct clk_branch disp_cc_mdss_dp_link_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_dp_link_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_dp_link_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_dp_link_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -453,8 +453,8 @@ static struct clk_branch disp_cc_mdss_dp_link_intf_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_dp_link_intf_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_dp_link_div_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_dp_link_div_clk_src.clkr.hw,
},
.num_parents = 1,
.ops = &clk_branch2_ops,
@ -470,8 +470,8 @@ static struct clk_branch disp_cc_mdss_dp_pixel_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_dp_pixel_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_dp_pixel_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_dp_pixel_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -488,8 +488,8 @@ static struct clk_branch disp_cc_mdss_esc0_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_esc0_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_esc0_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_esc0_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -506,8 +506,8 @@ static struct clk_branch disp_cc_mdss_mdp_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_mdp_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_mdp_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_mdp_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -524,8 +524,8 @@ static struct clk_branch disp_cc_mdss_mdp_lut_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_mdp_lut_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_mdp_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_mdp_clk_src.clkr.hw,
},
.num_parents = 1,
.ops = &clk_branch2_ops,
@ -541,8 +541,8 @@ static struct clk_branch disp_cc_mdss_non_gdsc_ahb_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_non_gdsc_ahb_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_ahb_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_ahb_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -559,8 +559,8 @@ static struct clk_branch disp_cc_mdss_pclk0_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_pclk0_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_pclk0_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_pclk0_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -577,8 +577,8 @@ static struct clk_branch disp_cc_mdss_rot_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_rot_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_rot_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_rot_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -595,8 +595,8 @@ static struct clk_branch disp_cc_mdss_rscc_vsync_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_rscc_vsync_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_vsync_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_vsync_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -613,8 +613,8 @@ static struct clk_branch disp_cc_mdss_vsync_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_vsync_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &disp_cc_mdss_vsync_clk_src.clkr.hw,
.parent_hws = (const struct clk_hw*[]){
&disp_cc_mdss_vsync_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,