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[PATCH] x86_64: Rename oem_force_hpet_timer to apic_is_clustered_box
Rename oem_force_hpet_timer to apic_is_clustered_box, to give the function a better fitting name - it really isn't at all about HPET. Signed-off-by: Vojtech Pavlik <vojtech@suse.cz> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -983,7 +983,7 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
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}
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/*
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* oem_force_hpet_timer -- force HPET mode for some boxes.
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* apic_is_clustered_box() -- Check if we can expect good TSC
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*
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* Thus far, the major user of this is IBM's Summit2 series:
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*
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@ -991,7 +991,7 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
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* multi-chassis. Use available data to take a good guess.
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* If in doubt, go HPET.
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*/
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__cpuinit int oem_force_hpet_timer(void)
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__cpuinit int apic_is_clustered_box(void)
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{
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int i, clusters, zeros;
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unsigned id;
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@ -1022,8 +1022,7 @@ __cpuinit int oem_force_hpet_timer(void)
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}
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/*
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* If clusters > 2, then should be multi-chassis. Return 1 for HPET.
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* Else return 0 to use TSC.
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* If clusters > 2, then should be multi-chassis.
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* May have to revisit this when multi-core + hyperthreaded CPUs come
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* out, but AFAIK this will work even for them.
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*/
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@ -956,10 +956,10 @@ void __init time_init(void)
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__cpuinit int unsynchronized_tsc(void)
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{
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#ifdef CONFIG_SMP
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if (oem_force_hpet_timer())
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if (apic_is_clustered_box())
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return 1;
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/* Intel systems are normally all synchronized. Exceptions
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are handled in the OEM check above. */
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are handled in the check above. */
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if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
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return 0;
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#endif
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@ -55,7 +55,7 @@
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extern int is_hpet_enabled(void);
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extern int hpet_rtc_timer_init(void);
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extern int oem_force_hpet_timer(void);
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extern int apic_is_clustered_box(void);
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extern int hpet_use_timer;
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