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dmaengine: imx-sdma: Add a new DMATYPE for Shared Peripheral ASRC
Shared Peripheral ASRC, running on SPBA, needs to use shp sciprts for DMA transfer. So this patch just adds a new DMATYPE for it. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -47,6 +47,7 @@ The full ID of peripheral types can be found below.
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20 ASRC
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21 ESAI
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22 SSI Dual FIFO (needs firmware ver >= 2)
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23 Shared ASRC
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The third cell specifies the transfer priority as below.
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@ -750,6 +750,11 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
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emi_2_per = sdma->script_addrs->asrc_2_mcu_addr;
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per_2_per = sdma->script_addrs->per_2_per_addr;
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break;
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case IMX_DMATYPE_ASRC_SP:
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per_2_emi = sdma->script_addrs->shp_2_mcu_addr;
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emi_2_per = sdma->script_addrs->mcu_2_shp_addr;
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per_2_per = sdma->script_addrs->per_2_per_addr;
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break;
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case IMX_DMATYPE_MSHC:
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per_2_emi = sdma->script_addrs->mshc_2_mcu_addr;
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emi_2_per = sdma->script_addrs->mcu_2_mshc_addr;
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@ -40,6 +40,7 @@ enum sdma_peripheral_type {
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IMX_DMATYPE_ASRC, /* ASRC */
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IMX_DMATYPE_ESAI, /* ESAI */
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IMX_DMATYPE_SSI_DUAL, /* SSI Dual FIFO */
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IMX_DMATYPE_ASRC_SP, /* Shared ASRC */
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};
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enum imx_dma_prio {
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