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serial: icom: switch vague casts to container_of
In icom, there is an ICOM_PORT macro to perform upcasts from struct uart_port to struct icom_port. It's not completely safe and it works only because the first member of icom_port is uart_port. Nowadays, we use container_of for such an upcast instead. So introduce a helper (to_icom_port()) with container_of in it and convert all the ICOM_PORT users to the new helper. Apart from the code and type safety, it's also clear what icom_port (the variable) is. Unlike with the old ICOM_PORT (the macro with the cast). Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220421085808.24152-3-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -47,9 +47,13 @@
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#define ICOM_DRIVER_NAME "icom"
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#define ICOM_DRIVER_NAME "icom"
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#define NR_PORTS 128
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#define NR_PORTS 128
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#define ICOM_PORT ((struct icom_port *)port)
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#define to_icom_adapter(d) container_of(d, struct icom_adapter, kref)
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#define to_icom_adapter(d) container_of(d, struct icom_adapter, kref)
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static inline struct icom_port *to_icom_port(struct uart_port *port)
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{
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return container_of(port, struct icom_port, uart_port);
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}
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static const struct pci_device_id icom_pci_table[] = {
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static const struct pci_device_id icom_pci_table[] = {
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{
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{
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.vendor = PCI_VENDOR_ID_IBM,
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.vendor = PCI_VENDOR_ID_IBM,
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@ -616,16 +620,17 @@ unlock:
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static int icom_write(struct uart_port *port)
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static int icom_write(struct uart_port *port)
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{
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{
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struct icom_port *icom_port = to_icom_port(port);
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unsigned long data_count;
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unsigned long data_count;
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unsigned char cmdReg;
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unsigned char cmdReg;
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unsigned long offset;
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unsigned long offset;
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int temp_tail = port->state->xmit.tail;
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int temp_tail = port->state->xmit.tail;
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trace(ICOM_PORT, "WRITE", 0);
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trace(icom_port, "WRITE", 0);
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if (cpu_to_le16(ICOM_PORT->statStg->xmit[0].flags) &
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if (cpu_to_le16(icom_port->statStg->xmit[0].flags) &
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SA_FLAGS_READY_TO_XMIT) {
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SA_FLAGS_READY_TO_XMIT) {
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trace(ICOM_PORT, "WRITE_FULL", 0);
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trace(icom_port, "WRITE_FULL", 0);
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return 0;
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return 0;
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}
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}
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@ -633,7 +638,7 @@ static int icom_write(struct uart_port *port)
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while ((port->state->xmit.head != temp_tail) &&
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while ((port->state->xmit.head != temp_tail) &&
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(data_count <= XMIT_BUFF_SZ)) {
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(data_count <= XMIT_BUFF_SZ)) {
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ICOM_PORT->xmit_buf[data_count++] =
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icom_port->xmit_buf[data_count++] =
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port->state->xmit.buf[temp_tail];
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port->state->xmit.buf[temp_tail];
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temp_tail++;
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temp_tail++;
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@ -641,22 +646,22 @@ static int icom_write(struct uart_port *port)
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}
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}
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if (data_count) {
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if (data_count) {
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ICOM_PORT->statStg->xmit[0].flags =
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icom_port->statStg->xmit[0].flags =
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cpu_to_le16(SA_FLAGS_READY_TO_XMIT);
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cpu_to_le16(SA_FLAGS_READY_TO_XMIT);
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ICOM_PORT->statStg->xmit[0].leLength =
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icom_port->statStg->xmit[0].leLength =
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cpu_to_le16(data_count);
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cpu_to_le16(data_count);
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offset =
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offset =
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(unsigned long) &ICOM_PORT->statStg->xmit[0] -
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(unsigned long) &icom_port->statStg->xmit[0] -
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(unsigned long) ICOM_PORT->statStg;
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(unsigned long) icom_port->statStg;
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*ICOM_PORT->xmitRestart =
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*icom_port->xmitRestart =
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cpu_to_le32(ICOM_PORT->statStg_pci + offset);
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cpu_to_le32(icom_port->statStg_pci + offset);
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cmdReg = readb(&ICOM_PORT->dram->CmdReg);
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cmdReg = readb(&icom_port->dram->CmdReg);
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writeb(cmdReg | CMD_XMIT_RCV_ENABLE,
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writeb(cmdReg | CMD_XMIT_RCV_ENABLE,
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&ICOM_PORT->dram->CmdReg);
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&icom_port->dram->CmdReg);
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writeb(START_XMIT, &ICOM_PORT->dram->StartXmitCmd);
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writeb(START_XMIT, &icom_port->dram->StartXmitCmd);
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trace(ICOM_PORT, "WRITE_START", data_count);
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trace(icom_port, "WRITE_START", data_count);
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/* write flush */
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/* write flush */
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readb(&ICOM_PORT->dram->StartXmitCmd);
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readb(&icom_port->dram->StartXmitCmd);
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}
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}
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return data_count;
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return data_count;
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@ -924,11 +929,12 @@ static irqreturn_t icom_interrupt(int irq, void *dev_id)
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*/
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*/
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static unsigned int icom_tx_empty(struct uart_port *port)
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static unsigned int icom_tx_empty(struct uart_port *port)
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{
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{
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struct icom_port *icom_port = to_icom_port(port);
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int ret;
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int ret;
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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spin_lock_irqsave(&port->lock, flags);
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if (cpu_to_le16(ICOM_PORT->statStg->xmit[0].flags) &
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if (cpu_to_le16(icom_port->statStg->xmit[0].flags) &
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SA_FLAGS_READY_TO_XMIT)
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SA_FLAGS_READY_TO_XMIT)
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ret = TIOCSER_TEMT;
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ret = TIOCSER_TEMT;
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else
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else
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@ -940,38 +946,40 @@ static unsigned int icom_tx_empty(struct uart_port *port)
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static void icom_set_mctrl(struct uart_port *port, unsigned int mctrl)
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static void icom_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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{
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struct icom_port *icom_port = to_icom_port(port);
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unsigned char local_osr;
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unsigned char local_osr;
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trace(ICOM_PORT, "SET_MODEM", 0);
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trace(icom_port, "SET_MODEM", 0);
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local_osr = readb(&ICOM_PORT->dram->osr);
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local_osr = readb(&icom_port->dram->osr);
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if (mctrl & TIOCM_RTS) {
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if (mctrl & TIOCM_RTS) {
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trace(ICOM_PORT, "RAISE_RTS", 0);
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trace(icom_port, "RAISE_RTS", 0);
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local_osr |= ICOM_RTS;
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local_osr |= ICOM_RTS;
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} else {
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} else {
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trace(ICOM_PORT, "LOWER_RTS", 0);
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trace(icom_port, "LOWER_RTS", 0);
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local_osr &= ~ICOM_RTS;
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local_osr &= ~ICOM_RTS;
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}
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}
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if (mctrl & TIOCM_DTR) {
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if (mctrl & TIOCM_DTR) {
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trace(ICOM_PORT, "RAISE_DTR", 0);
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trace(icom_port, "RAISE_DTR", 0);
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local_osr |= ICOM_DTR;
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local_osr |= ICOM_DTR;
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} else {
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} else {
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trace(ICOM_PORT, "LOWER_DTR", 0);
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trace(icom_port, "LOWER_DTR", 0);
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local_osr &= ~ICOM_DTR;
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local_osr &= ~ICOM_DTR;
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}
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}
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writeb(local_osr, &ICOM_PORT->dram->osr);
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writeb(local_osr, &icom_port->dram->osr);
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}
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}
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static unsigned int icom_get_mctrl(struct uart_port *port)
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static unsigned int icom_get_mctrl(struct uart_port *port)
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{
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{
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struct icom_port *icom_port = to_icom_port(port);
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unsigned char status;
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unsigned char status;
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unsigned int result;
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unsigned int result;
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trace(ICOM_PORT, "GET_MODEM", 0);
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trace(icom_port, "GET_MODEM", 0);
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status = readb(&ICOM_PORT->dram->isr);
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status = readb(&icom_port->dram->isr);
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result = ((status & ICOM_DCD) ? TIOCM_CAR : 0)
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result = ((status & ICOM_DCD) ? TIOCM_CAR : 0)
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| ((status & ICOM_RI) ? TIOCM_RNG : 0)
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| ((status & ICOM_RI) ? TIOCM_RNG : 0)
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@ -982,44 +990,47 @@ static unsigned int icom_get_mctrl(struct uart_port *port)
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static void icom_stop_tx(struct uart_port *port)
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static void icom_stop_tx(struct uart_port *port)
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{
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{
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struct icom_port *icom_port = to_icom_port(port);
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unsigned char cmdReg;
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unsigned char cmdReg;
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trace(ICOM_PORT, "STOP", 0);
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trace(icom_port, "STOP", 0);
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cmdReg = readb(&ICOM_PORT->dram->CmdReg);
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cmdReg = readb(&icom_port->dram->CmdReg);
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writeb(cmdReg | CMD_HOLD_XMIT, &ICOM_PORT->dram->CmdReg);
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writeb(cmdReg | CMD_HOLD_XMIT, &icom_port->dram->CmdReg);
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}
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}
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static void icom_start_tx(struct uart_port *port)
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static void icom_start_tx(struct uart_port *port)
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{
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{
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struct icom_port *icom_port = to_icom_port(port);
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unsigned char cmdReg;
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unsigned char cmdReg;
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trace(ICOM_PORT, "START", 0);
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trace(icom_port, "START", 0);
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cmdReg = readb(&ICOM_PORT->dram->CmdReg);
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cmdReg = readb(&icom_port->dram->CmdReg);
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if ((cmdReg & CMD_HOLD_XMIT) == CMD_HOLD_XMIT)
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if ((cmdReg & CMD_HOLD_XMIT) == CMD_HOLD_XMIT)
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writeb(cmdReg & ~CMD_HOLD_XMIT,
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writeb(cmdReg & ~CMD_HOLD_XMIT,
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&ICOM_PORT->dram->CmdReg);
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&icom_port->dram->CmdReg);
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icom_write(port);
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icom_write(port);
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}
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}
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static void icom_send_xchar(struct uart_port *port, char ch)
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static void icom_send_xchar(struct uart_port *port, char ch)
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{
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{
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struct icom_port *icom_port = to_icom_port(port);
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unsigned char xdata;
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unsigned char xdata;
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int index;
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int index;
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unsigned long flags;
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unsigned long flags;
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trace(ICOM_PORT, "SEND_XCHAR", ch);
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trace(icom_port, "SEND_XCHAR", ch);
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/* wait .1 sec to send char */
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/* wait .1 sec to send char */
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for (index = 0; index < 10; index++) {
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for (index = 0; index < 10; index++) {
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spin_lock_irqsave(&port->lock, flags);
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spin_lock_irqsave(&port->lock, flags);
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xdata = readb(&ICOM_PORT->dram->xchar);
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xdata = readb(&icom_port->dram->xchar);
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if (xdata == 0x00) {
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if (xdata == 0x00) {
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trace(ICOM_PORT, "QUICK_WRITE", 0);
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trace(icom_port, "QUICK_WRITE", 0);
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writeb(ch, &ICOM_PORT->dram->xchar);
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writeb(ch, &icom_port->dram->xchar);
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/* flush write operation */
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/* flush write operation */
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xdata = readb(&ICOM_PORT->dram->xchar);
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xdata = readb(&icom_port->dram->xchar);
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spin_unlock_irqrestore(&port->lock, flags);
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spin_unlock_irqrestore(&port->lock, flags);
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break;
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break;
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}
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}
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@ -1030,38 +1041,41 @@ static void icom_send_xchar(struct uart_port *port, char ch)
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static void icom_stop_rx(struct uart_port *port)
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static void icom_stop_rx(struct uart_port *port)
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{
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{
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struct icom_port *icom_port = to_icom_port(port);
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unsigned char cmdReg;
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unsigned char cmdReg;
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cmdReg = readb(&ICOM_PORT->dram->CmdReg);
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cmdReg = readb(&icom_port->dram->CmdReg);
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writeb(cmdReg & ~CMD_RCV_ENABLE, &ICOM_PORT->dram->CmdReg);
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writeb(cmdReg & ~CMD_RCV_ENABLE, &icom_port->dram->CmdReg);
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}
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}
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static void icom_break(struct uart_port *port, int break_state)
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static void icom_break(struct uart_port *port, int break_state)
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{
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{
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struct icom_port *icom_port = to_icom_port(port);
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unsigned char cmdReg;
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unsigned char cmdReg;
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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spin_lock_irqsave(&port->lock, flags);
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trace(ICOM_PORT, "BREAK", 0);
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trace(icom_port, "BREAK", 0);
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cmdReg = readb(&ICOM_PORT->dram->CmdReg);
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cmdReg = readb(&icom_port->dram->CmdReg);
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if (break_state == -1) {
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if (break_state == -1) {
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writeb(cmdReg | CMD_SND_BREAK, &ICOM_PORT->dram->CmdReg);
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writeb(cmdReg | CMD_SND_BREAK, &icom_port->dram->CmdReg);
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} else {
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} else {
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writeb(cmdReg & ~CMD_SND_BREAK, &ICOM_PORT->dram->CmdReg);
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writeb(cmdReg & ~CMD_SND_BREAK, &icom_port->dram->CmdReg);
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}
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}
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spin_unlock_irqrestore(&port->lock, flags);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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}
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static int icom_open(struct uart_port *port)
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static int icom_open(struct uart_port *port)
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{
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{
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struct icom_port *icom_port = to_icom_port(port);
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int retval;
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int retval;
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kref_get(&ICOM_PORT->adapter->kref);
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kref_get(&icom_port->adapter->kref);
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retval = startup(ICOM_PORT);
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retval = startup(icom_port);
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if (retval) {
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if (retval) {
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kref_put(&ICOM_PORT->adapter->kref, icom_kref_release);
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kref_put(&icom_port->adapter->kref, icom_kref_release);
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trace(ICOM_PORT, "STARTUP_ERROR", 0);
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trace(icom_port, "STARTUP_ERROR", 0);
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return retval;
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return retval;
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}
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}
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@ -1070,23 +1084,25 @@ static int icom_open(struct uart_port *port)
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static void icom_close(struct uart_port *port)
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static void icom_close(struct uart_port *port)
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{
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{
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struct icom_port *icom_port = to_icom_port(port);
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unsigned char cmdReg;
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unsigned char cmdReg;
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trace(ICOM_PORT, "CLOSE", 0);
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trace(icom_port, "CLOSE", 0);
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/* stop receiver */
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/* stop receiver */
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cmdReg = readb(&ICOM_PORT->dram->CmdReg);
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cmdReg = readb(&icom_port->dram->CmdReg);
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writeb(cmdReg & ~CMD_RCV_ENABLE, &ICOM_PORT->dram->CmdReg);
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writeb(cmdReg & ~CMD_RCV_ENABLE, &icom_port->dram->CmdReg);
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shutdown(ICOM_PORT);
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shutdown(icom_port);
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kref_put(&ICOM_PORT->adapter->kref, icom_kref_release);
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kref_put(&icom_port->adapter->kref, icom_kref_release);
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}
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}
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static void icom_set_termios(struct uart_port *port,
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static void icom_set_termios(struct uart_port *port,
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struct ktermios *termios,
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struct ktermios *termios,
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struct ktermios *old_termios)
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struct ktermios *old_termios)
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{
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{
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struct icom_port *icom_port = to_icom_port(port);
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int baud;
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int baud;
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unsigned cflag, iflag;
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unsigned cflag, iflag;
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char new_config2;
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char new_config2;
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@ -1098,7 +1114,7 @@ static void icom_set_termios(struct uart_port *port,
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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spin_lock_irqsave(&port->lock, flags);
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trace(ICOM_PORT, "CHANGE_SPEED", 0);
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trace(icom_port, "CHANGE_SPEED", 0);
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cflag = termios->c_cflag;
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cflag = termios->c_cflag;
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iflag = termios->c_iflag;
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iflag = termios->c_iflag;
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@ -1129,12 +1145,12 @@ static void icom_set_termios(struct uart_port *port,
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if (cflag & PARENB) {
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if (cflag & PARENB) {
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/* parity bit enabled */
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/* parity bit enabled */
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new_config2 |= ICOM_ACFG_PARITY_ENAB;
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new_config2 |= ICOM_ACFG_PARITY_ENAB;
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trace(ICOM_PORT, "PARENB", 0);
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trace(icom_port, "PARENB", 0);
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}
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}
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if (cflag & PARODD) {
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if (cflag & PARODD) {
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/* odd parity */
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/* odd parity */
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new_config2 |= ICOM_ACFG_PARITY_ODD;
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new_config2 |= ICOM_ACFG_PARITY_ODD;
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trace(ICOM_PORT, "PARODD", 0);
|
trace(icom_port, "PARODD", 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Determine divisor based on baud rate */
|
/* Determine divisor based on baud rate */
|
||||||
@ -1154,100 +1170,100 @@ static void icom_set_termios(struct uart_port *port,
|
|||||||
uart_update_timeout(port, cflag, baud);
|
uart_update_timeout(port, cflag, baud);
|
||||||
|
|
||||||
/* CTS flow control flag and modem status interrupts */
|
/* CTS flow control flag and modem status interrupts */
|
||||||
tmp_byte = readb(&(ICOM_PORT->dram->HDLCConfigReg));
|
tmp_byte = readb(&(icom_port->dram->HDLCConfigReg));
|
||||||
if (cflag & CRTSCTS)
|
if (cflag & CRTSCTS)
|
||||||
tmp_byte |= HDLC_HDW_FLOW;
|
tmp_byte |= HDLC_HDW_FLOW;
|
||||||
else
|
else
|
||||||
tmp_byte &= ~HDLC_HDW_FLOW;
|
tmp_byte &= ~HDLC_HDW_FLOW;
|
||||||
writeb(tmp_byte, &(ICOM_PORT->dram->HDLCConfigReg));
|
writeb(tmp_byte, &(icom_port->dram->HDLCConfigReg));
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Set up parity check flag
|
* Set up parity check flag
|
||||||
*/
|
*/
|
||||||
ICOM_PORT->read_status_mask = SA_FLAGS_OVERRUN | SA_FL_RCV_DONE;
|
icom_port->read_status_mask = SA_FLAGS_OVERRUN | SA_FL_RCV_DONE;
|
||||||
if (iflag & INPCK)
|
if (iflag & INPCK)
|
||||||
ICOM_PORT->read_status_mask |=
|
icom_port->read_status_mask |=
|
||||||
SA_FLAGS_FRAME_ERROR | SA_FLAGS_PARITY_ERROR;
|
SA_FLAGS_FRAME_ERROR | SA_FLAGS_PARITY_ERROR;
|
||||||
|
|
||||||
if ((iflag & BRKINT) || (iflag & PARMRK))
|
if ((iflag & BRKINT) || (iflag & PARMRK))
|
||||||
ICOM_PORT->read_status_mask |= SA_FLAGS_BREAK_DET;
|
icom_port->read_status_mask |= SA_FLAGS_BREAK_DET;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Characters to ignore
|
* Characters to ignore
|
||||||
*/
|
*/
|
||||||
ICOM_PORT->ignore_status_mask = 0;
|
icom_port->ignore_status_mask = 0;
|
||||||
if (iflag & IGNPAR)
|
if (iflag & IGNPAR)
|
||||||
ICOM_PORT->ignore_status_mask |=
|
icom_port->ignore_status_mask |=
|
||||||
SA_FLAGS_PARITY_ERROR | SA_FLAGS_FRAME_ERROR;
|
SA_FLAGS_PARITY_ERROR | SA_FLAGS_FRAME_ERROR;
|
||||||
if (iflag & IGNBRK) {
|
if (iflag & IGNBRK) {
|
||||||
ICOM_PORT->ignore_status_mask |= SA_FLAGS_BREAK_DET;
|
icom_port->ignore_status_mask |= SA_FLAGS_BREAK_DET;
|
||||||
/*
|
/*
|
||||||
* If we're ignore parity and break indicators, ignore
|
* If we're ignore parity and break indicators, ignore
|
||||||
* overruns too. (For real raw support).
|
* overruns too. (For real raw support).
|
||||||
*/
|
*/
|
||||||
if (iflag & IGNPAR)
|
if (iflag & IGNPAR)
|
||||||
ICOM_PORT->ignore_status_mask |= SA_FLAGS_OVERRUN;
|
icom_port->ignore_status_mask |= SA_FLAGS_OVERRUN;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* !!! ignore all characters if CREAD is not set
|
* !!! ignore all characters if CREAD is not set
|
||||||
*/
|
*/
|
||||||
if ((cflag & CREAD) == 0)
|
if ((cflag & CREAD) == 0)
|
||||||
ICOM_PORT->ignore_status_mask |= SA_FL_RCV_DONE;
|
icom_port->ignore_status_mask |= SA_FL_RCV_DONE;
|
||||||
|
|
||||||
/* Turn off Receiver to prepare for reset */
|
/* Turn off Receiver to prepare for reset */
|
||||||
writeb(CMD_RCV_DISABLE, &ICOM_PORT->dram->CmdReg);
|
writeb(CMD_RCV_DISABLE, &icom_port->dram->CmdReg);
|
||||||
|
|
||||||
for (index = 0; index < 10; index++) {
|
for (index = 0; index < 10; index++) {
|
||||||
if (readb(&ICOM_PORT->dram->PrevCmdReg) == 0x00) {
|
if (readb(&icom_port->dram->PrevCmdReg) == 0x00) {
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* clear all current buffers of data */
|
/* clear all current buffers of data */
|
||||||
for (rcv_buff = 0; rcv_buff < NUM_RBUFFS; rcv_buff++) {
|
for (rcv_buff = 0; rcv_buff < NUM_RBUFFS; rcv_buff++) {
|
||||||
ICOM_PORT->statStg->rcv[rcv_buff].flags = 0;
|
icom_port->statStg->rcv[rcv_buff].flags = 0;
|
||||||
ICOM_PORT->statStg->rcv[rcv_buff].leLength = 0;
|
icom_port->statStg->rcv[rcv_buff].leLength = 0;
|
||||||
ICOM_PORT->statStg->rcv[rcv_buff].WorkingLength =
|
icom_port->statStg->rcv[rcv_buff].WorkingLength =
|
||||||
(unsigned short int) cpu_to_le16(RCV_BUFF_SZ);
|
(unsigned short int) cpu_to_le16(RCV_BUFF_SZ);
|
||||||
}
|
}
|
||||||
|
|
||||||
for (xmit_buff = 0; xmit_buff < NUM_XBUFFS; xmit_buff++) {
|
for (xmit_buff = 0; xmit_buff < NUM_XBUFFS; xmit_buff++) {
|
||||||
ICOM_PORT->statStg->xmit[xmit_buff].flags = 0;
|
icom_port->statStg->xmit[xmit_buff].flags = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* activate changes and start xmit and receiver here */
|
/* activate changes and start xmit and receiver here */
|
||||||
/* Enable the receiver */
|
/* Enable the receiver */
|
||||||
writeb(new_config3, &(ICOM_PORT->dram->async_config3));
|
writeb(new_config3, &(icom_port->dram->async_config3));
|
||||||
writeb(new_config2, &(ICOM_PORT->dram->async_config2));
|
writeb(new_config2, &(icom_port->dram->async_config2));
|
||||||
tmp_byte = readb(&(ICOM_PORT->dram->HDLCConfigReg));
|
tmp_byte = readb(&(icom_port->dram->HDLCConfigReg));
|
||||||
tmp_byte |= HDLC_PPP_PURE_ASYNC | HDLC_FF_FILL;
|
tmp_byte |= HDLC_PPP_PURE_ASYNC | HDLC_FF_FILL;
|
||||||
writeb(tmp_byte, &(ICOM_PORT->dram->HDLCConfigReg));
|
writeb(tmp_byte, &(icom_port->dram->HDLCConfigReg));
|
||||||
writeb(0x04, &(ICOM_PORT->dram->FlagFillIdleTimer)); /* 0.5 seconds */
|
writeb(0x04, &(icom_port->dram->FlagFillIdleTimer)); /* 0.5 seconds */
|
||||||
writeb(0xFF, &(ICOM_PORT->dram->ier)); /* enable modem signal interrupts */
|
writeb(0xFF, &(icom_port->dram->ier)); /* enable modem signal interrupts */
|
||||||
|
|
||||||
/* reset processor */
|
/* reset processor */
|
||||||
writeb(CMD_RESTART, &ICOM_PORT->dram->CmdReg);
|
writeb(CMD_RESTART, &icom_port->dram->CmdReg);
|
||||||
|
|
||||||
for (index = 0; index < 10; index++) {
|
for (index = 0; index < 10; index++) {
|
||||||
if (readb(&ICOM_PORT->dram->CmdReg) == 0x00) {
|
if (readb(&icom_port->dram->CmdReg) == 0x00) {
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Enable Transmitter and Receiver */
|
/* Enable Transmitter and Receiver */
|
||||||
offset =
|
offset =
|
||||||
(unsigned long) &ICOM_PORT->statStg->rcv[0] -
|
(unsigned long) &icom_port->statStg->rcv[0] -
|
||||||
(unsigned long) ICOM_PORT->statStg;
|
(unsigned long) icom_port->statStg;
|
||||||
writel(ICOM_PORT->statStg_pci + offset,
|
writel(icom_port->statStg_pci + offset,
|
||||||
&ICOM_PORT->dram->RcvStatusAddr);
|
&icom_port->dram->RcvStatusAddr);
|
||||||
ICOM_PORT->next_rcv = 0;
|
icom_port->next_rcv = 0;
|
||||||
ICOM_PORT->put_length = 0;
|
icom_port->put_length = 0;
|
||||||
*ICOM_PORT->xmitRestart = 0;
|
*icom_port->xmitRestart = 0;
|
||||||
writel(ICOM_PORT->xmitRestart_pci,
|
writel(icom_port->xmitRestart_pci,
|
||||||
&ICOM_PORT->dram->XmitStatusAddr);
|
&icom_port->dram->XmitStatusAddr);
|
||||||
trace(ICOM_PORT, "XR_ENAB", 0);
|
trace(icom_port, "XR_ENAB", 0);
|
||||||
writeb(CMD_XMIT_RCV_ENABLE, &ICOM_PORT->dram->CmdReg);
|
writeb(CMD_XMIT_RCV_ENABLE, &icom_port->dram->CmdReg);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&port->lock, flags);
|
spin_unlock_irqrestore(&port->lock, flags);
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user