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clk: sunxi: add clock-output-names dt property support
sunxi clock drivers use dt node name as clock name, but clock nodes should be named clk@X, so the names would be the same. Let the drivers read clock names from dt clock-output-names property. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Emilio López <emilio@elopez.com.ar>
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@ -51,6 +51,8 @@ static void __init sun4i_osc_clk_setup(struct device_node *node)
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if (!gate)
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goto err_free_fixed;
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of_property_read_string(node, "clock-output-names", &clk_name);
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/* set up gate and fixed rate properties */
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gate->reg = of_iomap(node, 0);
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gate->bit_idx = SUNXI_OSC24M_GATE;
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@ -601,6 +603,8 @@ static void __init sunxi_mux_clk_setup(struct device_node *node,
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(parents[i] = of_clk_get_parent_name(node, i)) != NULL)
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i++;
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of_property_read_string(node, "clock-output-names", &clk_name);
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clk = clk_register_mux(NULL, clk_name, parents, i,
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CLK_SET_RATE_NO_REPARENT, reg,
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data->shift, SUNXI_MUX_GATE_WIDTH,
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@ -660,6 +664,8 @@ static void __init sunxi_divider_clk_setup(struct device_node *node,
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clk_parent = of_clk_get_parent_name(node, 0);
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of_property_read_string(node, "clock-output-names", &clk_name);
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clk = clk_register_divider(NULL, clk_name, clk_parent, 0,
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reg, data->shift, data->width,
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data->pow ? CLK_DIVIDER_POWER_OF_TWO : 0,
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