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ARM: imx: refactor the io mapping macro
This makes it more assembler friendly and allows it to be used in situation that need an unsigned long and not a pointer. Also the naming is clearer. IOMEM is introduced without IMX_ prefix as it is used this way in more than one ARM subarch and it might become globally available soon. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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@ -41,9 +41,9 @@
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#include "devices-imx31.h"
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#include "devices.h"
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#define KZM_ARM11_IO_ADDRESS(x) ( \
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IMX_IO_ADDRESS(x, MX31_CS4) ?: \
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IMX_IO_ADDRESS(x, MX31_CS5) ?: \
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#define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \
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IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \
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IMX_IO_P2V_MODULE(x, MX31_CS5)) ?: \
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MX31_IO_ADDRESS(x))
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/*
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@ -22,10 +22,15 @@
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#include <asm/sizes.h>
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#define IMX_IO_ADDRESS(addr, module) \
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((void __force __iomem *) \
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(((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\
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(addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0))
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#ifdef __ASSEMBLER__
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#define IOMEM(addr) (addr)
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#else
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#define IOMEM(addr) ((void __force __iomem *)(addr))
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#endif
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#define IMX_IO_P2V_MODULE(addr, module) \
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(((addr) - module ## _BASE_ADDR) < module ## _SIZE ? \
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(addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
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#ifdef CONFIG_ARCH_MX5
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#include <mach/mx51.h>
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@ -73,8 +73,9 @@
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#define MX1_CSI_BASE_ADDR (0x24000 + MX1_IO_BASE_ADDR)
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/* macro to get at IO space when running virtually */
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#define MX1_IO_ADDRESS(x) ( \
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IMX_IO_ADDRESS(x, MX1_IO))
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#define MX1_IO_P2V(x) ( \
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IMX_IO_P2V_MODULE(x, MX1_IO))
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#define MX1_IO_ADDRESS(x) IOMEM(MX1_IO_P2V(x))
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/* fixed interrput numbers */
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#define MX1_INT_SOFTINT 0
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@ -92,10 +92,11 @@
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#define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */
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#define MX21_IO_ADDRESS(x) ( \
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IMX_IO_ADDRESS(x, MX21_AIPI) ?: \
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IMX_IO_ADDRESS(x, MX21_SAHB1) ?: \
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IMX_IO_ADDRESS(x, MX21_X_MEMC))
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#define MX21_IO_P2V(x) ( \
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IMX_IO_P2V_MODULE(x, MX21_AIPI) ?: \
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IMX_IO_P2V_MODULE(x, MX21_SAHB1) ?: \
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IMX_IO_P2V_MODULE(x, MX21_X_MEMC))
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#define MX21_IO_ADDRESS(x) IOMEM(MX21_IO_P2V(x))
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/* fixed interrupt numbers */
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#define MX21_INT_CSPI3 6
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@ -28,10 +28,11 @@
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#define MX25_GPIO3_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
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#define MX25_GPIO4_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
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#define MX25_IO_ADDRESS(x) ( \
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IMX_IO_ADDRESS(x, MX25_AIPS1) ?: \
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IMX_IO_ADDRESS(x, MX25_AIPS2) ?: \
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IMX_IO_ADDRESS(x, MX25_AVIC))
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#define MX25_IO_P2V(x) ( \
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IMX_IO_P2V_MODULE(x, MX25_AIPS1) ?: \
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IMX_IO_P2V_MODULE(x, MX25_AIPS2) ?: \
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IMX_IO_P2V_MODULE(x, MX25_AVIC))
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#define MX25_IO_ADDRESS(x) IOMEM(MX25_IO_P2V(x))
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#define MX25_AIPS1_IO_ADDRESS(x) \
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(((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
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@ -123,10 +123,11 @@
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/* IRAM */
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#define MX27_IRAM_BASE_ADDR 0xffff4c00 /* internal ram */
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#define MX27_IO_ADDRESS(x) ( \
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IMX_IO_ADDRESS(x, MX27_AIPI) ?: \
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IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \
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IMX_IO_ADDRESS(x, MX27_X_MEMC))
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#define MX27_IO_P2V(x) ( \
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IMX_IO_P2V_MODULE(x, MX27_AIPI) ?: \
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IMX_IO_P2V_MODULE(x, MX27_SAHB1) ?: \
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IMX_IO_P2V_MODULE(x, MX27_X_MEMC))
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#define MX27_IO_ADDRESS(x) IOMEM(MX27_IO_P2V(x))
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#ifndef __ASSEMBLER__
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static inline void mx27_setup_weimcs(size_t cs,
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@ -121,12 +121,13 @@
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#define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000
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#define MX31_IO_ADDRESS(x) ( \
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IMX_IO_ADDRESS(x, MX31_AIPS1) ?: \
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IMX_IO_ADDRESS(x, MX31_AIPS2) ?: \
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IMX_IO_ADDRESS(x, MX31_AVIC) ?: \
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IMX_IO_ADDRESS(x, MX31_X_MEMC) ?: \
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IMX_IO_ADDRESS(x, MX31_SPBA0))
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#define MX31_IO_P2V(x) ( \
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IMX_IO_P2V_MODULE(x, MX31_AIPS1) ?: \
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IMX_IO_P2V_MODULE(x, MX31_AIPS2) ?: \
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IMX_IO_P2V_MODULE(x, MX31_AVIC) ?: \
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IMX_IO_P2V_MODULE(x, MX31_X_MEMC) ?: \
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IMX_IO_P2V_MODULE(x, MX31_SPBA0))
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#define MX31_IO_ADDRESS(x) IOMEM(MX31_IO_P2V(x))
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#ifndef __ASSEMBLER__
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static inline void mx31_setup_weimcs(size_t cs,
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@ -114,12 +114,13 @@
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#define MX35_NFC_BASE_ADDR 0xbb000000
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#define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000
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#define MX35_IO_ADDRESS(x) ( \
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IMX_IO_ADDRESS(x, MX35_AIPS1) ?: \
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IMX_IO_ADDRESS(x, MX35_AIPS2) ?: \
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IMX_IO_ADDRESS(x, MX35_AVIC) ?: \
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IMX_IO_ADDRESS(x, MX35_X_MEMC) ?: \
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IMX_IO_ADDRESS(x, MX35_SPBA0))
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#define MX35_IO_P2V(x) ( \
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IMX_IO_P2V_MODULE(x, MX35_AIPS1) ?: \
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IMX_IO_P2V_MODULE(x, MX35_AIPS2) ?: \
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IMX_IO_P2V_MODULE(x, MX35_AVIC) ?: \
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IMX_IO_P2V_MODULE(x, MX35_X_MEMC) ?: \
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IMX_IO_P2V_MODULE(x, MX35_SPBA0))
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#define MX35_IO_ADDRESS(x) IOMEM(MX35_IO_P2V(x))
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/*
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* Interrupt numbers
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@ -163,12 +163,13 @@
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#define MX51_GPU2D_BASE_ADDR 0xd0000000
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#define MX51_TZIC_BASE_ADDR 0xe0000000
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#define MX51_IO_ADDRESS(x) ( \
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IMX_IO_ADDRESS(x, MX51_IRAM) ?: \
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IMX_IO_ADDRESS(x, MX51_DEBUG) ?: \
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IMX_IO_ADDRESS(x, MX51_SPBA0) ?: \
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IMX_IO_ADDRESS(x, MX51_AIPS1) ?: \
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IMX_IO_ADDRESS(x, MX51_AIPS2))
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#define MX51_IO_P2V(x) ( \
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IMX_IO_P2V_MODULE(x, MX51_IRAM) ?: \
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IMX_IO_P2V_MODULE(x, MX51_DEBUG) ?: \
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IMX_IO_P2V_MODULE(x, MX51_SPBA0) ?: \
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IMX_IO_P2V_MODULE(x, MX51_AIPS1) ?: \
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IMX_IO_P2V_MODULE(x, MX51_AIPS2))
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#define MX51_IO_ADDRESS(x) IOMEM(MX51_IO_P2V(x))
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/* This is currently used in <mach/debug-macro.S>, but should go away */
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#define MX51_AIPS1_IO_ADDRESS(x) \
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@ -187,15 +187,16 @@
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* it returns 0.
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*/
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#define MXC91231_IO_ADDRESS(x) ( \
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IMX_IO_ADDRESS(x, MXC91231_L2CC) ?: \
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IMX_IO_ADDRESS(x, MXC91231_X_MEMC) ?: \
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IMX_IO_ADDRESS(x, MXC91231_ROMP) ?: \
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IMX_IO_ADDRESS(x, MXC91231_AVIC) ?: \
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IMX_IO_ADDRESS(x, MXC91231_AIPS1) ?: \
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IMX_IO_ADDRESS(x, MXC91231_SPBA0) ?: \
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IMX_IO_ADDRESS(x, MXC91231_SPBA1) ?: \
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IMX_IO_ADDRESS(x, MXC91231_AIPS2))
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#define MXC91231_IO_P2V(x) ( \
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IMX_IO_P2V_MODULE(x, MXC91231_L2CC) ?: \
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IMX_IO_P2V_MODULE(x, MXC91231_X_MEMC) ?: \
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IMX_IO_P2V_MODULE(x, MXC91231_ROMP) ?: \
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IMX_IO_P2V_MODULE(x, MXC91231_AVIC) ?: \
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IMX_IO_P2V_MODULE(x, MXC91231_AIPS1) ?: \
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IMX_IO_P2V_MODULE(x, MXC91231_SPBA0) ?: \
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IMX_IO_P2V_MODULE(x, MXC91231_SPBA1) ?: \
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IMX_IO_P2V_MODULE(x, MXC91231_AIPS2))
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#define MXC91231_IO_ADDRESS(x) IOMEM(MXC91231_IO_P2V(x))
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/*
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* Interrupt numbers
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