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drivers: iio: imu: adis16475: generic computation for sample rate
Currently adis16475 supports a sample rate between 1900 and 2100 Hz. This patch changes the setting of sample rate from hardcoded values to a generic computation based on the internal clock frequency. This is a preparatory patch for adding support for adis1657x family devices which allow sample rates between 3900 and 4100 Hz. Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: Ramona Gradinariu <ramona.bolboaca13@gmail.com> Link: https://lore.kernel.org/r/20240527142618.275897-6-ramona.bolboaca13@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -310,6 +310,9 @@ static int adis16475_set_freq(struct adis16475 *st, const u32 freq)
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u16 dec;
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int ret;
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u32 sample_rate = st->clk_freq;
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/* The optimal sample rate for the supported IMUs is between int_clk - 100 and int_clk + 100. */
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u32 max_sample_rate = st->info->int_clk * 1000 + 100000;
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u32 min_sample_rate = st->info->int_clk * 1000 - 100000;
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if (!freq)
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return -EINVAL;
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@ -317,8 +320,9 @@ static int adis16475_set_freq(struct adis16475 *st, const u32 freq)
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adis_dev_lock(&st->adis);
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/*
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* When using sync scaled mode, the input clock needs to be scaled so that we have
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* an IMU sample rate between (optimally) 1900 and 2100. After this, we can use the
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* decimation filter to lower the sampling rate in order to get what the user wants.
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* an IMU sample rate between (optimally) int_clk - 100 and int_clk + 100.
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* After this, we can use the decimation filter to lower the sampling rate in order
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* to get what the user wants.
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* Optimally, the user sample rate is a multiple of both the IMU sample rate and
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* the input clock. Hence, calculating the sync_scale dynamically gives us better
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* chances of achieving a perfect/integer value for DEC_RATE. The math here is:
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@ -336,23 +340,24 @@ static int adis16475_set_freq(struct adis16475 *st, const u32 freq)
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* solution. In this case, we get the highest multiple of the input clock
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* lower than the IMU max sample rate.
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*/
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if (scaled_rate > 2100000)
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scaled_rate = 2100000 / st->clk_freq * st->clk_freq;
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if (scaled_rate > max_sample_rate)
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scaled_rate = max_sample_rate / st->clk_freq * st->clk_freq;
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else
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scaled_rate = 2100000 / scaled_rate * scaled_rate;
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scaled_rate = max_sample_rate / scaled_rate * scaled_rate;
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/*
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* This is not an hard requirement but it's not advised to run the IMU
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* with a sample rate lower than 1900Hz due to possible undersampling
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* issues. However, there are users that might really want to take the risk.
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* Hence, we provide a module parameter for them. If set, we allow sample
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* rates lower than 1.9KHz. By default, we won't allow this and we just roundup
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* the rate to the next multiple of the input clock bigger than 1.9KHz. This
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* is done like this as in some cases (when DEC_RATE is 0) might give
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* us the closest value to the one desired by the user...
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* with a sample rate lower than internal clock frequency, due to possible
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* undersampling issues. However, there are users that might really want
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* to take the risk. Hence, we provide a module parameter for them. If set,
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* we allow sample rates lower than internal clock frequency.
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* By default, we won't allow this and we just roundup the rate to the next
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* multiple of the input clock. This is done like this as in some cases
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* (when DEC_RATE is 0) might give us the closest value to the one desired
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* by the user...
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*/
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if (scaled_rate < 1900000 && !low_rate_allow)
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scaled_rate = roundup(1900000, st->clk_freq);
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if (scaled_rate < min_sample_rate && !low_rate_allow)
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scaled_rate = roundup(min_sample_rate, st->clk_freq);
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sync_scale = scaled_rate / st->clk_freq;
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ret = __adis_write_reg_16(&st->adis, ADIS16475_REG_UP_SCALE, sync_scale);
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@ -1317,6 +1322,7 @@ static int adis16475_config_sync_mode(struct adis16475 *st)
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struct device *dev = &st->adis.spi->dev;
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const struct adis16475_sync *sync;
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u32 sync_mode;
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u16 max_sample_rate = st->info->int_clk + 100;
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u16 val;
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/* default to internal clk */
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@ -1357,10 +1363,9 @@ static int adis16475_config_sync_mode(struct adis16475 *st)
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/*
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* In sync scaled mode, the IMU sample rate is the clk_freq * sync_scale.
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* Hence, default the IMU sample rate to the highest multiple of the input
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* clock lower than the IMU max sample rate. The optimal range is
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* 1900-2100 sps...
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* clock lower than the IMU max sample rate.
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*/
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up_scale = 2100 / st->clk_freq;
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up_scale = max_sample_rate / st->clk_freq;
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ret = __adis_write_reg_16(&st->adis,
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ADIS16475_REG_UP_SCALE,
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