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net: ipa: define GSI CH_C_QOS register fields

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Define the fields within the CH_C_QOS GSI register using an array of
field masks in that register's reg structure.  Use the reg functions
for encoding values in those fields.

One field in the register is present for IPA v4.0-4.2 only, two
others are present starting at IPA v4.5, and one more is there
starting at IPA v4.9.

Drop the "GSI_" prefix in symbols defined in the gsi_prefetch_mode
enumerated type, and define their values using decimal rather than
hexidecimal values.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Alex Elder 2023-02-13 10:22:25 -06:00 committed by Jakub Kicinski
parent 4a4270cff6
commit f50ca7cef7
7 changed files with 72 additions and 26 deletions
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13
drivers/net/ipa/gsi.c
View File

@ -889,14 +889,14 @@ static void gsi_channel_program(struct gsi_channel *channel, bool doorbell)
/* Command channel gets low weighted round-robin priority */
if (channel->command)
wrr_weight = field_max(WRR_WEIGHT_FMASK);
val = u32_encode_bits(wrr_weight, WRR_WEIGHT_FMASK);
wrr_weight = reg_field_max(reg, WRR_WEIGHT);
val = reg_encode(reg, WRR_WEIGHT, wrr_weight);
/* Max prefetch is 1 segment (do not set MAX_PREFETCH_FMASK) */
/* No need to use the doorbell engine starting at IPA v4.0 */
if (gsi->version < IPA_VERSION_4_0 && doorbell)
val |= USE_DB_ENG_FMASK;
val |= reg_bit(reg, USE_DB_ENG);
/* v4.0 introduces an escape buffer for prefetch. We use it
* on all but the AP command channel.
@ -904,14 +904,13 @@ static void gsi_channel_program(struct gsi_channel *channel, bool doorbell)
if (gsi->version >= IPA_VERSION_4_0 && !channel->command) {
/* If not otherwise set, prefetch buffers are used */
if (gsi->version < IPA_VERSION_4_5)
val |= USE_ESCAPE_BUF_ONLY_FMASK;
val |= reg_bit(reg, USE_ESCAPE_BUF_ONLY);
else
val |= u32_encode_bits(GSI_ESCAPE_BUF_ONLY,
PREFETCH_MODE_FMASK);
val |= reg_encode(reg, PREFETCH_MODE, ESCAPE_BUF_ONLY);
}
/* All channels set DB_IN_BYTES */
if (gsi->version >= IPA_VERSION_4_9)
val |= DB_IN_BYTES;
val |= reg_bit(reg, DB_IN_BYTES);
iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));

27
drivers/net/ipa/gsi_reg.h
View File

@ -121,23 +121,22 @@ enum gsi_channel_type {
};
/* CH_C_QOS register */
#define WRR_WEIGHT_FMASK GENMASK(3, 0)
#define MAX_PREFETCH_FMASK GENMASK(8, 8)
#define USE_DB_ENG_FMASK GENMASK(9, 9)
/* The next field is only present for IPA v4.0, v4.1, and v4.2 */
#define USE_ESCAPE_BUF_ONLY_FMASK GENMASK(10, 10)
/* The next two fields are present for IPA v4.5 and above */
#define PREFETCH_MODE_FMASK GENMASK(13, 10)
#define EMPTY_LVL_THRSHOLD_FMASK GENMASK(23, 16)
/* The next field is present for IPA v4.9 and above */
#define DB_IN_BYTES GENMASK(24, 24)
enum gsi_reg_ch_c_qos_field_id {
WRR_WEIGHT,
MAX_PREFETCH,
USE_DB_ENG,
USE_ESCAPE_BUF_ONLY, /* IPA v4.0-4.2 */
PREFETCH_MODE, /* IPA v4.5+ */
EMPTY_LVL_THRSHOLD, /* IPA v4.5+ */
DB_IN_BYTES, /* IPA v4.9+ */
};
/** enum gsi_prefetch_mode - PREFETCH_MODE field in CH_C_QOS */
enum gsi_prefetch_mode {
GSI_USE_PREFETCH_BUFS = 0x0,
GSI_ESCAPE_BUF_ONLY = 0x1,
GSI_SMART_PREFETCH = 0x2,
GSI_FREE_PREFETCH = 0x3,
USE_PREFETCH_BUFS = 0,
ESCAPE_BUF_ONLY = 1,
SMART_PREFETCH = 2,
FREE_PREFETCH = 3,
};
/* EV_CH_E_CNTXT_0 register */

10
drivers/net/ipa/reg/gsi_reg-v3.1.c
View File

@ -26,7 +26,15 @@ REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80);
REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80);
REG_STRIDE(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
static const u32 reg_ch_c_qos_fmask[] = {
[WRR_WEIGHT] = GENMASK(3, 0),
/* Bits 4-7 reserved */
[MAX_PREFETCH] = BIT(8),
[USE_DB_ENG] = BIT(9),
/* Bits 10-31 reserved */
};
REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
REG(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP);

10
drivers/net/ipa/reg/gsi_reg-v3.5.1.c
View File

@ -26,7 +26,15 @@ REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80);
REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80);
REG_STRIDE(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
static const u32 reg_ch_c_qos_fmask[] = {
[WRR_WEIGHT] = GENMASK(3, 0),
/* Bits 4-7 reserved */
[MAX_PREFETCH] = BIT(8),
[USE_DB_ENG] = BIT(9),
/* Bits 10-31 reserved */
};
REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
REG(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP);

11
drivers/net/ipa/reg/gsi_reg-v4.0.c
View File

@ -26,7 +26,16 @@ REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80);
REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80);
REG_STRIDE(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
static const u32 reg_ch_c_qos_fmask[] = {
[WRR_WEIGHT] = GENMASK(3, 0),
/* Bits 4-7 reserved */
[MAX_PREFETCH] = BIT(8),
[USE_DB_ENG] = BIT(9),
[USE_ESCAPE_BUF_ONLY] = BIT(10),
/* Bits 11-31 reserved */
};
REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
REG(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP);

13
drivers/net/ipa/reg/gsi_reg-v4.5.c
View File

@ -26,7 +26,18 @@ REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80);
REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80);
REG_STRIDE(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
static const u32 reg_ch_c_qos_fmask[] = {
[WRR_WEIGHT] = GENMASK(3, 0),
/* Bits 4-7 reserved */
[MAX_PREFETCH] = BIT(8),
[USE_DB_ENG] = BIT(9),
[PREFETCH_MODE] = GENMASK(13, 10),
/* Bits 14-15 reserved */
[EMPTY_LVL_THRSHOLD] = GENMASK(23, 16),
/* Bits 24-31 reserved */
};
REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
REG(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP);

14
drivers/net/ipa/reg/gsi_reg-v4.9.c
View File

@ -26,7 +26,19 @@ REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80);
REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80);
REG_STRIDE(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
static const u32 reg_ch_c_qos_fmask[] = {
[WRR_WEIGHT] = GENMASK(3, 0),
/* Bits 4-7 reserved */
[MAX_PREFETCH] = BIT(8),
[USE_DB_ENG] = BIT(9),
[PREFETCH_MODE] = GENMASK(13, 10),
/* Bits 14-15 reserved */
[EMPTY_LVL_THRSHOLD] = GENMASK(23, 16),
[DB_IN_BYTES] = BIT(24),
/* Bits 25-31 reserved */
};
REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
REG(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP);