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dmaengine: ti: omap-dma: Use cpu notifier to block idle for omap2
For omap2, we need to block idle if SDMA is busy. Let's do this with a cpu notifier and remove the custom call. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Vinod Koul <vkoul@kernel.org> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -83,8 +83,6 @@ static int omap2_enter_full_retention(void)
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l = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0) | OMAP24XX_USBSTANDBYCTRL;
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omap_ctrl_writel(l, OMAP2_CONTROL_DEVCONF0);
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cpu_cluster_pm_enter();
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/* One last check for pending IRQs to avoid extra latency due
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* to sleeping unnecessarily. */
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if (omap_irq_pending())
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@ -96,8 +94,6 @@ static int omap2_enter_full_retention(void)
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OMAP_SDRC_REGADDR(SDRC_POWER));
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no_sleep:
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cpu_cluster_pm_exit();
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clk_enable(osc_ck);
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/* clear CORE wake-up events */
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@ -162,25 +158,27 @@ static int omap2_can_sleep(void)
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return 0;
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if (__clk_is_enabled(osc_ck))
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return 0;
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if (omap_dma_running())
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return 0;
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return 1;
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}
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static void omap2_pm_idle(void)
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{
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if (!omap2_can_sleep()) {
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if (omap_irq_pending())
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return;
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omap2_enter_mpu_retention();
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return;
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}
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int error;
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if (omap_irq_pending())
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return;
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error = cpu_cluster_pm_enter();
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if (error || !omap2_can_sleep()) {
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omap2_enter_mpu_retention();
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goto out_cpu_cluster_pm;
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}
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omap2_enter_full_retention();
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out_cpu_cluster_pm:
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cpu_cluster_pm_exit();
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}
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static void __init prcm_setup_regs(void)
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@ -27,6 +27,7 @@
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struct omap_dma_config {
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int lch_end;
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unsigned int rw_priority:1;
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unsigned int needs_busy_check:1;
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unsigned int may_lose_context:1;
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unsigned int needs_lch_clear:1;
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};
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@ -1521,6 +1522,38 @@ static void omap_dma_free(struct omap_dmadev *od)
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}
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}
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/* Currently only used for omap2. For omap1, also a check for lcd_dma is needed */
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static int omap_dma_busy_notifier(struct notifier_block *nb,
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unsigned long cmd, void *v)
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{
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struct omap_dmadev *od;
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struct omap_chan *c;
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int lch = -1;
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od = container_of(nb, struct omap_dmadev, nb);
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switch (cmd) {
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case CPU_CLUSTER_PM_ENTER:
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while (1) {
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lch = find_next_bit(od->lch_bitmap, od->lch_count,
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lch + 1);
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if (lch >= od->lch_count)
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break;
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c = od->lch_map[lch];
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if (!c)
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continue;
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if (omap_dma_chan_read(c, CCR) & CCR_ENABLE)
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return NOTIFY_BAD;
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}
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break;
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case CPU_CLUSTER_PM_ENTER_FAILED:
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case CPU_CLUSTER_PM_EXIT:
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break;
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}
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return NOTIFY_OK;
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}
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/*
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* We are using IRQENABLE_L1, and legacy DMA code was using IRQENABLE_L0.
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* As the DSP may be using IRQENABLE_L2 and L3, let's not touch those for
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@ -1778,7 +1811,10 @@ static int omap_dma_probe(struct platform_device *pdev)
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omap_dma_init_gcr(od, DMA_DEFAULT_ARB_RATE, DMA_DEFAULT_FIFO_DEPTH, 0);
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if (od->cfg->may_lose_context) {
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if (od->cfg->needs_busy_check) {
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od->nb.notifier_call = omap_dma_busy_notifier;
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cpu_pm_register_notifier(&od->nb);
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} else if (od->cfg->may_lose_context) {
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od->nb.notifier_call = omap_dma_context_notifier;
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cpu_pm_register_notifier(&od->nb);
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}
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@ -1822,6 +1858,7 @@ static const struct omap_dma_config omap2420_data = {
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.lch_end = CCFN,
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.rw_priority = true,
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.needs_lch_clear = true,
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.needs_busy_check = true,
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};
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static const struct omap_dma_config omap2430_data = {
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