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cxl/acpi: Convert CFMWS parsing to ACPI sub-table helpers
The cxl_acpi driver originally open-coded its table parsing since the ACPI subtable helpers were marked __init and only used in early NUMA initialization. Now that those helpers have been exported for driver usage replace the open-coded solution with the common one. Cc: Alison Schofield <alison.schofield@intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://lore.kernel.org/r/163553710810.2509508.14686373989517930921.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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@ -51,6 +51,7 @@ config CXL_ACPI
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tristate "CXL ACPI: Platform Support"
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depends on ACPI
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default CXL_BUS
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select ACPI_TABLE_LIB
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help
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Enable support for host managed device memory (HDM) resources
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published by a platform's ACPI CXL memory layout description. See
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@ -8,8 +8,6 @@
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#include <linux/pci.h>
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#include "cxl.h"
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static struct acpi_table_header *acpi_cedt;
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/* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
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#define CFMWS_INTERLEAVE_WAYS(x) (1 << (x)->interleave_ways)
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#define CFMWS_INTERLEAVE_GRANULARITY(x) ((x)->granularity + 8)
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@ -74,134 +72,63 @@ static int cxl_acpi_cfmws_verify(struct device *dev,
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return 0;
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}
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static void cxl_add_cfmws_decoders(struct device *dev,
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struct cxl_port *root_port)
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struct cxl_cfmws_context {
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struct device *dev;
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struct cxl_port *root_port;
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};
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static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg,
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const unsigned long end)
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{
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int target_map[CXL_DECODER_MAX_INTERLEAVE];
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struct cxl_cfmws_context *ctx = arg;
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struct cxl_port *root_port = ctx->root_port;
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struct device *dev = ctx->dev;
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struct acpi_cedt_cfmws *cfmws;
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struct cxl_decoder *cxld;
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acpi_size len, cur = 0;
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void *cedt_subtable;
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int rc;
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int rc, i;
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len = acpi_cedt->length - sizeof(*acpi_cedt);
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cedt_subtable = acpi_cedt + 1;
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cfmws = (struct acpi_cedt_cfmws *) header;
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while (cur < len) {
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struct acpi_cedt_header *c = cedt_subtable + cur;
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int i;
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if (c->type != ACPI_CEDT_TYPE_CFMWS) {
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cur += c->length;
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continue;
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}
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cfmws = cedt_subtable + cur;
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if (cfmws->header.length < sizeof(*cfmws)) {
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dev_warn_once(dev,
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"CFMWS entry skipped:invalid length:%u\n",
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cfmws->header.length);
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cur += c->length;
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continue;
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}
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rc = cxl_acpi_cfmws_verify(dev, cfmws);
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if (rc) {
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dev_err(dev, "CFMWS range %#llx-%#llx not registered\n",
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cfmws->base_hpa, cfmws->base_hpa +
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cfmws->window_size - 1);
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cur += c->length;
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continue;
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}
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for (i = 0; i < CFMWS_INTERLEAVE_WAYS(cfmws); i++)
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target_map[i] = cfmws->interleave_targets[i];
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cxld = cxl_decoder_alloc(root_port,
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CFMWS_INTERLEAVE_WAYS(cfmws));
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if (IS_ERR(cxld))
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goto next;
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cxld->flags = cfmws_to_decoder_flags(cfmws->restrictions);
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cxld->target_type = CXL_DECODER_EXPANDER;
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cxld->range = (struct range) {
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.start = cfmws->base_hpa,
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.end = cfmws->base_hpa + cfmws->window_size - 1,
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};
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cxld->interleave_ways = CFMWS_INTERLEAVE_WAYS(cfmws);
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cxld->interleave_granularity =
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CFMWS_INTERLEAVE_GRANULARITY(cfmws);
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rc = cxl_decoder_add(cxld, target_map);
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if (rc)
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put_device(&cxld->dev);
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else
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rc = cxl_decoder_autoremove(dev, cxld);
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if (rc) {
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dev_err(dev, "Failed to add decoder for %#llx-%#llx\n",
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cfmws->base_hpa, cfmws->base_hpa +
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cfmws->window_size - 1);
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goto next;
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}
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dev_dbg(dev, "add: %s range %#llx-%#llx\n",
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dev_name(&cxld->dev), cfmws->base_hpa,
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rc = cxl_acpi_cfmws_verify(dev, cfmws);
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if (rc) {
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dev_err(dev, "CFMWS range %#llx-%#llx not registered\n",
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cfmws->base_hpa,
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cfmws->base_hpa + cfmws->window_size - 1);
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next:
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cur += c->length;
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}
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}
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static struct acpi_cedt_chbs *cxl_acpi_match_chbs(struct device *dev, u32 uid)
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{
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struct acpi_cedt_chbs *chbs, *chbs_match = NULL;
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acpi_size len, cur = 0;
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void *cedt_subtable;
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len = acpi_cedt->length - sizeof(*acpi_cedt);
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cedt_subtable = acpi_cedt + 1;
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while (cur < len) {
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struct acpi_cedt_header *c = cedt_subtable + cur;
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if (c->type != ACPI_CEDT_TYPE_CHBS) {
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cur += c->length;
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continue;
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}
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chbs = cedt_subtable + cur;
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if (chbs->header.length < sizeof(*chbs)) {
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dev_warn_once(dev,
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"CHBS entry skipped: invalid length:%u\n",
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chbs->header.length);
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cur += c->length;
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continue;
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}
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if (chbs->uid != uid) {
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cur += c->length;
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continue;
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}
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if (chbs_match) {
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dev_warn_once(dev,
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"CHBS entry skipped: duplicate UID:%u\n",
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uid);
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cur += c->length;
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continue;
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}
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chbs_match = chbs;
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cur += c->length;
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return 0;
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}
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return chbs_match ? chbs_match : ERR_PTR(-ENODEV);
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}
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for (i = 0; i < CFMWS_INTERLEAVE_WAYS(cfmws); i++)
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target_map[i] = cfmws->interleave_targets[i];
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static resource_size_t get_chbcr(struct acpi_cedt_chbs *chbs)
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{
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return IS_ERR(chbs) ? CXL_RESOURCE_NONE : chbs->base;
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cxld = cxl_decoder_alloc(root_port, CFMWS_INTERLEAVE_WAYS(cfmws));
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if (IS_ERR(cxld))
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return 0;
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cxld->flags = cfmws_to_decoder_flags(cfmws->restrictions);
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cxld->target_type = CXL_DECODER_EXPANDER;
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cxld->range = (struct range){
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.start = cfmws->base_hpa,
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.end = cfmws->base_hpa + cfmws->window_size - 1,
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};
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cxld->interleave_ways = CFMWS_INTERLEAVE_WAYS(cfmws);
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cxld->interleave_granularity = CFMWS_INTERLEAVE_GRANULARITY(cfmws);
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rc = cxl_decoder_add(cxld, target_map);
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if (rc)
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put_device(&cxld->dev);
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else
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rc = cxl_decoder_autoremove(dev, cxld);
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if (rc) {
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dev_err(dev, "Failed to add decoder for %#llx-%#llx\n",
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cfmws->base_hpa,
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cfmws->base_hpa + cfmws->window_size - 1);
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return 0;
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}
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dev_dbg(dev, "add: %s range %#llx-%#llx\n", dev_name(&cxld->dev),
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cfmws->base_hpa, cfmws->base_hpa + cfmws->window_size - 1);
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return 0;
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}
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__mock int match_add_root_ports(struct pci_dev *pdev, void *data)
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@ -355,12 +282,35 @@ static int add_host_bridge_uport(struct device *match, void *arg)
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return rc;
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}
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struct cxl_chbs_context {
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unsigned long long uid;
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resource_size_t chbcr;
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};
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static int cxl_get_chbcr(union acpi_subtable_headers *header, void *arg,
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const unsigned long end)
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{
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struct cxl_chbs_context *ctx = arg;
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struct acpi_cedt_chbs *chbs;
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if (ctx->chbcr)
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return 0;
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chbs = (struct acpi_cedt_chbs *) header;
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if (ctx->uid != chbs->uid)
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return 0;
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ctx->chbcr = chbs->base;
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return 0;
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}
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static int add_host_bridge_dport(struct device *match, void *arg)
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{
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int rc;
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acpi_status status;
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unsigned long long uid;
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struct acpi_cedt_chbs *chbs;
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struct cxl_chbs_context ctx;
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struct cxl_port *root_port = arg;
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struct device *host = root_port->dev.parent;
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struct acpi_device *bridge = to_cxl_host_bridge(host, match);
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@ -376,14 +326,18 @@ static int add_host_bridge_dport(struct device *match, void *arg)
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return -ENODEV;
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}
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chbs = cxl_acpi_match_chbs(host, uid);
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if (IS_ERR(chbs)) {
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ctx = (struct cxl_chbs_context) {
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.uid = uid,
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};
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acpi_table_parse_cedt(ACPI_CEDT_TYPE_CHBS, cxl_get_chbcr, &ctx);
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if (ctx.chbcr == 0) {
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dev_warn(host, "No CHBS found for Host Bridge: %s\n",
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dev_name(match));
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return 0;
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}
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rc = cxl_add_dport(root_port, match, uid, get_chbcr(chbs));
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rc = cxl_add_dport(root_port, match, uid, ctx.chbcr);
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if (rc) {
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dev_err(host, "failed to add downstream port: %s\n",
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dev_name(match));
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@ -417,40 +371,29 @@ static int add_root_nvdimm_bridge(struct device *match, void *data)
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return 1;
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}
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static u32 cedt_instance(struct platform_device *pdev)
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{
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const bool *native_acpi0017 = acpi_device_get_match_data(&pdev->dev);
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if (native_acpi0017 && *native_acpi0017)
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return 0;
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/* for cxl_test request a non-canonical instance */
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return U32_MAX;
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}
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static int cxl_acpi_probe(struct platform_device *pdev)
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{
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int rc;
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acpi_status status;
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struct cxl_port *root_port;
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struct device *host = &pdev->dev;
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struct acpi_device *adev = ACPI_COMPANION(host);
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struct cxl_cfmws_context ctx;
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root_port = devm_cxl_add_port(host, host, CXL_RESOURCE_NONE, NULL);
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if (IS_ERR(root_port))
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return PTR_ERR(root_port);
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dev_dbg(host, "add: %s\n", dev_name(&root_port->dev));
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status = acpi_get_table(ACPI_SIG_CEDT, cedt_instance(pdev), &acpi_cedt);
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if (ACPI_FAILURE(status))
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return -ENXIO;
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rc = bus_for_each_dev(adev->dev.bus, NULL, root_port,
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add_host_bridge_dport);
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if (rc)
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goto out;
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if (rc < 0)
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return rc;
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cxl_add_cfmws_decoders(host, root_port);
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ctx = (struct cxl_cfmws_context) {
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.dev = host,
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.root_port = root_port,
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};
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acpi_table_parse_cedt(ACPI_CEDT_TYPE_CFMWS, cxl_parse_cfmws, &ctx);
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/*
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* Root level scanned with host-bridge as dports, now scan host-bridges
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@ -458,24 +401,20 @@ static int cxl_acpi_probe(struct platform_device *pdev)
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*/
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rc = bus_for_each_dev(adev->dev.bus, NULL, root_port,
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add_host_bridge_uport);
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if (rc)
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goto out;
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if (rc < 0)
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return rc;
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if (IS_ENABLED(CONFIG_CXL_PMEM))
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rc = device_for_each_child(&root_port->dev, root_port,
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add_root_nvdimm_bridge);
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out:
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acpi_put_table(acpi_cedt);
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if (rc < 0)
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return rc;
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return 0;
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}
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static bool native_acpi0017 = true;
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static const struct acpi_device_id cxl_acpi_ids[] = {
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{ "ACPI0017", (unsigned long) &native_acpi0017 },
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{ "ACPI0017" },
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{ },
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};
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MODULE_DEVICE_TABLE(acpi, cxl_acpi_ids);
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@ -491,3 +430,4 @@ static struct platform_driver cxl_acpi_driver = {
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module_platform_driver(cxl_acpi_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_IMPORT_NS(CXL);
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MODULE_IMPORT_NS(ACPI);
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