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RDMA/mlx5: Fix xlt_chunk_align calculation

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The XLT chunk alignment depends on ent_size not sizeof(ent_size) aka
sizeof(size_t). The incoming ent_size is either 8 or 16, so the
miscalculation when 16 is required is only an over-alignment and
functional harmless.

Fixes: 8010d74b99 ("RDMA/mlx5: Split the WR setup out of mlx5_ib_update_xlt()")
Link: https://lore.kernel.org/r/20210908081849.7948-2-schnelle@linux.ibm.com
Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
This commit is contained in:
Niklas Schnelle 2021-09-08 10:18:49 +02:00 committed by Jason Gunthorpe
parent 9660dcbe0d
commit f4c6f31011
1 changed files with 1 additions and 1 deletions
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2
drivers/infiniband/hw/mlx5/mr.c
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@ -995,7 +995,7 @@ static struct mlx5_ib_mr *alloc_cacheable_mr(struct ib_pd *pd,
static void *mlx5_ib_alloc_xlt(size_t *nents, size_t ent_size, gfp_t gfp_mask)
{
const size_t xlt_chunk_align =
MLX5_UMR_MTT_ALIGNMENT / sizeof(ent_size);
MLX5_UMR_MTT_ALIGNMENT / ent_size;
size_t size;
void *res = NULL;