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drm/i915: Extract intel_crtc_vblank_evade_scanlines()
Pull the vblank evasion scanline calculations into their own helper to declutter intel_pipe_update_start() a bit. Reviewed-by: Manasi Navare <navaremanasi@chromium.org> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230901130440.2085-4-ville.syrjala@linux.intel.com Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
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@ -468,6 +468,36 @@ static int intel_mode_vblank_start(const struct drm_display_mode *mode)
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return vblank_start;
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return vblank_start;
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}
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}
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static void intel_crtc_vblank_evade_scanlines(struct intel_atomic_state *state,
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struct intel_crtc *crtc,
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int *min, int *max, int *vblank_start)
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{
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const struct intel_crtc_state *new_crtc_state =
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intel_atomic_get_new_crtc_state(state, crtc);
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const struct drm_display_mode *adjusted_mode = &new_crtc_state->hw.adjusted_mode;
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if (new_crtc_state->vrr.enable) {
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if (intel_vrr_is_push_sent(new_crtc_state))
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*vblank_start = intel_vrr_vmin_vblank_start(new_crtc_state);
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else
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*vblank_start = intel_vrr_vmax_vblank_start(new_crtc_state);
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} else {
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*vblank_start = intel_mode_vblank_start(adjusted_mode);
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}
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/* FIXME needs to be calibrated sensibly */
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*min = *vblank_start - intel_usecs_to_scanlines(adjusted_mode,
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VBLANK_EVASION_TIME_US);
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*max = *vblank_start - 1;
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/*
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* M/N is double buffered on the transcoder's undelayed vblank,
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* so with seamless M/N we must evade both vblanks.
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*/
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if (new_crtc_state->seamless_m_n && intel_crtc_needs_fastset(new_crtc_state))
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*min -= adjusted_mode->crtc_vblank_start - adjusted_mode->crtc_vdisplay;
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}
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/**
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/**
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* intel_pipe_update_start() - start update of a set of display registers
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* intel_pipe_update_start() - start update of a set of display registers
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* @state: the atomic state
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* @state: the atomic state
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@ -487,7 +517,6 @@ void intel_pipe_update_start(struct intel_atomic_state *state,
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct intel_crtc_state *new_crtc_state =
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struct intel_crtc_state *new_crtc_state =
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intel_atomic_get_new_crtc_state(state, crtc);
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intel_atomic_get_new_crtc_state(state, crtc);
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const struct drm_display_mode *adjusted_mode = &new_crtc_state->hw.adjusted_mode;
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long timeout = msecs_to_jiffies_timeout(1);
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long timeout = msecs_to_jiffies_timeout(1);
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int scanline, min, max, vblank_start;
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int scanline, min, max, vblank_start;
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wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
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wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
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@ -503,27 +532,7 @@ void intel_pipe_update_start(struct intel_atomic_state *state,
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if (intel_crtc_needs_vblank_work(new_crtc_state))
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if (intel_crtc_needs_vblank_work(new_crtc_state))
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intel_crtc_vblank_work_init(new_crtc_state);
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intel_crtc_vblank_work_init(new_crtc_state);
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if (new_crtc_state->vrr.enable) {
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intel_crtc_vblank_evade_scanlines(state, crtc, &min, &max, &vblank_start);
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if (intel_vrr_is_push_sent(new_crtc_state))
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vblank_start = intel_vrr_vmin_vblank_start(new_crtc_state);
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else
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vblank_start = intel_vrr_vmax_vblank_start(new_crtc_state);
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} else {
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vblank_start = intel_mode_vblank_start(adjusted_mode);
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}
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/* FIXME needs to be calibrated sensibly */
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min = vblank_start - intel_usecs_to_scanlines(adjusted_mode,
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VBLANK_EVASION_TIME_US);
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max = vblank_start - 1;
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/*
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* M/N is double buffered on the transcoder's undelayed vblank,
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* so with seamless M/N we must evade both vblanks.
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*/
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if (new_crtc_state->seamless_m_n && intel_crtc_needs_fastset(new_crtc_state))
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min -= adjusted_mode->crtc_vblank_start - adjusted_mode->crtc_vdisplay;
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if (min <= 0 || max <= 0)
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if (min <= 0 || max <= 0)
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goto irq_disable;
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goto irq_disable;
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