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clocksource/drivers/exynos_mct: Bump up mct max irq number
Bump-up maximum number of MCT IRQ to match the binding documentation. This make driver scalable for SoC which has more than 12 timer irqs, like recently added FSD SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220221174547.26176-2-alim.akhtar@samsung.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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@ -64,7 +64,8 @@
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#define MCT_G0_IRQ 0
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/* Local timers count starts after global timer count */
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#define MCT_L0_IRQ 4
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#define MCT_NR_IRQS 12
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/* Max number of IRQ as per DT binding document */
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#define MCT_NR_IRQS 20
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enum {
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MCT_INT_SPI,
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