mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-27 22:24:11 +08:00
powerpc/qe: add polling timeout to qe_issue_cmd()
The qe_issue_cmd() function (Freescale PowerPC QUICC Engine library) polls on a register until a status bit changes, but does not include a timeout to handle the situation if the bit never changes. Change the code to use the new spin_event_timeout() macro, which simplifies polling on a register without a timeout. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
parent
b71a107c66
commit
f49156ea1b
@ -112,6 +112,7 @@ int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input)
|
||||
{
|
||||
unsigned long flags;
|
||||
u8 mcn_shift = 0, dev_shift = 0;
|
||||
u32 ret;
|
||||
|
||||
spin_lock_irqsave(&qe_lock, flags);
|
||||
if (cmd == QE_RESET) {
|
||||
@ -139,11 +140,13 @@ int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input)
|
||||
}
|
||||
|
||||
/* wait for the QE_CR_FLG to clear */
|
||||
while(in_be32(&qe_immr->cp.cecr) & QE_CR_FLG)
|
||||
cpu_relax();
|
||||
ret = spin_event_timeout((in_be32(&qe_immr->cp.cecr) & QE_CR_FLG) == 0,
|
||||
100, 0);
|
||||
/* On timeout (e.g. failure), the expression will be false (ret == 0),
|
||||
otherwise it will be true (ret == 1). */
|
||||
spin_unlock_irqrestore(&qe_lock, flags);
|
||||
|
||||
return 0;
|
||||
return ret == 1;
|
||||
}
|
||||
EXPORT_SYMBOL(qe_issue_cmd);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user