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drm/nouveau/disp: rename nvkm_output_dp to nvkm_dp
Not all users of nvkm_output_dp have been changed here. The remaining ones belong to code that's disappearing in upcoming commits. This also modifies the debug level of some messages. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
d7ce92e273
commit
f3e70d2991
@ -32,7 +32,7 @@
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#include <nvif/event.h>
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struct lt_state {
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struct nvkm_output_dp *outp;
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struct nvkm_dp *dp;
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int link_nr;
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u32 link_bw;
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u8 stat[6];
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@ -45,26 +45,26 @@ struct lt_state {
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static int
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nvkm_dp_train_sense(struct lt_state *lt, bool pc, u32 delay)
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{
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struct nvkm_output_dp *outp = lt->outp;
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struct nvkm_dp *dp = lt->dp;
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int ret;
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if (outp->dpcd[DPCD_RC0E_AUX_RD_INTERVAL])
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mdelay(outp->dpcd[DPCD_RC0E_AUX_RD_INTERVAL] * 4);
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if (dp->dpcd[DPCD_RC0E_AUX_RD_INTERVAL])
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mdelay(dp->dpcd[DPCD_RC0E_AUX_RD_INTERVAL] * 4);
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else
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udelay(delay);
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ret = nvkm_rdaux(outp->aux, DPCD_LS02, lt->stat, 6);
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ret = nvkm_rdaux(dp->aux, DPCD_LS02, lt->stat, 6);
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if (ret)
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return ret;
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if (pc) {
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ret = nvkm_rdaux(outp->aux, DPCD_LS0C, <->pc2stat, 1);
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ret = nvkm_rdaux(dp->aux, DPCD_LS0C, <->pc2stat, 1);
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if (ret)
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lt->pc2stat = 0x00;
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OUTP_DBG(&outp->base, "status %6ph pc2 %02x",
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lt->stat, lt->pc2stat);
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OUTP_TRACE(&dp->outp, "status %6ph pc2 %02x",
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lt->stat, lt->pc2stat);
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} else {
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OUTP_DBG(&outp->base, "status %6ph", lt->stat);
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OUTP_TRACE(&dp->outp, "status %6ph", lt->stat);
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}
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return 0;
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@ -73,7 +73,7 @@ nvkm_dp_train_sense(struct lt_state *lt, bool pc, u32 delay)
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static int
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nvkm_dp_train_drive(struct lt_state *lt, bool pc)
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{
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struct nvkm_output_dp *outp = lt->outp;
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struct nvkm_dp *dp = lt->dp;
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int ret, i;
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for (i = 0; i < lt->link_nr; i++) {
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@ -98,17 +98,17 @@ nvkm_dp_train_drive(struct lt_state *lt, bool pc)
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lt->conf[i] = (lpre << 3) | lvsw;
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lt->pc2conf[i >> 1] |= lpc2 << ((i & 1) * 4);
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OUTP_DBG(&outp->base, "config lane %d %02x %02x",
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i, lt->conf[i], lpc2);
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outp->func->drv_ctl(outp, i, lvsw & 3, lpre & 3, lpc2 & 3);
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OUTP_TRACE(&dp->outp, "config lane %d %02x %02x",
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i, lt->conf[i], lpc2);
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dp->func->drv_ctl(dp, i, lvsw & 3, lpre & 3, lpc2 & 3);
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}
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ret = nvkm_wraux(outp->aux, DPCD_LC03(0), lt->conf, 4);
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ret = nvkm_wraux(dp->aux, DPCD_LC03(0), lt->conf, 4);
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if (ret)
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return ret;
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if (pc) {
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ret = nvkm_wraux(outp->aux, DPCD_LC0F, lt->pc2conf, 2);
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ret = nvkm_wraux(dp->aux, DPCD_LC0F, lt->pc2conf, 2);
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if (ret)
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return ret;
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}
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@ -119,26 +119,25 @@ nvkm_dp_train_drive(struct lt_state *lt, bool pc)
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static void
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nvkm_dp_train_pattern(struct lt_state *lt, u8 pattern)
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{
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struct nvkm_output_dp *outp = lt->outp;
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struct nvkm_dp *dp = lt->dp;
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u8 sink_tp;
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OUTP_DBG(&outp->base, "training pattern %d", pattern);
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outp->func->pattern(outp, pattern);
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OUTP_TRACE(&dp->outp, "training pattern %d", pattern);
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dp->func->pattern(dp, pattern);
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nvkm_rdaux(outp->aux, DPCD_LC02, &sink_tp, 1);
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nvkm_rdaux(dp->aux, DPCD_LC02, &sink_tp, 1);
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sink_tp &= ~DPCD_LC02_TRAINING_PATTERN_SET;
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sink_tp |= pattern;
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nvkm_wraux(outp->aux, DPCD_LC02, &sink_tp, 1);
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nvkm_wraux(dp->aux, DPCD_LC02, &sink_tp, 1);
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}
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static int
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nvkm_dp_train_eq(struct lt_state *lt)
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{
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struct nvkm_output_dp *outp = lt->outp;
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bool eq_done = false, cr_done = true;
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int tries = 0, i;
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if (outp->dpcd[2] & DPCD_RC02_TPS3_SUPPORTED)
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if (lt->dp->dpcd[2] & DPCD_RC02_TPS3_SUPPORTED)
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nvkm_dp_train_pattern(lt, 3);
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else
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nvkm_dp_train_pattern(lt, 2);
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@ -200,15 +199,15 @@ nvkm_dp_train_cr(struct lt_state *lt)
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static int
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nvkm_dp_train_links(struct lt_state *lt)
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{
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struct nvkm_output_dp *outp = lt->outp;
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struct nvkm_disp *disp = outp->base.disp;
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struct nvkm_dp *dp = lt->dp;
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struct nvkm_disp *disp = dp->outp.disp;
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struct nvkm_subdev *subdev = &disp->engine.subdev;
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struct nvkm_bios *bios = subdev->device->bios;
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struct nvbios_init init = {
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.subdev = subdev,
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.bios = bios,
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.offset = 0x0000,
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.outp = &outp->base.info,
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.outp = &dp->outp.info,
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.crtc = -1,
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.execute = 1,
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};
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@ -216,16 +215,16 @@ nvkm_dp_train_links(struct lt_state *lt)
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u8 sink[2];
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int ret;
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OUTP_DBG(&outp->base, "%d lanes at %d KB/s", lt->link_nr, lt->link_bw);
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OUTP_DBG(&dp->outp, "%d lanes at %d KB/s", lt->link_nr, lt->link_bw);
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/* Intersect misc. capabilities of the OR and sink. */
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if (disp->engine.subdev.device->chipset < 0xd0)
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outp->dpcd[2] &= ~DPCD_RC02_TPS3_SUPPORTED;
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lt->pc2 = outp->dpcd[2] & DPCD_RC02_TPS3_SUPPORTED;
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dp->dpcd[2] &= ~DPCD_RC02_TPS3_SUPPORTED;
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lt->pc2 = dp->dpcd[2] & DPCD_RC02_TPS3_SUPPORTED;
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/* Set desired link configuration on the source. */
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if ((lnkcmp = lt->outp->info.lnkcmp)) {
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if (outp->version < 0x30) {
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if ((lnkcmp = lt->dp->info.lnkcmp)) {
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if (dp->version < 0x30) {
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while ((lt->link_bw / 10) < nvbios_rd16(bios, lnkcmp))
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lnkcmp += 4;
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init.offset = nvbios_rd16(bios, lnkcmp + 2);
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@ -238,68 +237,66 @@ nvkm_dp_train_links(struct lt_state *lt)
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nvbios_exec(&init);
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}
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ret = outp->func->lnk_ctl(outp, lt->link_nr, lt->link_bw / 27000,
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outp->dpcd[DPCD_RC02] &
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DPCD_RC02_ENHANCED_FRAME_CAP);
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ret = dp->func->lnk_ctl(dp, lt->link_nr, lt->link_bw / 27000,
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dp->dpcd[DPCD_RC02] &
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DPCD_RC02_ENHANCED_FRAME_CAP);
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if (ret) {
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if (ret < 0)
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OUTP_ERR(&outp->base, "lnk_ctl failed with %d", ret);
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OUTP_ERR(&dp->outp, "lnk_ctl failed with %d", ret);
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return ret;
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}
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outp->func->lnk_pwr(outp, lt->link_nr);
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dp->func->lnk_pwr(dp, lt->link_nr);
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/* Set desired link configuration on the sink. */
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sink[0] = lt->link_bw / 27000;
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sink[1] = lt->link_nr;
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if (outp->dpcd[DPCD_RC02] & DPCD_RC02_ENHANCED_FRAME_CAP)
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if (dp->dpcd[DPCD_RC02] & DPCD_RC02_ENHANCED_FRAME_CAP)
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sink[1] |= DPCD_LC01_ENHANCED_FRAME_EN;
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return nvkm_wraux(outp->aux, DPCD_LC00_LINK_BW_SET, sink, 2);
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return nvkm_wraux(dp->aux, DPCD_LC00_LINK_BW_SET, sink, 2);
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}
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static void
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nvkm_dp_train_fini(struct lt_state *lt)
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{
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struct nvkm_output_dp *outp = lt->outp;
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struct nvkm_disp *disp = outp->base.disp;
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struct nvkm_subdev *subdev = &disp->engine.subdev;
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struct nvkm_dp *dp = lt->dp;
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struct nvkm_subdev *subdev = &dp->outp.disp->engine.subdev;
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struct nvbios_init init = {
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.subdev = subdev,
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.bios = subdev->device->bios,
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.outp = &outp->base.info,
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.outp = &dp->outp.info,
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.crtc = -1,
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.execute = 1,
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};
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/* Execute AfterLinkTraining script from DP Info table. */
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init.offset = outp->info.script[1],
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init.offset = dp->info.script[1],
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nvbios_exec(&init);
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}
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static void
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nvkm_dp_train_init(struct lt_state *lt, bool spread)
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{
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struct nvkm_output_dp *outp = lt->outp;
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struct nvkm_disp *disp = outp->base.disp;
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struct nvkm_subdev *subdev = &disp->engine.subdev;
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struct nvkm_dp *dp = lt->dp;
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struct nvkm_subdev *subdev = &dp->outp.disp->engine.subdev;
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struct nvbios_init init = {
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.subdev = subdev,
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.bios = subdev->device->bios,
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.outp = &outp->base.info,
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.outp = &dp->outp.info,
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.crtc = -1,
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.execute = 1,
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};
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/* Execute EnableSpread/DisableSpread script from DP Info table. */
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if (spread)
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init.offset = outp->info.script[2];
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init.offset = dp->info.script[2];
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else
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init.offset = outp->info.script[3];
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init.offset = dp->info.script[3];
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nvbios_exec(&init);
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/* Execute BeforeLinkTraining script from DP info table. */
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init.offset = outp->info.script[0];
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/* Execute BeforeLinkTraining script from DP Info table. */
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init.offset = dp->info.script[0];
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nvbios_exec(&init);
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}
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@ -321,41 +318,41 @@ static const struct dp_rates {
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};
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static void
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nvkm_dp_train(struct nvkm_output_dp *outp)
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nvkm_dp_train(struct nvkm_dp *dp)
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{
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struct nv50_disp *disp = nv50_disp(outp->base.disp);
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struct nv50_disp *disp = nv50_disp(dp->outp.disp);
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const struct dp_rates *cfg = nvkm_dp_rates - 1;
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struct lt_state lt = {
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.outp = outp,
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.dp = dp,
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};
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u8 pwr;
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int ret;
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if (!outp->base.info.location && disp->func->sor.magic)
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disp->func->sor.magic(&outp->base);
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if (!dp->outp.info.location && disp->func->sor.magic)
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disp->func->sor.magic(&dp->outp);
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if ((outp->dpcd[2] & 0x1f) > outp->base.info.dpconf.link_nr) {
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outp->dpcd[2] &= ~DPCD_RC02_MAX_LANE_COUNT;
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outp->dpcd[2] |= outp->base.info.dpconf.link_nr;
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if ((dp->dpcd[2] & 0x1f) > dp->outp.info.dpconf.link_nr) {
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dp->dpcd[2] &= ~DPCD_RC02_MAX_LANE_COUNT;
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dp->dpcd[2] |= dp->outp.info.dpconf.link_nr;
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}
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if (outp->dpcd[1] > outp->base.info.dpconf.link_bw)
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outp->dpcd[1] = outp->base.info.dpconf.link_bw;
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if (dp->dpcd[1] > dp->outp.info.dpconf.link_bw)
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dp->dpcd[1] = dp->outp.info.dpconf.link_bw;
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/* Ensure sink is not in a low-power state. */
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if (!nvkm_rdaux(outp->aux, DPCD_SC00, &pwr, 1)) {
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if (!nvkm_rdaux(dp->aux, DPCD_SC00, &pwr, 1)) {
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if ((pwr & DPCD_SC00_SET_POWER) != DPCD_SC00_SET_POWER_D0) {
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pwr &= ~DPCD_SC00_SET_POWER;
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pwr |= DPCD_SC00_SET_POWER_D0;
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nvkm_wraux(outp->aux, DPCD_SC00, &pwr, 1);
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nvkm_wraux(dp->aux, DPCD_SC00, &pwr, 1);
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}
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}
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/* Link training. */
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nvkm_dp_train_init(<, outp->dpcd[3] & 0x01);
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nvkm_dp_train_init(<, dp->dpcd[3] & 0x01);
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while (ret = -EIO, (++cfg)->rate) {
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/* Skip configurations not supported by both OR and sink. */
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while (cfg->nr > (outp->dpcd[2] & DPCD_RC02_MAX_LANE_COUNT) ||
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cfg->bw > (outp->dpcd[DPCD_RC01_MAX_LINK_RATE]))
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while (cfg->nr > (dp->dpcd[2] & DPCD_RC02_MAX_LANE_COUNT) ||
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cfg->bw > (dp->dpcd[DPCD_RC01_MAX_LINK_RATE]))
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cfg++;
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lt.link_bw = cfg->bw * 27000;
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lt.link_nr = cfg->nr;
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@ -379,27 +376,27 @@ nvkm_dp_train(struct nvkm_output_dp *outp)
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nvkm_dp_train_pattern(<, 0);
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nvkm_dp_train_fini(<);
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if (ret < 0)
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OUTP_ERR(&outp->base, "link training failed");
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OUTP_ERR(&dp->outp, "training failed");
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OUTP_DBG(&outp->base, "training complete");
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atomic_set(&outp->lt.done, 1);
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OUTP_DBG(&dp->outp, "training done");
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atomic_set(&dp->lt.done, 1);
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}
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int
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nvkm_output_dp_train(struct nvkm_output *base, u32 datarate)
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nvkm_output_dp_train(struct nvkm_outp *outp, u32 datarate)
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{
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struct nvkm_output_dp *outp = nvkm_output_dp(base);
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struct nvkm_dp *dp = nvkm_dp(outp);
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bool retrain = true;
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u8 link[2], stat[3];
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u32 linkrate;
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int ret, i;
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mutex_lock(&outp->mutex);
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mutex_lock(&dp->mutex);
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/* check that the link is trained at a high enough rate */
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ret = nvkm_rdaux(outp->aux, DPCD_LC00_LINK_BW_SET, link, 2);
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ret = nvkm_rdaux(dp->aux, DPCD_LC00_LINK_BW_SET, link, 2);
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if (ret) {
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OUTP_DBG(&outp->base,
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OUTP_DBG(&dp->outp,
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"failed to read link config, assuming no sink");
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goto done;
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}
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@ -408,14 +405,14 @@ nvkm_output_dp_train(struct nvkm_output *base, u32 datarate)
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linkrate = (linkrate * 8) / 10; /* 8B/10B coding overhead */
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datarate = (datarate + 9) / 10; /* -> decakilobits */
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if (linkrate < datarate) {
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OUTP_DBG(&outp->base, "link not trained at sufficient rate");
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OUTP_DBG(&dp->outp, "link not trained at sufficient rate");
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goto done;
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}
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/* check that link is still trained */
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ret = nvkm_rdaux(outp->aux, DPCD_LS02, stat, 3);
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ret = nvkm_rdaux(dp->aux, DPCD_LS02, stat, 3);
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if (ret) {
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OUTP_DBG(&outp->base,
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OUTP_DBG(&dp->outp,
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"failed to read link status, assuming no sink");
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goto done;
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}
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@ -426,71 +423,71 @@ nvkm_output_dp_train(struct nvkm_output *base, u32 datarate)
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if (!(lane & DPCD_LS02_LANE0_CR_DONE) ||
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!(lane & DPCD_LS02_LANE0_CHANNEL_EQ_DONE) ||
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!(lane & DPCD_LS02_LANE0_SYMBOL_LOCKED)) {
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OUTP_DBG(&outp->base,
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OUTP_DBG(&dp->outp,
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"lane %d not equalised", lane);
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goto done;
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}
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}
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retrain = false;
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} else {
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OUTP_DBG(&outp->base, "no inter-lane alignment");
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OUTP_DBG(&dp->outp, "no inter-lane alignment");
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}
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done:
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if (retrain || !atomic_read(&outp->lt.done)) {
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if (retrain || !atomic_read(&dp->lt.done)) {
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/* no sink, but still need to configure source */
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if (outp->dpcd[DPCD_RC00_DPCD_REV] == 0x00) {
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outp->dpcd[DPCD_RC01_MAX_LINK_RATE] =
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outp->base.info.dpconf.link_bw;
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outp->dpcd[DPCD_RC02] =
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outp->base.info.dpconf.link_nr;
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if (dp->dpcd[DPCD_RC00_DPCD_REV] == 0x00) {
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dp->dpcd[DPCD_RC01_MAX_LINK_RATE] =
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dp->outp.info.dpconf.link_bw;
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dp->dpcd[DPCD_RC02] =
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dp->outp.info.dpconf.link_nr;
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}
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nvkm_dp_train(outp);
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nvkm_dp_train(dp);
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}
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||||
|
||||
mutex_unlock(&outp->mutex);
|
||||
mutex_unlock(&dp->mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
nvkm_output_dp_enable(struct nvkm_output_dp *outp, bool enable)
|
||||
nvkm_dp_enable(struct nvkm_dp *dp, bool enable)
|
||||
{
|
||||
struct nvkm_i2c_aux *aux = outp->aux;
|
||||
struct nvkm_i2c_aux *aux = dp->aux;
|
||||
|
||||
if (enable) {
|
||||
if (!outp->present) {
|
||||
OUTP_DBG(&outp->base, "aux power -> always");
|
||||
if (!dp->present) {
|
||||
OUTP_DBG(&dp->outp, "aux power -> always");
|
||||
nvkm_i2c_aux_monitor(aux, true);
|
||||
outp->present = true;
|
||||
dp->present = true;
|
||||
}
|
||||
|
||||
if (!nvkm_rdaux(aux, DPCD_RC00_DPCD_REV, outp->dpcd,
|
||||
sizeof(outp->dpcd))) {
|
||||
nvkm_output_dp_train(&outp->base, 0);
|
||||
if (!nvkm_rdaux(aux, DPCD_RC00_DPCD_REV, dp->dpcd,
|
||||
sizeof(dp->dpcd))) {
|
||||
nvkm_output_dp_train(&dp->outp, 0);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
if (outp->present) {
|
||||
OUTP_DBG(&outp->base, "aux power -> demand");
|
||||
if (dp->present) {
|
||||
OUTP_DBG(&dp->outp, "aux power -> demand");
|
||||
nvkm_i2c_aux_monitor(aux, false);
|
||||
outp->present = false;
|
||||
dp->present = false;
|
||||
}
|
||||
|
||||
atomic_set(&outp->lt.done, 0);
|
||||
atomic_set(&dp->lt.done, 0);
|
||||
}
|
||||
|
||||
static int
|
||||
nvkm_output_dp_hpd(struct nvkm_notify *notify)
|
||||
nvkm_dp_hpd(struct nvkm_notify *notify)
|
||||
{
|
||||
const struct nvkm_i2c_ntfy_rep *line = notify->data;
|
||||
struct nvkm_output_dp *outp = container_of(notify, typeof(*outp), hpd);
|
||||
struct nvkm_connector *conn = outp->base.conn;
|
||||
struct nvkm_disp *disp = outp->base.disp;
|
||||
struct nvkm_dp *dp = container_of(notify, typeof(*dp), hpd);
|
||||
struct nvkm_connector *conn = dp->outp.conn;
|
||||
struct nvkm_disp *disp = dp->outp.disp;
|
||||
struct nvif_notify_conn_rep_v0 rep = {};
|
||||
|
||||
OUTP_DBG(&outp->base, "HPD: %d", line->mask);
|
||||
nvkm_output_dp_enable(outp, true);
|
||||
OUTP_DBG(&dp->outp, "HPD: %d", line->mask);
|
||||
nvkm_dp_enable(dp, true);
|
||||
|
||||
if (line->mask & NVKM_I2C_UNPLUG)
|
||||
rep.mask |= NVIF_NOTIFY_CONN_V0_UNPLUG;
|
||||
@ -502,62 +499,61 @@ nvkm_output_dp_hpd(struct nvkm_notify *notify)
|
||||
}
|
||||
|
||||
static int
|
||||
nvkm_output_dp_irq(struct nvkm_notify *notify)
|
||||
nvkm_dp_irq(struct nvkm_notify *notify)
|
||||
{
|
||||
const struct nvkm_i2c_ntfy_rep *line = notify->data;
|
||||
struct nvkm_output_dp *outp = container_of(notify, typeof(*outp), irq);
|
||||
struct nvkm_connector *conn = outp->base.conn;
|
||||
struct nvkm_disp *disp = outp->base.disp;
|
||||
struct nvkm_dp *dp = container_of(notify, typeof(*dp), irq);
|
||||
struct nvkm_connector *conn = dp->outp.conn;
|
||||
struct nvkm_disp *disp = dp->outp.disp;
|
||||
struct nvif_notify_conn_rep_v0 rep = {
|
||||
.mask = NVIF_NOTIFY_CONN_V0_IRQ,
|
||||
};
|
||||
|
||||
OUTP_DBG(&outp->base, "IRQ: %d", line->mask);
|
||||
nvkm_output_dp_train(&outp->base, 0);
|
||||
OUTP_DBG(&dp->outp, "IRQ: %d", line->mask);
|
||||
nvkm_output_dp_train(&dp->outp, 0);
|
||||
|
||||
nvkm_event_send(&disp->hpd, rep.mask, conn->index, &rep, sizeof(rep));
|
||||
return NVKM_NOTIFY_KEEP;
|
||||
}
|
||||
|
||||
static void
|
||||
nvkm_output_dp_fini(struct nvkm_output *base)
|
||||
nvkm_dp_fini(struct nvkm_outp *outp)
|
||||
{
|
||||
struct nvkm_output_dp *outp = nvkm_output_dp(base);
|
||||
nvkm_notify_put(&outp->hpd);
|
||||
nvkm_notify_put(&outp->irq);
|
||||
nvkm_output_dp_enable(outp, false);
|
||||
struct nvkm_dp *dp = nvkm_dp(outp);
|
||||
nvkm_notify_put(&dp->hpd);
|
||||
nvkm_notify_put(&dp->irq);
|
||||
nvkm_dp_enable(dp, false);
|
||||
}
|
||||
|
||||
static void
|
||||
nvkm_output_dp_init(struct nvkm_output *base)
|
||||
nvkm_dp_init(struct nvkm_outp *outp)
|
||||
{
|
||||
struct nvkm_output_dp *outp = nvkm_output_dp(base);
|
||||
nvkm_notify_put(&outp->base.conn->hpd);
|
||||
nvkm_output_dp_enable(outp, true);
|
||||
nvkm_notify_get(&outp->irq);
|
||||
nvkm_notify_get(&outp->hpd);
|
||||
struct nvkm_dp *dp = nvkm_dp(outp);
|
||||
nvkm_notify_put(&dp->outp.conn->hpd);
|
||||
nvkm_dp_enable(dp, true);
|
||||
nvkm_notify_get(&dp->irq);
|
||||
nvkm_notify_get(&dp->hpd);
|
||||
}
|
||||
|
||||
static void *
|
||||
nvkm_output_dp_dtor(struct nvkm_output *base)
|
||||
nvkm_dp_dtor(struct nvkm_outp *outp)
|
||||
{
|
||||
struct nvkm_output_dp *outp = nvkm_output_dp(base);
|
||||
nvkm_notify_fini(&outp->hpd);
|
||||
nvkm_notify_fini(&outp->irq);
|
||||
return outp;
|
||||
struct nvkm_dp *dp = nvkm_dp(outp);
|
||||
nvkm_notify_fini(&dp->hpd);
|
||||
nvkm_notify_fini(&dp->irq);
|
||||
return dp;
|
||||
}
|
||||
|
||||
static const struct nvkm_output_func
|
||||
nvkm_output_dp_func = {
|
||||
.dtor = nvkm_output_dp_dtor,
|
||||
.init = nvkm_output_dp_init,
|
||||
.fini = nvkm_output_dp_fini,
|
||||
static const struct nvkm_outp_func
|
||||
nvkm_dp_func = {
|
||||
.dtor = nvkm_dp_dtor,
|
||||
.init = nvkm_dp_init,
|
||||
.fini = nvkm_dp_fini,
|
||||
};
|
||||
|
||||
int
|
||||
nvkm_output_dp_ctor(const struct nvkm_output_dp_func *func,
|
||||
struct nvkm_disp *disp, int index, struct dcb_output *dcbE,
|
||||
struct nvkm_i2c_aux *aux, struct nvkm_output_dp *outp)
|
||||
static int
|
||||
nvkm_dp_ctor(struct nvkm_disp *disp, int index, struct dcb_output *dcbE,
|
||||
struct nvkm_i2c_aux *aux, struct nvkm_dp *dp)
|
||||
{
|
||||
struct nvkm_device *device = disp->engine.subdev.device;
|
||||
struct nvkm_bios *bios = device->bios;
|
||||
@ -566,54 +562,53 @@ nvkm_output_dp_ctor(const struct nvkm_output_dp_func *func,
|
||||
u32 data;
|
||||
int ret;
|
||||
|
||||
nvkm_outp_ctor(&nvkm_output_dp_func, disp, index, dcbE, &outp->base);
|
||||
outp->func = func;
|
||||
outp->aux = aux;
|
||||
if (!outp->aux) {
|
||||
OUTP_ERR(&outp->base, "no aux");
|
||||
nvkm_outp_ctor(&nvkm_dp_func, disp, index, dcbE, &dp->outp);
|
||||
dp->aux = aux;
|
||||
if (!dp->aux) {
|
||||
OUTP_ERR(&dp->outp, "no aux");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* bios data is not optional */
|
||||
data = nvbios_dpout_match(bios, outp->base.info.hasht,
|
||||
outp->base.info.hashm, &outp->version,
|
||||
&hdr, &cnt, &len, &outp->info);
|
||||
data = nvbios_dpout_match(bios, dp->outp.info.hasht,
|
||||
dp->outp.info.hashm, &dp->version,
|
||||
&hdr, &cnt, &len, &dp->info);
|
||||
if (!data) {
|
||||
OUTP_ERR(&outp->base, "no bios dp data");
|
||||
OUTP_ERR(&dp->outp, "no bios dp data");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
OUTP_DBG(&outp->base, "bios dp %02x %02x %02x %02x",
|
||||
outp->version, hdr, cnt, len);
|
||||
OUTP_DBG(&dp->outp, "bios dp %02x %02x %02x %02x",
|
||||
dp->version, hdr, cnt, len);
|
||||
|
||||
/* link maintenance */
|
||||
ret = nvkm_notify_init(NULL, &i2c->event, nvkm_output_dp_irq, true,
|
||||
ret = nvkm_notify_init(NULL, &i2c->event, nvkm_dp_irq, true,
|
||||
&(struct nvkm_i2c_ntfy_req) {
|
||||
.mask = NVKM_I2C_IRQ,
|
||||
.port = outp->aux->id,
|
||||
.port = dp->aux->id,
|
||||
},
|
||||
sizeof(struct nvkm_i2c_ntfy_req),
|
||||
sizeof(struct nvkm_i2c_ntfy_rep),
|
||||
&outp->irq);
|
||||
&dp->irq);
|
||||
if (ret) {
|
||||
OUTP_ERR(&outp->base, "error monitoring aux irq: %d", ret);
|
||||
OUTP_ERR(&dp->outp, "error monitoring aux irq: %d", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
mutex_init(&outp->mutex);
|
||||
atomic_set(&outp->lt.done, 0);
|
||||
mutex_init(&dp->mutex);
|
||||
atomic_set(&dp->lt.done, 0);
|
||||
|
||||
/* hotplug detect, replaces gpio-based mechanism with aux events */
|
||||
ret = nvkm_notify_init(NULL, &i2c->event, nvkm_output_dp_hpd, true,
|
||||
ret = nvkm_notify_init(NULL, &i2c->event, nvkm_dp_hpd, true,
|
||||
&(struct nvkm_i2c_ntfy_req) {
|
||||
.mask = NVKM_I2C_PLUG | NVKM_I2C_UNPLUG,
|
||||
.port = outp->aux->id,
|
||||
.port = dp->aux->id,
|
||||
},
|
||||
sizeof(struct nvkm_i2c_ntfy_req),
|
||||
sizeof(struct nvkm_i2c_ntfy_rep),
|
||||
&outp->hpd);
|
||||
&dp->hpd);
|
||||
if (ret) {
|
||||
OUTP_ERR(&outp->base, "error monitoring aux hpd: %d", ret);
|
||||
OUTP_ERR(&dp->outp, "error monitoring aux hpd: %d", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -623,15 +618,21 @@ nvkm_output_dp_ctor(const struct nvkm_output_dp_func *func,
|
||||
int
|
||||
nvkm_output_dp_new_(const struct nvkm_output_dp_func *func,
|
||||
struct nvkm_disp *disp, int index, struct dcb_output *dcbE,
|
||||
struct nvkm_output **poutp)
|
||||
struct nvkm_outp **poutp)
|
||||
{
|
||||
struct nvkm_i2c *i2c = disp->engine.subdev.device->i2c;
|
||||
struct nvkm_i2c_aux *aux = nvkm_i2c_aux_find(i2c, dcbE->i2c_index);
|
||||
struct nvkm_output_dp *outp;
|
||||
struct nvkm_i2c_aux *aux;
|
||||
struct nvkm_dp *dp;
|
||||
|
||||
if (!(outp = kzalloc(sizeof(*outp), GFP_KERNEL)))
|
||||
if (dcbE->location == 0)
|
||||
aux = nvkm_i2c_aux_find(i2c, NVKM_I2C_AUX_CCB(dcbE->i2c_index));
|
||||
else
|
||||
aux = nvkm_i2c_aux_find(i2c, NVKM_I2C_AUX_EXT(dcbE->extdev));
|
||||
|
||||
if (!(dp = kzalloc(sizeof(*dp), GFP_KERNEL)))
|
||||
return -ENOMEM;
|
||||
*poutp = &outp->base;
|
||||
dp->func = func;
|
||||
*poutp = &dp->outp;
|
||||
|
||||
return nvkm_output_dp_ctor(func, disp, index, dcbE, aux, outp);
|
||||
return nvkm_dp_ctor(disp, index, dcbE, aux, dp);
|
||||
}
|
||||
|
@ -1,15 +1,18 @@
|
||||
#ifndef __NVKM_DISP_OUTP_DP_H__
|
||||
#define __NVKM_DISP_OUTP_DP_H__
|
||||
#define nvkm_output_dp(p) container_of((p), struct nvkm_output_dp, base)
|
||||
#ifndef __NVKM_DISP_DP_H__
|
||||
#define __NVKM_DISP_DP_H__
|
||||
#define nvkm_dp(p) container_of((p), struct nvkm_dp, outp)
|
||||
#include "outp.h"
|
||||
|
||||
#include <core/notify.h>
|
||||
#include <subdev/bios.h>
|
||||
#include <subdev/bios/dp.h>
|
||||
|
||||
struct nvkm_output_dp {
|
||||
struct nvkm_dp {
|
||||
const struct nvkm_output_dp_func *func;
|
||||
struct nvkm_output base;
|
||||
union {
|
||||
struct nvkm_outp base;
|
||||
struct nvkm_outp outp;
|
||||
};
|
||||
|
||||
struct nvbios_dpout info;
|
||||
u8 version;
|
||||
@ -28,6 +31,8 @@ struct nvkm_output_dp {
|
||||
} lt;
|
||||
};
|
||||
|
||||
#define nvkm_output_dp nvkm_dp
|
||||
|
||||
struct nvkm_output_dp_func {
|
||||
int (*pattern)(struct nvkm_output_dp *, int);
|
||||
int (*lnk_pwr)(struct nvkm_output_dp *, int nr);
|
||||
@ -39,29 +44,25 @@ struct nvkm_output_dp_func {
|
||||
|
||||
int nvkm_output_dp_train(struct nvkm_output *, u32 rate);
|
||||
|
||||
int nvkm_output_dp_ctor(const struct nvkm_output_dp_func *, struct nvkm_disp *,
|
||||
int index, struct dcb_output *, struct nvkm_i2c_aux *,
|
||||
struct nvkm_output_dp *);
|
||||
int nvkm_output_dp_new_(const struct nvkm_output_dp_func *, struct nvkm_disp *,
|
||||
int index, struct dcb_output *,
|
||||
struct nvkm_output **);
|
||||
int index, struct dcb_output *, struct nvkm_output **);
|
||||
|
||||
int nv50_pior_dp_new(struct nvkm_disp *, int, struct dcb_output *,
|
||||
struct nvkm_output **);
|
||||
|
||||
int g94_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
|
||||
struct nvkm_output **);
|
||||
int g94_sor_dp_lnk_pwr(struct nvkm_output_dp *, int);
|
||||
int g94_sor_dp_lnk_pwr(struct nvkm_dp *, int);
|
||||
|
||||
int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
|
||||
struct nvkm_output **);
|
||||
int gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *, int, int, bool);
|
||||
int gf119_sor_dp_drv_ctl(struct nvkm_output_dp *, int, int, int, int);
|
||||
void gf119_sor_dp_vcpi(struct nvkm_output_dp *, int, u8, u8, u16, u16);
|
||||
int gf119_sor_dp_lnk_ctl(struct nvkm_dp *, int, int, bool);
|
||||
int gf119_sor_dp_drv_ctl(struct nvkm_dp *, int, int, int, int);
|
||||
void gf119_sor_dp_vcpi(struct nvkm_dp *, int, u8, u8, u16, u16);
|
||||
|
||||
int gm107_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
|
||||
struct nvkm_output **);
|
||||
int gm107_sor_dp_pattern(struct nvkm_output_dp *, int);
|
||||
int gm107_sor_dp_pattern(struct nvkm_dp *, int);
|
||||
|
||||
int gm200_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
|
||||
struct nvkm_output **);
|
||||
|
@ -81,17 +81,8 @@ int
|
||||
nv50_pior_dp_new(struct nvkm_disp *disp, int index, struct dcb_output *dcbE,
|
||||
struct nvkm_output **poutp)
|
||||
{
|
||||
struct nvkm_i2c *i2c = disp->engine.subdev.device->i2c;
|
||||
struct nvkm_i2c_aux *aux =
|
||||
nvkm_i2c_aux_find(i2c, NVKM_I2C_AUX_EXT(dcbE->extdev));
|
||||
struct nvkm_output_dp *outp;
|
||||
|
||||
if (!(outp = kzalloc(sizeof(*outp), GFP_KERNEL)))
|
||||
return -ENOMEM;
|
||||
*poutp = &outp->base;
|
||||
|
||||
return nvkm_output_dp_ctor(&nv50_pior_output_dp_func, disp,
|
||||
index, dcbE, aux, outp);
|
||||
return nvkm_output_dp_new_(&nv50_pior_output_dp_func, disp,
|
||||
index, dcbE, poutp);
|
||||
}
|
||||
|
||||
int
|
||||
|
Loading…
Reference in New Issue
Block a user