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cpufreq: amd-pstate: Enable amd-pstate preferred core support
amd-pstate driver utilizes the functions and data structures provided by the ITMT architecture to enable the scheduler to favor scheduling on cores which can be get a higher frequency with lower voltage. We call it amd-pstate preferrred core. Here sched_set_itmt_core_prio() is called to set priorities and sched_set_itmt_support() is called to enable ITMT feature. amd-pstate driver uses the highest performance value to indicate the priority of CPU. The higher value has a higher priority. The initial core rankings are set up by amd-pstate when the system boots. Add a variable hw_prefcore in cpudata structure. It will check if the processor and power firmware support preferred core feature. Add one new early parameter `disable` to allow user to disable the preferred core. Only when hardware supports preferred core and user set `enabled` in early parameter, amd pstate driver supports preferred core featue. Tested-by: Oleksandr Natalenko <oleksandr@natalenko.name> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Wyes Karny <wyes.karny@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Co-developed-by: Perry Yuan <Perry.Yuan@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Signed-off-by: Meng Li <li.meng@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -37,6 +37,7 @@
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#include <linux/uaccess.h>
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#include <linux/static_call.h>
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#include <linux/amd-pstate.h>
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#include <linux/topology.h>
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#include <acpi/processor.h>
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#include <acpi/cppc_acpi.h>
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@ -49,6 +50,7 @@
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#define AMD_PSTATE_TRANSITION_LATENCY 20000
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#define AMD_PSTATE_TRANSITION_DELAY 1000
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#define AMD_PSTATE_PREFCORE_THRESHOLD 166
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/*
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* TODO: We need more time to fine tune processors with shared memory solution
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@ -64,6 +66,7 @@ static struct cpufreq_driver amd_pstate_driver;
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static struct cpufreq_driver amd_pstate_epp_driver;
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static int cppc_state = AMD_PSTATE_UNDEFINED;
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static bool cppc_enabled;
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static bool amd_pstate_prefcore = true;
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/*
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* AMD Energy Preference Performance (EPP)
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@ -297,13 +300,14 @@ static int pstate_init_perf(struct amd_cpudata *cpudata)
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if (ret)
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return ret;
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/*
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* TODO: Introduce AMD specific power feature.
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*
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* CPPC entry doesn't indicate the highest performance in some ASICs.
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/* For platforms that do not support the preferred core feature, the
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* highest_pef may be configured with 166 or 255, to avoid max frequency
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* calculated wrongly. we take the AMD_CPPC_HIGHEST_PERF(cap1) value as
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* the default max perf.
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*/
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highest_perf = amd_get_highest_perf();
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if (highest_perf > AMD_CPPC_HIGHEST_PERF(cap1))
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if (cpudata->hw_prefcore)
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highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
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else
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highest_perf = AMD_CPPC_HIGHEST_PERF(cap1);
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WRITE_ONCE(cpudata->highest_perf, highest_perf);
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@ -324,8 +328,9 @@ static int cppc_init_perf(struct amd_cpudata *cpudata)
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if (ret)
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return ret;
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highest_perf = amd_get_highest_perf();
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if (highest_perf > cppc_perf.highest_perf)
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if (cpudata->hw_prefcore)
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highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
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else
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highest_perf = cppc_perf.highest_perf;
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WRITE_ONCE(cpudata->highest_perf, highest_perf);
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@ -706,6 +711,80 @@ static void amd_perf_ctl_reset(unsigned int cpu)
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wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0);
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}
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/*
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* Set amd-pstate preferred core enable can't be done directly from cpufreq callbacks
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* due to locking, so queue the work for later.
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*/
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static void amd_pstste_sched_prefcore_workfn(struct work_struct *work)
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{
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sched_set_itmt_support();
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}
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static DECLARE_WORK(sched_prefcore_work, amd_pstste_sched_prefcore_workfn);
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/*
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* Get the highest performance register value.
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* @cpu: CPU from which to get highest performance.
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* @highest_perf: Return address.
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*
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* Return: 0 for success, -EIO otherwise.
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*/
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static int amd_pstate_get_highest_perf(int cpu, u32 *highest_perf)
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{
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int ret;
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if (boot_cpu_has(X86_FEATURE_CPPC)) {
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u64 cap1;
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ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &cap1);
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if (ret)
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return ret;
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WRITE_ONCE(*highest_perf, AMD_CPPC_HIGHEST_PERF(cap1));
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} else {
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u64 cppc_highest_perf;
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ret = cppc_get_highest_perf(cpu, &cppc_highest_perf);
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if (ret)
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return ret;
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WRITE_ONCE(*highest_perf, cppc_highest_perf);
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}
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return (ret);
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}
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#define CPPC_MAX_PERF U8_MAX
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static void amd_pstate_init_prefcore(struct amd_cpudata *cpudata)
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{
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int ret, prio;
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u32 highest_perf;
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ret = amd_pstate_get_highest_perf(cpudata->cpu, &highest_perf);
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if (ret)
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return;
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cpudata->hw_prefcore = true;
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/* check if CPPC preferred core feature is enabled*/
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if (highest_perf < CPPC_MAX_PERF)
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prio = (int)highest_perf;
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else {
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pr_debug("AMD CPPC preferred core is unsupported!\n");
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cpudata->hw_prefcore = false;
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return;
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}
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if (!amd_pstate_prefcore)
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return;
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/*
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* The priorities can be set regardless of whether or not
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* sched_set_itmt_support(true) has been called and it is valid to
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* update them at any time after it has been called.
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*/
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sched_set_itmt_core_prio(prio, cpudata->cpu);
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schedule_work(&sched_prefcore_work);
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}
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static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
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{
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int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret;
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@ -727,6 +806,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
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cpudata->cpu = policy->cpu;
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amd_pstate_init_prefcore(cpudata);
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ret = amd_pstate_init_perf(cpudata);
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if (ret)
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goto free_cpudata1;
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@ -877,6 +958,17 @@ static ssize_t show_amd_pstate_highest_perf(struct cpufreq_policy *policy,
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return sysfs_emit(buf, "%u\n", perf);
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}
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static ssize_t show_amd_pstate_hw_prefcore(struct cpufreq_policy *policy,
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char *buf)
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{
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bool hw_prefcore;
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struct amd_cpudata *cpudata = policy->driver_data;
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hw_prefcore = READ_ONCE(cpudata->hw_prefcore);
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return sysfs_emit(buf, "%s\n", str_enabled_disabled(hw_prefcore));
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}
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static ssize_t show_energy_performance_available_preferences(
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struct cpufreq_policy *policy, char *buf)
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{
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@ -1074,18 +1166,27 @@ static ssize_t status_store(struct device *a, struct device_attribute *b,
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return ret < 0 ? ret : count;
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}
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static ssize_t prefcore_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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return sysfs_emit(buf, "%s\n", str_enabled_disabled(amd_pstate_prefcore));
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}
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cpufreq_freq_attr_ro(amd_pstate_max_freq);
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cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq);
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cpufreq_freq_attr_ro(amd_pstate_highest_perf);
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cpufreq_freq_attr_ro(amd_pstate_hw_prefcore);
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cpufreq_freq_attr_rw(energy_performance_preference);
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cpufreq_freq_attr_ro(energy_performance_available_preferences);
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static DEVICE_ATTR_RW(status);
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static DEVICE_ATTR_RO(prefcore);
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static struct freq_attr *amd_pstate_attr[] = {
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&amd_pstate_max_freq,
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&amd_pstate_lowest_nonlinear_freq,
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&amd_pstate_highest_perf,
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&amd_pstate_hw_prefcore,
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NULL,
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};
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@ -1093,6 +1194,7 @@ static struct freq_attr *amd_pstate_epp_attr[] = {
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&amd_pstate_max_freq,
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&amd_pstate_lowest_nonlinear_freq,
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&amd_pstate_highest_perf,
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&amd_pstate_hw_prefcore,
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&energy_performance_preference,
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&energy_performance_available_preferences,
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NULL,
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@ -1100,6 +1202,7 @@ static struct freq_attr *amd_pstate_epp_attr[] = {
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static struct attribute *pstate_global_attributes[] = {
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&dev_attr_status.attr,
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&dev_attr_prefcore.attr,
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NULL
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};
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@ -1151,6 +1254,8 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
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cpudata->cpu = policy->cpu;
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cpudata->epp_policy = 0;
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amd_pstate_init_prefcore(cpudata);
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ret = amd_pstate_init_perf(cpudata);
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if (ret)
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goto free_cpudata1;
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@ -1567,7 +1672,17 @@ static int __init amd_pstate_param(char *str)
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return amd_pstate_set_driver(mode_idx);
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}
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static int __init amd_prefcore_param(char *str)
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{
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if (!strcmp(str, "disable"))
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amd_pstate_prefcore = false;
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return 0;
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}
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early_param("amd_pstate", amd_pstate_param);
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early_param("amd_prefcore", amd_prefcore_param);
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MODULE_AUTHOR("Huang Rui <ray.huang@amd.com>");
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MODULE_DESCRIPTION("AMD Processor P-state Frequency Driver");
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* @prev: Last Aperf/Mperf/tsc count value read from register
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* @freq: current cpu frequency value
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* @boost_supported: check whether the Processor or SBIOS supports boost mode
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* @hw_prefcore: check whether HW supports preferred core featue.
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* Only when hw_prefcore and early prefcore param are true,
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* AMD P-State driver supports preferred core featue.
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* @epp_policy: Last saved policy used to set energy-performance preference
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* @epp_cached: Cached CPPC energy-performance preference value
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* @policy: Cpufreq policy value
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@ -85,6 +88,7 @@ struct amd_cpudata {
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u64 freq;
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bool boost_supported;
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bool hw_prefcore;
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/* EPP feature related attributes*/
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s16 epp_policy;
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