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thermal: exynos: pass cpu_present_mask to cpufreq_cooling_register()
cpufreq_cooling_register() expects mask of all the CPUs where frequency constraint is applicable. This platform has more than one CPU to which these constraints will apply and so passing mask of only CPU0 wouldn't be sufficient. Also, this platform has a single cluster of CPUs and the constraint applies to all CPUs. If CPU0 is hoplugged out then we may face strange BUGs as cpu_cooling framework isn't aware of any siblings sharing clock line. Fix it by passing cpu_present_mask to cpufreq_cooling_register(). Cc: Chanwoo Choi <cw00.choi@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Amit Daniel Kachhap <amit.daniel@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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@ -347,7 +347,6 @@ void exynos_report_trigger(struct thermal_sensor_conf *conf)
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int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf)
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{
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int ret;
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struct cpumask mask_val;
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struct exynos_thermal_zone *th_zone;
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if (!sensor_conf || !sensor_conf->read_temperature) {
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@ -367,9 +366,8 @@ int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf)
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* sensor
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*/
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if (sensor_conf->cooling_data.freq_clip_count > 0) {
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cpumask_set_cpu(0, &mask_val);
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th_zone->cool_dev[th_zone->cool_dev_size] =
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cpufreq_cooling_register(&mask_val);
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cpufreq_cooling_register(cpu_present_mask);
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if (IS_ERR(th_zone->cool_dev[th_zone->cool_dev_size])) {
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ret = PTR_ERR(th_zone->cool_dev[th_zone->cool_dev_size]);
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if (ret != -EPROBE_DEFER)
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