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iio:filter:admv8818: add support for ADMV8818
The ADMV8818-EP is a fully monolithic microwave integrated circuit (MMIC) that features a digitally selectable frequency of operation. The device features four independently controlled high- pass filters (HPFs) and four independently controlled low-pass filters (LPFs) that span the 2 GHz to 18 GHz frequency range. Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/admv8818-ep.pdf Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Antoniu Miclaus
Jonathan Cameron
parent
35c35b0c41
commit
f34fe888ad
@ -5,4 +5,14 @@
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menu "Filters"
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config ADMV8818
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tristate "Analog Devices ADMV8818 High-Pass and Low-Pass Filter"
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depends on SPI && COMMON_CLK && 64BIT
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help
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Say yes here to build support for Analog Devices ADMV8818
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2 GHz to 18 GHz, Digitally Tunable, High-Pass and Low-Pass Filter.
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To compile this driver as a module, choose M here: the
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modiule will be called admv8818.
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endmenu
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@ -4,3 +4,4 @@
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#
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# When adding new entries keep the list in alphabetical order
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obj-$(CONFIG_ADMV8818) += admv8818.o
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665
drivers/iio/filter/admv8818.c
Normal file
665
drivers/iio/filter/admv8818.c
Normal file
@ -0,0 +1,665 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* ADMV8818 driver
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*
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* Copyright 2021 Analog Devices Inc.
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*/
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/iio/iio.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/mutex.h>
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#include <linux/notifier.h>
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#include <linux/regmap.h>
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#include <linux/spi/spi.h>
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#include <linux/units.h>
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/* ADMV8818 Register Map */
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#define ADMV8818_REG_SPI_CONFIG_A 0x0
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#define ADMV8818_REG_SPI_CONFIG_B 0x1
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#define ADMV8818_REG_CHIPTYPE 0x3
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#define ADMV8818_REG_PRODUCT_ID_L 0x4
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#define ADMV8818_REG_PRODUCT_ID_H 0x5
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#define ADMV8818_REG_FAST_LATCH_POINTER 0x10
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#define ADMV8818_REG_FAST_LATCH_STOP 0x11
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#define ADMV8818_REG_FAST_LATCH_START 0x12
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#define ADMV8818_REG_FAST_LATCH_DIRECTION 0x13
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#define ADMV8818_REG_FAST_LATCH_STATE 0x14
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#define ADMV8818_REG_WR0_SW 0x20
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#define ADMV8818_REG_WR0_FILTER 0x21
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#define ADMV8818_REG_WR1_SW 0x22
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#define ADMV8818_REG_WR1_FILTER 0x23
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#define ADMV8818_REG_WR2_SW 0x24
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#define ADMV8818_REG_WR2_FILTER 0x25
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#define ADMV8818_REG_WR3_SW 0x26
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#define ADMV8818_REG_WR3_FILTER 0x27
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#define ADMV8818_REG_WR4_SW 0x28
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#define ADMV8818_REG_WR4_FILTER 0x29
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#define ADMV8818_REG_LUT0_SW 0x100
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#define ADMV8818_REG_LUT0_FILTER 0x101
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#define ADMV8818_REG_LUT127_SW 0x1FE
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#define ADMV8818_REG_LUT127_FILTER 0x1FF
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/* ADMV8818_REG_SPI_CONFIG_A Map */
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#define ADMV8818_SOFTRESET_N_MSK BIT(7)
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#define ADMV8818_LSB_FIRST_N_MSK BIT(6)
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#define ADMV8818_ENDIAN_N_MSK BIT(5)
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#define ADMV8818_SDOACTIVE_N_MSK BIT(4)
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#define ADMV8818_SDOACTIVE_MSK BIT(3)
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#define ADMV8818_ENDIAN_MSK BIT(2)
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#define ADMV8818_LSBFIRST_MSK BIT(1)
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#define ADMV8818_SOFTRESET_MSK BIT(0)
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/* ADMV8818_REG_SPI_CONFIG_B Map */
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#define ADMV8818_SINGLE_INSTRUCTION_MSK BIT(7)
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#define ADMV8818_CSB_STALL_MSK BIT(6)
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#define ADMV8818_MASTER_SLAVE_RB_MSK BIT(5)
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#define ADMV8818_MASTER_SLAVE_TRANSFER_MSK BIT(0)
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/* ADMV8818_REG_WR0_SW Map */
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#define ADMV8818_SW_IN_SET_WR0_MSK BIT(7)
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#define ADMV8818_SW_OUT_SET_WR0_MSK BIT(6)
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#define ADMV8818_SW_IN_WR0_MSK GENMASK(5, 3)
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#define ADMV8818_SW_OUT_WR0_MSK GENMASK(2, 0)
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/* ADMV8818_REG_WR0_FILTER Map */
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#define ADMV8818_HPF_WR0_MSK GENMASK(7, 4)
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#define ADMV8818_LPF_WR0_MSK GENMASK(3, 0)
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enum {
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ADMV8818_BW_FREQ,
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ADMV8818_CENTER_FREQ
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};
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enum {
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ADMV8818_AUTO_MODE,
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ADMV8818_MANUAL_MODE,
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};
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struct admv8818_state {
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struct spi_device *spi;
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struct regmap *regmap;
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struct clk *clkin;
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struct notifier_block nb;
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/* Protect against concurrent accesses to the device and data content*/
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struct mutex lock;
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unsigned int filter_mode;
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u64 cf_hz;
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};
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static const unsigned long long freq_range_hpf[4][2] = {
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{1750000000ULL, 3550000000ULL},
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{3400000000ULL, 7250000000ULL},
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{6600000000, 12000000000},
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{12500000000, 19900000000}
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};
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static const unsigned long long freq_range_lpf[4][2] = {
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{2050000000ULL, 3850000000ULL},
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{3350000000ULL, 7250000000ULL},
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{7000000000, 13000000000},
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{12550000000, 18500000000}
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};
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static const struct regmap_config admv8818_regmap_config = {
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.reg_bits = 16,
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.val_bits = 8,
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.read_flag_mask = 0x80,
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.max_register = 0x1FF,
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};
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static const char * const admv8818_modes[] = {
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[0] = "auto",
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[1] = "manual"
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};
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static int __admv8818_hpf_select(struct admv8818_state *st, u64 freq)
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{
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unsigned int hpf_step = 0, hpf_band = 0, i, j;
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u64 freq_step;
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int ret;
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if (freq < freq_range_hpf[0][0])
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goto hpf_write;
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if (freq > freq_range_hpf[3][1]) {
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hpf_step = 15;
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hpf_band = 4;
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goto hpf_write;
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}
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for (i = 0; i < 4; i++) {
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freq_step = div_u64((freq_range_hpf[i][1] -
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freq_range_hpf[i][0]), 15);
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if (freq > freq_range_hpf[i][0] &&
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(freq < freq_range_hpf[i][1] + freq_step)) {
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hpf_band = i + 1;
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for (j = 1; j <= 16; j++) {
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if (freq < (freq_range_hpf[i][0] + (freq_step * j))) {
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hpf_step = j - 1;
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break;
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}
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}
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break;
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}
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}
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/* Close HPF frequency gap between 12 and 12.5 GHz */
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if (freq >= 12000 * HZ_PER_MHZ && freq <= 12500 * HZ_PER_MHZ) {
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hpf_band = 3;
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hpf_step = 15;
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}
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hpf_write:
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ret = regmap_update_bits(st->regmap, ADMV8818_REG_WR0_SW,
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ADMV8818_SW_IN_SET_WR0_MSK |
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ADMV8818_SW_IN_WR0_MSK,
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FIELD_PREP(ADMV8818_SW_IN_SET_WR0_MSK, 1) |
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FIELD_PREP(ADMV8818_SW_IN_WR0_MSK, hpf_band));
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if (ret)
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return ret;
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return regmap_update_bits(st->regmap, ADMV8818_REG_WR0_FILTER,
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ADMV8818_HPF_WR0_MSK,
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FIELD_PREP(ADMV8818_HPF_WR0_MSK, hpf_step));
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}
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static int admv8818_hpf_select(struct admv8818_state *st, u64 freq)
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{
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int ret;
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mutex_lock(&st->lock);
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ret = __admv8818_hpf_select(st, freq);
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mutex_unlock(&st->lock);
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return ret;
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}
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static int __admv8818_lpf_select(struct admv8818_state *st, u64 freq)
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{
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unsigned int lpf_step = 0, lpf_band = 0, i, j;
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u64 freq_step;
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int ret;
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if (freq > freq_range_lpf[3][1])
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goto lpf_write;
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if (freq < freq_range_lpf[0][0]) {
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lpf_band = 1;
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goto lpf_write;
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}
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for (i = 0; i < 4; i++) {
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if (freq > freq_range_lpf[i][0] && freq < freq_range_lpf[i][1]) {
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lpf_band = i + 1;
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freq_step = div_u64((freq_range_lpf[i][1] - freq_range_lpf[i][0]), 15);
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for (j = 0; j <= 15; j++) {
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if (freq < (freq_range_lpf[i][0] + (freq_step * j))) {
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lpf_step = j;
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break;
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}
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}
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break;
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}
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}
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lpf_write:
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ret = regmap_update_bits(st->regmap, ADMV8818_REG_WR0_SW,
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ADMV8818_SW_OUT_SET_WR0_MSK |
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ADMV8818_SW_OUT_WR0_MSK,
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FIELD_PREP(ADMV8818_SW_OUT_SET_WR0_MSK, 1) |
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FIELD_PREP(ADMV8818_SW_OUT_WR0_MSK, lpf_band));
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if (ret)
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return ret;
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return regmap_update_bits(st->regmap, ADMV8818_REG_WR0_FILTER,
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ADMV8818_LPF_WR0_MSK,
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FIELD_PREP(ADMV8818_LPF_WR0_MSK, lpf_step));
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}
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static int admv8818_lpf_select(struct admv8818_state *st, u64 freq)
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{
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int ret;
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mutex_lock(&st->lock);
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ret = __admv8818_lpf_select(st, freq);
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mutex_unlock(&st->lock);
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return ret;
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}
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static int admv8818_rfin_band_select(struct admv8818_state *st)
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{
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int ret;
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st->cf_hz = clk_get_rate(st->clkin);
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mutex_lock(&st->lock);
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ret = __admv8818_hpf_select(st, st->cf_hz);
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if (ret)
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goto exit;
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ret = __admv8818_lpf_select(st, st->cf_hz);
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exit:
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mutex_unlock(&st->lock);
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return ret;
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}
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static int __admv8818_read_hpf_freq(struct admv8818_state *st, u64 *hpf_freq)
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{
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unsigned int data, hpf_band, hpf_state;
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int ret;
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ret = regmap_read(st->regmap, ADMV8818_REG_WR0_SW, &data);
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if (ret)
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return ret;
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hpf_band = FIELD_GET(ADMV8818_SW_IN_WR0_MSK, data);
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if (!hpf_band) {
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*hpf_freq = 0;
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return ret;
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}
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ret = regmap_read(st->regmap, ADMV8818_REG_WR0_FILTER, &data);
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if (ret)
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return ret;
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hpf_state = FIELD_GET(ADMV8818_HPF_WR0_MSK, data);
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*hpf_freq = div_u64(freq_range_hpf[hpf_band - 1][1] - freq_range_hpf[hpf_band - 1][0], 15);
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*hpf_freq = freq_range_hpf[hpf_band - 1][0] + (*hpf_freq * hpf_state);
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return ret;
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}
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static int admv8818_read_hpf_freq(struct admv8818_state *st, u64 *hpf_freq)
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{
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int ret;
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mutex_lock(&st->lock);
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ret = __admv8818_read_hpf_freq(st, hpf_freq);
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mutex_unlock(&st->lock);
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return ret;
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}
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static int __admv8818_read_lpf_freq(struct admv8818_state *st, u64 *lpf_freq)
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{
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unsigned int data, lpf_band, lpf_state;
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int ret;
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ret = regmap_read(st->regmap, ADMV8818_REG_WR0_SW, &data);
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if (ret)
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return ret;
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lpf_band = FIELD_GET(ADMV8818_SW_OUT_WR0_MSK, data);
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if (!lpf_band) {
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*lpf_freq = 0;
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return ret;
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}
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ret = regmap_read(st->regmap, ADMV8818_REG_WR0_FILTER, &data);
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if (ret)
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return ret;
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lpf_state = FIELD_GET(ADMV8818_LPF_WR0_MSK, data);
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*lpf_freq = div_u64(freq_range_lpf[lpf_band - 1][1] - freq_range_lpf[lpf_band - 1][0], 15);
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*lpf_freq = freq_range_lpf[lpf_band - 1][0] + (*lpf_freq * lpf_state);
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return ret;
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}
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static int admv8818_read_lpf_freq(struct admv8818_state *st, u64 *lpf_freq)
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{
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int ret;
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mutex_lock(&st->lock);
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ret = __admv8818_read_lpf_freq(st, lpf_freq);
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mutex_unlock(&st->lock);
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return ret;
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}
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static int admv8818_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long info)
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{
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struct admv8818_state *st = iio_priv(indio_dev);
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u64 freq = ((u64)val2 << 32 | (u32)val);
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switch (info) {
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case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
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return admv8818_lpf_select(st, freq);
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case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
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return admv8818_hpf_select(st, freq);
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default:
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return -EINVAL;
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}
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}
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static int admv8818_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long info)
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{
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struct admv8818_state *st = iio_priv(indio_dev);
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int ret;
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u64 freq;
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switch (info) {
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case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
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ret = admv8818_read_lpf_freq(st, &freq);
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if (ret)
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return ret;
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*val = (u32)freq;
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*val2 = (u32)(freq >> 32);
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return IIO_VAL_INT_64;
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case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
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ret = admv8818_read_hpf_freq(st, &freq);
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if (ret)
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return ret;
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*val = (u32)freq;
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*val2 = (u32)(freq >> 32);
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return IIO_VAL_INT_64;
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default:
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return -EINVAL;
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}
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}
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static int admv8818_reg_access(struct iio_dev *indio_dev,
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unsigned int reg,
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unsigned int write_val,
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unsigned int *read_val)
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{
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struct admv8818_state *st = iio_priv(indio_dev);
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if (read_val)
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return regmap_read(st->regmap, reg, read_val);
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else
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return regmap_write(st->regmap, reg, write_val);
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}
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static int admv8818_get_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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struct admv8818_state *st = iio_priv(indio_dev);
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return st->filter_mode;
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}
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static int admv8818_set_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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unsigned int mode)
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{
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struct admv8818_state *st = iio_priv(indio_dev);
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int ret = 0;
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if (!st->clkin) {
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if (mode == ADMV8818_MANUAL_MODE)
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return 0;
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return -EINVAL;
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}
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switch (mode) {
|
||||
case ADMV8818_AUTO_MODE:
|
||||
if (!st->filter_mode)
|
||||
return 0;
|
||||
|
||||
ret = clk_prepare_enable(st->clkin);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = clk_notifier_register(st->clkin, &st->nb);
|
||||
if (ret) {
|
||||
clk_disable_unprepare(st->clkin);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
break;
|
||||
case ADMV8818_MANUAL_MODE:
|
||||
if (st->filter_mode)
|
||||
return 0;
|
||||
|
||||
clk_disable_unprepare(st->clkin);
|
||||
|
||||
ret = clk_notifier_unregister(st->clkin, &st->nb);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
st->filter_mode = mode;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct iio_info admv8818_info = {
|
||||
.write_raw = admv8818_write_raw,
|
||||
.read_raw = admv8818_read_raw,
|
||||
.debugfs_reg_access = &admv8818_reg_access,
|
||||
};
|
||||
|
||||
static const struct iio_enum admv8818_mode_enum = {
|
||||
.items = admv8818_modes,
|
||||
.num_items = ARRAY_SIZE(admv8818_modes),
|
||||
.get = admv8818_get_mode,
|
||||
.set = admv8818_set_mode,
|
||||
};
|
||||
|
||||
static const struct iio_chan_spec_ext_info admv8818_ext_info[] = {
|
||||
IIO_ENUM("filter_mode", IIO_SHARED_BY_ALL, &admv8818_mode_enum),
|
||||
IIO_ENUM_AVAILABLE("filter_mode", IIO_SHARED_BY_ALL, &admv8818_mode_enum),
|
||||
{ },
|
||||
};
|
||||
|
||||
#define ADMV8818_CHAN(_channel) { \
|
||||
.type = IIO_ALTVOLTAGE, \
|
||||
.output = 1, \
|
||||
.indexed = 1, \
|
||||
.channel = _channel, \
|
||||
.info_mask_separate = \
|
||||
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
|
||||
BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY) \
|
||||
}
|
||||
|
||||
#define ADMV8818_CHAN_BW_CF(_channel, _admv8818_ext_info) { \
|
||||
.type = IIO_ALTVOLTAGE, \
|
||||
.output = 1, \
|
||||
.indexed = 1, \
|
||||
.channel = _channel, \
|
||||
.ext_info = _admv8818_ext_info, \
|
||||
}
|
||||
|
||||
static const struct iio_chan_spec admv8818_channels[] = {
|
||||
ADMV8818_CHAN(0),
|
||||
ADMV8818_CHAN_BW_CF(0, admv8818_ext_info),
|
||||
};
|
||||
|
||||
static int admv8818_freq_change(struct notifier_block *nb, unsigned long action, void *data)
|
||||
{
|
||||
struct admv8818_state *st = container_of(nb, struct admv8818_state, nb);
|
||||
|
||||
if (action == POST_RATE_CHANGE)
|
||||
return notifier_from_errno(admv8818_rfin_band_select(st));
|
||||
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
||||
static void admv8818_clk_notifier_unreg(void *data)
|
||||
{
|
||||
struct admv8818_state *st = data;
|
||||
|
||||
if (st->filter_mode == 0)
|
||||
clk_notifier_unregister(st->clkin, &st->nb);
|
||||
}
|
||||
|
||||
static void admv8818_clk_disable(void *data)
|
||||
{
|
||||
struct admv8818_state *st = data;
|
||||
|
||||
if (st->filter_mode == 0)
|
||||
clk_disable_unprepare(st->clkin);
|
||||
}
|
||||
|
||||
static int admv8818_init(struct admv8818_state *st)
|
||||
{
|
||||
int ret;
|
||||
struct spi_device *spi = st->spi;
|
||||
unsigned int chip_id;
|
||||
|
||||
ret = regmap_update_bits(st->regmap, ADMV8818_REG_SPI_CONFIG_A,
|
||||
ADMV8818_SOFTRESET_N_MSK |
|
||||
ADMV8818_SOFTRESET_MSK,
|
||||
FIELD_PREP(ADMV8818_SOFTRESET_N_MSK, 1) |
|
||||
FIELD_PREP(ADMV8818_SOFTRESET_MSK, 1));
|
||||
if (ret) {
|
||||
dev_err(&spi->dev, "ADMV8818 Soft Reset failed.\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regmap_update_bits(st->regmap, ADMV8818_REG_SPI_CONFIG_A,
|
||||
ADMV8818_SDOACTIVE_N_MSK |
|
||||
ADMV8818_SDOACTIVE_MSK,
|
||||
FIELD_PREP(ADMV8818_SDOACTIVE_N_MSK, 1) |
|
||||
FIELD_PREP(ADMV8818_SDOACTIVE_MSK, 1));
|
||||
if (ret) {
|
||||
dev_err(&spi->dev, "ADMV8818 SDO Enable failed.\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regmap_read(st->regmap, ADMV8818_REG_CHIPTYPE, &chip_id);
|
||||
if (ret) {
|
||||
dev_err(&spi->dev, "ADMV8818 Chip ID read failed.\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (chip_id != 0x1) {
|
||||
dev_err(&spi->dev, "ADMV8818 Invalid Chip ID.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = regmap_update_bits(st->regmap, ADMV8818_REG_SPI_CONFIG_B,
|
||||
ADMV8818_SINGLE_INSTRUCTION_MSK,
|
||||
FIELD_PREP(ADMV8818_SINGLE_INSTRUCTION_MSK, 1));
|
||||
if (ret) {
|
||||
dev_err(&spi->dev, "ADMV8818 Single Instruction failed.\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (st->clkin)
|
||||
return admv8818_rfin_band_select(st);
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int admv8818_clk_setup(struct admv8818_state *st)
|
||||
{
|
||||
struct spi_device *spi = st->spi;
|
||||
int ret;
|
||||
|
||||
st->clkin = devm_clk_get_optional(&spi->dev, "rf_in");
|
||||
if (IS_ERR(st->clkin))
|
||||
return dev_err_probe(&spi->dev, PTR_ERR(st->clkin),
|
||||
"failed to get the input clock\n");
|
||||
else if (!st->clkin)
|
||||
return 0;
|
||||
|
||||
ret = clk_prepare_enable(st->clkin);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = devm_add_action_or_reset(&spi->dev, admv8818_clk_disable, st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
st->nb.notifier_call = admv8818_freq_change;
|
||||
ret = clk_notifier_register(st->clkin, &st->nb);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return devm_add_action_or_reset(&spi->dev, admv8818_clk_notifier_unreg, st);
|
||||
}
|
||||
|
||||
static int admv8818_probe(struct spi_device *spi)
|
||||
{
|
||||
struct iio_dev *indio_dev;
|
||||
struct regmap *regmap;
|
||||
struct admv8818_state *st;
|
||||
int ret;
|
||||
|
||||
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
|
||||
if (!indio_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
regmap = devm_regmap_init_spi(spi, &admv8818_regmap_config);
|
||||
if (IS_ERR(regmap))
|
||||
return PTR_ERR(regmap);
|
||||
|
||||
st = iio_priv(indio_dev);
|
||||
st->regmap = regmap;
|
||||
|
||||
indio_dev->info = &admv8818_info;
|
||||
indio_dev->name = "admv8818";
|
||||
indio_dev->channels = admv8818_channels;
|
||||
indio_dev->num_channels = ARRAY_SIZE(admv8818_channels);
|
||||
|
||||
st->spi = spi;
|
||||
|
||||
ret = admv8818_clk_setup(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
mutex_init(&st->lock);
|
||||
|
||||
ret = admv8818_init(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return devm_iio_device_register(&spi->dev, indio_dev);
|
||||
}
|
||||
|
||||
static const struct spi_device_id admv8818_id[] = {
|
||||
{ "admv8818", 0 },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(spi, admv8818_id);
|
||||
|
||||
static const struct of_device_id admv8818_of_match[] = {
|
||||
{ .compatible = "adi,admv8818" },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, admv8818_of_match);
|
||||
|
||||
static struct spi_driver admv8818_driver = {
|
||||
.driver = {
|
||||
.name = "admv8818",
|
||||
.of_match_table = admv8818_of_match,
|
||||
},
|
||||
.probe = admv8818_probe,
|
||||
.id_table = admv8818_id,
|
||||
};
|
||||
module_spi_driver(admv8818_driver);
|
||||
|
||||
MODULE_AUTHOR("Antoniu Miclaus <antoniu.miclaus@analog.com");
|
||||
MODULE_DESCRIPTION("Analog Devices ADMV8818");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
Reference in New Issue
Block a user