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Merge branch 'v6.11/bindings' into v6.11/drivers

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* v6.11/bindings:
  dt-bindings: clock: meson: a1: peripherals: support sys_pll input
  dt-bindings: clock: meson: a1: pll: introduce new syspll bindings
This commit is contained in:
Jerome Brunet 2024-06-10 12:18:15 +02:00
commit f34da56094
4 changed files with 16 additions and 4 deletions
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9
Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml
View File

@ -30,6 +30,8 @@ properties:
- description: input fixed pll div7
- description: input hifi pll
- description: input oscillator (usually at 24MHz)
- description: input sys pll
minItems: 6 # sys_pll is optional
clock-names:
items:
@ -39,6 +41,8 @@ properties:
- const: fclk_div7
- const: hifi_pll
- const: xtal
- const: sys_pll
minItems: 6 # sys_pll is optional
required:
- compatible
@ -65,9 +69,10 @@ examples:
<&clkc_pll CLKID_FCLK_DIV5>,
<&clkc_pll CLKID_FCLK_DIV7>,
<&clkc_pll CLKID_HIFI_PLL>,
<&xtal>;
<&xtal>,
<&clkc_pll CLKID_SYS_PLL>;
clock-names = "fclk_div2", "fclk_div3",
"fclk_div5", "fclk_div7",
"hifi_pll", "xtal";
"hifi_pll", "xtal", "sys_pll";
};
};

9
Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml
View File

@ -26,11 +26,15 @@ properties:
items:
- description: input fixpll_in
- description: input hifipll_in
- description: input syspll_in
minItems: 2 # syspll_in is optional
clock-names:
items:
- const: fixpll_in
- const: hifipll_in
- const: syspll_in
minItems: 2 # syspll_in is optional
required:
- compatible
@ -53,7 +57,8 @@ examples:
reg = <0 0x7c80 0 0x18c>;
#clock-cells = <1>;
clocks = <&clkc_periphs CLKID_FIXPLL_IN>,
<&clkc_periphs CLKID_HIFIPLL_IN>;
clock-names = "fixpll_in", "hifipll_in";
<&clkc_periphs CLKID_HIFIPLL_IN>,
<&clkc_periphs CLKID_SYSPLL_IN>;
clock-names = "fixpll_in", "hifipll_in", "syspll_in";
};
};

1
include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h
View File

@ -164,5 +164,6 @@
#define CLKID_DMC_SEL 151
#define CLKID_DMC_DIV 152
#define CLKID_DMC_SEL2 153
#define CLKID_SYS_PLL_DIV16 154
#endif /* __A1_PERIPHERALS_CLKC_H */

1
include/dt-bindings/clock/amlogic,a1-pll-clkc.h
View File

@ -21,5 +21,6 @@
#define CLKID_FCLK_DIV5 8
#define CLKID_FCLK_DIV7 9
#define CLKID_HIFI_PLL 10
#define CLKID_SYS_PLL 11
#endif /* __A1_PLL_CLKC_H */